CN103067030B - Integrated circuit, wireless communication unit and related methods - Google Patents
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Abstract
The present invention provides an integrated circuit, a wireless communication unit and related methods. The integrated circuit is used for providing a differential interface suitable for enveloping a tracking signal and comprises subtraction module of a first input for receiving a digital envelope tracking signal and a second input for receiving a second signal, the subtraction module being used for subtracting the second signal from the digital envelope tracking signal so as to generate an envelope tracking signal having a reduced average DC component; a digital to analog converter for receiving the envelope tracking signal to generate a differential analog format signal; and modulator optionally coupled to the digital to analog converter for differential output, the modulator comprising a DC input point for inserting the DC component to the differential analog format signal. Embodiments of the invention can remove the DC component from the digital envelope tracking signal and then introduce/add an analog DC signal to the envelope tracking signal with the DC component removed so as to improve the signal characteristics.
Description
[ technical field ] A method for producing a semiconductor device
The field of the invention relates to a wireless communication unit, an integrated circuit, a transmitter structure and a method for providing differential to single-ended conversion of signals. The present invention has application, but is not limited to, envelope tracking using differential circuit configurations and related methods.
[ background of the invention ]
The invention is mainly applied to the field of Radio Frequency (RF) power amplifiers of wireless telecommunication. The continuing pressure from the limited spectrum available in wireless communication systems forces the continued development of spectral effect linear modulation mechanisms. This phenomenon results in the average power emitted by the antenna being much lower than its maximum power due to envelope fluctuations in these linear modulation mechanisms, potentially making the efficiency of the power amplifier low. Accordingly, there is a great deal of research in the art directed towards developing high efficiency topologies that can provide high performance for the blocking (linear) region ('back-off' region) of a power amplifier. Linear modulation schemes require linear amplification of the modulated signal to minimize unwanted out-of-band emissions (out-of-bandission) caused by spectral regrowth. However, the active components used in a typical RF amplifying device are inherently non-linear, and the transfer function of the amplifying device can approach a straight line only when a small portion of the consumed Direct Current (DC) power is converted into RF power, i.e., can behave as an ideal linear amplifier. This 'linear' mode of operation makes the DC to RF power conversion less efficient, which is unacceptable for handheld (user) wireless communication units. Furthermore, inefficiency is also a recognized problem for the base station.
Furthermore, handheld (user) devices are focused on increasing battery life. In order to achieve both linearity and high efficiency, so-called linearization (linearization) techniques are used to improve the linearity of high efficiency class amplifiers, such as class 'AB', 'B' or 'C'. A large variety of linearization techniques are used in the design of linear transmitters, such as Cartesian Feedback (Cartesian Feedback), Feed-forward (Feed-forward), and adaptive predistortion transmitters.
In order to increase the bit rate used in the transmit uplink communication channel (i.e., the communication channel from the subscriber communication unit to the serving base station), larger constellation modulators with an Amplitude Modulation (AM) component have been desired and studied. This modulation scheme, such as the sixteen-point quadrature amplitude modulation (16-QAM) scheme, requires a plurality of linear Power Amplifiers (PAs) and its association with a high ' peak ' factor (creet) ' of the modulation envelope waveform (i.e., the degree of fluctuation). This modulation scheme results in a substantial reduction in power efficiency and linearity compared to the constant envelope modulation schemes used in the prior art.
Therefore, various methods have been proposed to overcome the above problems of power efficiency and linearity. One approach overcomes the efficiency and linearity problems by modulating the power amplifier supply voltage to match the envelope of the RF waveform transmitted through a Radio Frequency (RF) PA. The method uses an envelope modulation technique including Envelope Elimination and Restoration (EER) and Envelope Tracking (ET).
It can be appreciated that due to the high peak-to-average power ratio (PAPR) in a high power transmission environment, the use of the PA supply voltage RF envelope tracking can achieve the effect of improving both PA efficiency and linearity. Fig. 1 shows a graph 100 of two techniques, a first technique in which a PA is supplied with a fixed supply voltage 105, and a second technique in which the PA supply voltage is modulated to track the RF envelope waveform 115. In the first technique, the excess portion of the net PA supply voltage 110 is used (and thus potentially wasted) regardless of the nature of the modulated RF waveform to be amplified. In the second technique, the excess PA supply voltage net 120 may be reduced by modulating the RF PA supply, thereby allowing the PA supply to accurately track the transient RF envelope.
Envelope tracking simultaneously supports efficient improvements that are available in high PAPR environments, while also achieving correspondingly low DC consumption power. Thus, heat is reduced and the PA can operate at lower temperatures at the same output power. However, it is also appreciated that accurate tracking of the RF envelope is difficult to achieve in practical applications for high bandwidth signals. Depending on the overall system architecture, the bandwidth of the power modulator may be much larger (e.g., 2 or 5 times) than the bandwidth of the signal (envelope), so that the impact of group delay of the modulator through time alignment is minimized.
It is well known that differential circuit examples may provide better noise, immunity, and net value (headroom) performance than single-ended circuit examples. Fig. 2 is a simplified diagram 200 of a differential envelope/modulation tracking signal, in which a differential envelope/modulation waveform 210 is superimposed on a fixed DC signal 225, the differential envelope/modulation waveform 210 including a positive input (Vinp)215 and a negative input (Vinn) 220. As shown in fig. 2, the differential envelope/modulation tracking signal includes a DC portion and an AC portion, both of which may pass through any subsequent differential circuit elements.
Fig. 3 is a block diagram of a conventional simplified modulator circuit 300 for envelope tracking. The modulator circuit 300 comprises a differential-to-single ended conversion device 305 having a differential input 310, the differential input 310 comprising a negative envelope signal input (N)315 and a positive envelope signal (P) 320. The differential-to-single-ended conversion device 305 converts the differential input 310 to a single-ended output and inputs it to a first linear (class AB) amplifier stage 325. The amplified signal is then combined with the output of a second (e.g., class D) power amplifier stage 335, where the second power amplifier stage 335 uses a current detection module 330 to detect the zero crossing of the first linear amplifier stage 325 and control the current output by the second power amplifier stage 335 in combination with hysteresis. In this manner, both AC and DC signals can pass through the signal path.
However, this modulator circuit 300 is not ideal because it corresponds to the envelope of the input signal being entirely positive. Thus, the potential net value will be increased because the application of a differential input signal (i.e., the positive and negative portions of the signal) is difficult to achieve, even with additional circuit techniques to minimize DC offset and/or reduce noise. Another disadvantage of the modulator circuit 300 is that the input AC envelope signal is asymmetrical around the mean value. Therefore, more complex techniques, such as de-tracking (or other signal mapping techniques), are required to increase the asymmetry of the modulated signal, thereby further increasing the complexity of the circuit.
Therefore, there is a great need for an improved circuit, such as a modulator for envelope tracking signals, having a differential interface, a wireless communication unit and a corresponding method to solve the above problems.
[ summary of the invention ]
Accordingly, the present invention is directed to one or more of the above-mentioned disadvantages, and one or more of the problems may be solved by an integrated circuit, a wireless communication unit and related methods.
In one aspect, an embodiment of the present invention provides an integrated circuit for providing a differential interface for an envelope tracking signal, the integrated circuit comprising: a subtraction module comprising a first input for receiving a digital envelope tracking signal and a second input for receiving a second signal, wherein the subtraction module is configured to subtract the second signal from the digital envelope tracking signal to generate an envelope tracking signal, the envelope tracking signal having a reduced average dc component; a digital-to-analog converter for receiving the envelope tracking signal to generate a corresponding differential analog format signal; and a modulator, optionally coupled to the differential output of the digital-to-analog converter, wherein the modulator comprises a dc input point for inserting a dc component into the differential analog format signal.
In another aspect, an embodiment of the present invention provides a wireless communication unit supporting envelope tracking transmission, wherein the wireless communication unit includes: a subtraction module comprising a first input for receiving a digital envelope tracking signal and a second input for receiving a second signal, wherein the subtraction module is configured to subtract the second signal from the digital envelope tracking signal to generate an envelope tracking signal, the envelope tracking signal having a reduced average dc component; a digital-to-analog converter for receiving the envelope tracking signal to generate a corresponding differential analog format signal; and a modulator, optionally coupled to a differential output of the digital-to-analog converter, wherein the modulator comprises a dc input point for inserting a dc component into the differential analog format signal of the envelope tracking signal.
In another aspect, an embodiment of the present invention provides a method for envelope tracking signals supporting a differential interface, where the method includes: receiving a digital envelope tracking signal; subtracting a second signal from the digital envelope tracking signal to produce an envelope tracking signal having a reduced average dc component; performing digital-to-analog conversion on the envelope tracking signal with the reduced average DC component to generate a corresponding differential analog format signal; and inserting a DC component into the differential analog format signal of the envelope tracking signal.
The integrated circuit, the wireless communication unit and the related method of the embodiments of the invention can remove the DC component from the digital envelope tracking signal and then introduce/add an analog DC signal based on the envelope tracking signal with the DC component removed to improve the signal characteristics.
[ description of the drawings ]
FIG. 1 is a graph illustrating two techniques;
FIG. 2 is a simplified graphical illustration of a differential envelope/modulation tracking signal;
FIG. 3 is a schematic diagram of a simplified prior art modulator circuit for envelope tracking;
fig. 4 is a block diagram of a wireless communication unit according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a transmitter/modulation circuit according to an embodiment of the present invention, for example, a part of the transmitter/modulation circuit of the wireless communication unit shown in fig. 4;
fig. 6 is a flowchart illustrating operation of a modulator circuit of a wireless communication unit supporting a differential interface for envelope tracking signals according to an embodiment of the present invention.
[ detailed description ] embodiments
Embodiments of the present invention describe an integrated circuit for use in a wireless communication unit, such as user equipment in a 3rd generation partnership project (3gpp tm) communication standard. It should be appreciated by those skilled in the art that the inventive concepts described herein are not limited in application to any type of integrated circuit wireless communication unit or wireless transmitter capable of benefiting from linearity improvements and efficiency improvements through the use of a differential circuit. In some embodiments of the invention, a circuit design is also described that connects an envelope tracking amplifier (power modulator) to the envelope extraction path (envelope extraction and DAC). The circuit design may compensate for the absolute positive characteristic of the envelope modulated signal produced by the envelope extraction path. An embodiment of the above circuit design may remove a fixed DC component from the positive envelope modulated signal, thereby increasing the net signal value of subsequent differential circuit elements/devices, such as digital-to-analog converters (DACs). The circuit design embodiment shown in fig. 5 also includes a variety of techniques that may be used to reintroduce a fixed DC component to the differential envelope modulated signal.
Some embodiments of the present invention describe how to split the DC path and the AC path to provide a more optimal configuration than full-envelope applications of single-ended interfaces. Some embodiments of the invention also describe a specific implementation in which an AC amplifier is configured in a differential embodiment and which can be directly recombined with a DC component.
In one embodiment of the present invention, the inventors of the present invention found that the total range of the differential envelope signal shown in fig. 2 is entirely within the positive DC voltage region. Thus, if the differential modulation (envelope) waveform is switched between, for example, +0.2V and +1.0V (around a DC voltage), the differential circuit will use a differential signal that corresponds to a signal range of +2V (i.e., -1V to + 1V).
Furthermore, the inventors of the present invention have also found that the differential envelope signal shown in fig. 2 is asymmetric around its mean value. Thus, any potential net benefit (e.g., reduction in skew requirements and improvement in noise performance) gained by using differential signals is lost, defeating the reason for implementing a differential circuit configuration.
In some embodiments of the present invention, one or more control mechanisms are provided to optimize the DC portion of the differential modulation (envelope) waveform. One embodiment of the present invention is described with respect to an integrated circuit for providing a differential interface for an envelope tracking signal. The integrated circuit comprises a subtraction module comprising a first input for receiving a digital envelope tracking signal and a second input for receiving a second signal, wherein the subtraction module is configured to subtract the second signal from the digital envelope tracking signal to generate an envelope tracking signal having reduced zero frequency components. A digital-to-analog converter (DAC) receives the envelope tracking signal having reduced zero frequency components and generates a differential analog format of the envelope tracking signal therefrom. A modulator is optionally coupled to the differential output of the DAC, wherein the modulator includes a DC input point at which a DC component is inserted into the differential analog format signal. In an embodiment of the invention, the integrated circuit may be implemented in a wireless communication unit.
Therefore, referring first to fig. 4, fig. 4 is a block diagram illustrating a wireless communication unit 400 according to an embodiment of the present invention, which may be, for example, a subscriber unit (MS) under cellular communication standard or a User Equipment (UE) in a third generation partnership project (3 gpp) communication system. It will be appreciated by those skilled in the art that the inventive concepts described herein may also be applied to other wireless communication units, such as base transceiver stations or other infrastructure elements. It should also be appreciated by those skilled in the art that the inventive concepts described herein may be applied to any voice and/or data communication signal type.
The wireless communication unit 400 includes an antenna 402 optionally coupled to a multiplexing filter/antenna switch 404, the multiplexing filter/antenna switch 404 configured to provide isolation between receive and transmit chains in the wireless communication unit 400. The receive chain 410 includes receiver front-end circuitry 406 (effectively providing reception, filtering, and intermediate or baseband conversion functions), as will be appreciated by those skilled in the art. The receiver front-end circuitry 406 is optionally coupled to a signal processor 408. The output of the signal processor 408 is provided to a suitable User Interface (UI)430, which user interface 430 comprises, for example, a screen or a flat panel display, or the like. A controller 414 provides overall control of the subscriber units and is coupled to the receiver front-end circuitry 406 and signal processor 408 (typically implemented by a Digital Signal Processor (DSP)). The controller 414 is also coupled to a memory element 416, the memory element 416 storing various operating mechanisms such as encoding/decoding functions, mode synchronization functions, code sequence functions, and the like.
The memory element 416 also stores modulation data, programming data for voltage and/or current and DAC values, and supply power data used in power supply voltage control to track the envelope of the radio frequency waveform output by the wireless communication unit 400, and various data stored by the memory element 416 may be processed by the signal processor 408, in accordance with embodiments of the present invention. In addition, a timer 418 is optionally coupled to the controller 414 for controlling various operation timings within the wireless communication unit 400, such as operation timings of transmission or reception of time-dependent signals within the wireless communication unit 400 and operation timings of time domain variation detection of PA power supply voltage in the transmit chain.
As for the transmit chain 420, it includes a user interface 430, the user interface 430 may be, for example, a keyboard or a touch-sensitive screen, which is serially connected to the transmitter/modulation circuit 422 through the signal processor 408. The transmitter/modulation circuit 422 processes the transmitted input signal and up-converts the signal to an RF signal for output to the power amplifier module (or integrated circuit) 424 for amplification. The RF signal amplified by the power amplifier module/PA integrated circuit 424 is transmitted to the antenna 402. The transmitter/modulation circuitry 422, the power amplifier/PA integrated circuit 424, and the PA power supply module 425 each operate in response to the controller 414, wherein the PA power supply module 425 is additionally responsive to the regeneration of the envelope modulation waveform from the transmitter/modulation circuitry 422.
In some embodiments, the signal processor 408 in the transmit chain 420 may be implemented differently than the signal processor 408 in the receive chain 410. Alternatively, a single processor may perform the processing functions in both the transmit and receive chains, as shown in fig. 4. The various elements of the wireless communication unit 400 may be implemented as separate elements or as an integrated element depending only on the particular application or design choice.
Further, the transmitter/modulation circuit 422, in conjunction with the power amplifier 424, PA power supply block 425, memory device 416, timer 418, and controller 414 may be used to support envelope tracking transmission generated by a suitable power supply applied to the PA block/integrated circuit 424, in accordance with embodiments of the present invention. For example, the supply is generated for a wideband linear power amplifier, and the supply is used to track the envelope waveform of the PA 424. In particular, the transmitter/modulation circuit 422 comprises an Integrated Circuit (IC) (further described in fig. 5) comprising a subtraction module having a first input for receiving a digital envelope signal and a second input for receiving a second signal, the subtraction module for subtracting the second signal from the digital envelope signal to generate an envelope tracking signal having a reduced DC (zero frequency) component. The DAC is configured to receive the envelope tracking signal having a reduced DC component and generate a corresponding differential analog signal. A modulator is optionally coupled to the differential output of the DAC, wherein the modulator includes a DC input point for inserting a DC component into the differential analog signal corresponding to the envelope tracking signal.
Fig. 5 is a schematic diagram of a transmitter/modulation circuit according to an embodiment of the present invention, for example, a part of the transmitter/modulation circuit 422 of the wireless communication unit shown in fig. 4. The transmitter/modulation circuitry 422 is configured and/or operable to support envelope tracking. A Power Amplifier (PA) (not shown) receives an envelope modulated RF signal (not shown) as an input RF signal to be amplified. The PA also receives a supply voltage signal 505, which is a broadband supply voltage from the power supply ic 510. For ease of understanding and without confusion or misleading about the exemplary embodiment shown in fig. 5, some of the electronic components, particularly the power supply ic 510, are not described in further detail herein. In other embodiments of the present invention, the power supply module may also be optimally configured to provide a power envelope corresponding to a differential modulation format.
The partial transmitter/modulation circuit 422 shown above comprises signal amplitude determination circuitry/elements/logic 515 (shown as' | I2+ Q2 |), followed by pre-shaping gain logic 520 for providing gain to the input signal before it is shaped by shaping logic 525. The shaped signal is output by shaping logic 525 and input to a post-shaping gain circuit 530 to provide gain to the shaped input signal.
The amplified shaped input signal is then input to envelope modulation logic/integrated circuit 512. The envelope modulation logic circuit/integrated circuit 512 includes subtraction logic 535, the subtraction logic 535 subtracting a C signal 545 from the amplified shaped input signal, and the subtraction logic 535 may be implemented in a manner known in the art, such as by conventional arithmetic operations with multiple digital element/component synthesis. In this manner, the DC component is removed from the amplified shaped input signal, thereby maximizing the range of the subsequently generated differential signal. The level of the DC signal 545 applied to the subtraction logic 535 may be determined by a transmitter parameter 540. For example, a DC level, such as an average DC level, may be calculated directly from the data of a particular frame, although this may not be a practical and feasible case. Alternatively, in practice, the DC level may also be a value based on the power level or a value related to the total level (e.g. half of the total positive level). The output of the subtraction logic 535 is input to a differential envelope digital-to-analog converter (DAC) 555. The envelope DAC 550 converts the single-ended digital input signal (from the subtraction logic 535) to a differential logic input and provides it to a reconstruction filter 555 to generate an envelope signal. The use of the differential envelope DAC 550 may provide benefits such as better common mode rejection ratio and improved signal-to-noise ratio (SNR) performance through an increase in the net signal value. The envelope signal is then provided to a current-mode differential-to-single-ended conversion circuit 580.
The current-mode differential-to-single-ended conversion circuit 580 includes a linear class AB amplifier 565 that includes a differential input and a single-ended output that provides the PA supply 505 to a load. In some embodiments, the current-mode differential-to-single-ended conversion circuit 580 may provide one or more of the following desirable characteristics for use in an Envelope Tracking (ET) amplifier configuration: (1) a non-inverting (non-inverting) feedback configuration with good noise performance and bandwidth performance; (2) a high impedance interface (including a signal path and a DC path); (3) a lower noise gain; and (4) a wider bandwidth.
The current-mode differential-to-single-ended conversion circuit 580 receives feedback signals from the output of the linear class AB amplifier 565 and is controlled by the output of a DAC 585, the digital input of which DAC 585 is set by a digital program operation 570 of the digital value of the DA signal 545 applied to the subtraction logic 535.
Thus, optimally, embodiments of the present invention provide a differential ET amplifier configuration in which the AC signal path, e.g., the path through the differential envelope DAC 550 and the reconstruction filter 555, is separated from the DC (control) signal path, e.g., the path that digitally programs operation 570 a digital level of DAC signal 545 applied to subtraction logic 535, where the DC component is extracted (removed) in the digital domain and recombined with the envelope signal in the analog domain.
In some embodiments, the structure can remove the fixed DC level in the analog domain and then reintroduce/add an analog DC signal based on the removed signal. In some embodiments, the added signal value may be in the form of an analog signal (implemented by a DAC) or in the form of a digital signal. The analog signal may be a single ended or differential signal alone or as part of a mixed signal, such as a common mode level of the differential envelope signal. Furthermore, in some embodiments, the removed DC level may be a small portion of the overall scale.
In some embodiments, a signal correction module (not shown) may be disposed between the subtraction logic 535 and the differential envelope DAC 550 shown in fig. 5, for example, and may be configured to correct the signal characteristics of the reduced DC component envelope tracking signal output by the subtraction logic 535.
A second benefit that may be provided by embodiments of the present invention is: the use of a differential to single ended common mode topology including an additional DC input (e.g., through DAC 585).
Therefore, in the embodiment of the present invention, since only a negligible DC component remains after the DC component removal operation and the negligible DC component is hardly processed, the analog signal path can be fully optimized in AC performance, such as gain, noise, offset, envelope tracking DAC requirements, and the like.
Further, in embodiments of the present invention, the transmitter/modulation circuit 422 may also include a processor module, or the processor module may be implemented by the signal processing function 428 shown in fig. 4. The processor module may be coupled to the dc input point or to the subtraction module, the processor module being configured to dynamically improve at least one signal characteristic of the dc component if coupled to the dc input point and to dynamically improve at least one signal characteristic of the second signal subtracted from the first signal if coupled to the subtraction module. The improved signal characteristic may, for example, be a dc offset of the dc component or of the second signal. The processor module may dynamically improve the signal characteristic in a timing period (over a period of time), and further, the processor module may improve the signal characteristic of the signal in units of transmit slots (a transmit slot by transmit slot) for each transmit slot. Furthermore, the signal characteristics improved by the processor module may also include any of the following characteristics: signal amplitude, signal linearity, and signal phase.
In the embodiment of the digital domain shown in fig. 5, the digital gain can be regarded as an amplification process of the digital signal. Furthermore, 'shaping' of a digital signal can be considered to encompass any signal and waveform manipulation, such as hard or soft clipping (clipping or soft), hard-or soft-detouring, or any form of linear or non-linear mapping process (e.g., pre-distortion) to correct for imperfections in the PA. Various digital implementations may also be employed, such as through hard-coded (ROM) or programmable (RAM) coding or through the use of suitable look-up tables (LUTs) capable of receiving user-defined parameters.
Further, in this manner, the envelope modulation logic/integrated circuit 512 may be configured to:
(1) reducing peak-to-peak (peak-to-peak) voltage of the envelope signal, thereby improving efficiency;
(2) limiting a signal bandwidth of the envelope signal;
(3) running any necessary gain and offset calibrations on the envelope signal;
(4) any signal formatting operation is performed, such as converting signals between differential and single-ended forms.
Fig. 6 is a flowchart 600 illustrating operation of a modulator circuit of a wireless communication unit supporting a differential interface for envelope tracking signals according to an embodiment of the present invention. The process 600 begins at step 605, after which the modulator receives a digital envelope tracking signal at step 610 and determines the DC component associated with the received digital envelope tracking signal at step 615, such as a DC level within the digital envelope tracking signal or a typical/usual/predictable DC level that will be subsequently removed from the digital envelope tracking signal. The process 600 further includes a subtraction operation in step 620, wherein a second signal is subtracted from the digital envelope tracking signal to generate an envelope tracking signal having a reduced average Direct Current (DC) component; and digital-to-analog conversion in step 625, the envelope tracking signal with reduced average Direct Current (DC) component is converted to generate a corresponding differential analog signal. In addition, the method further includes the operation of inserting a DC component into the differential analog signal in step 630, and the operation of outputting a differential signal from the modulator in step 640. The process 600 ends at step 640.
The above embodiments thus provide an improved integrated circuit and a wireless communication unit providing differential to single ended conversion of signals that can be applied in linear and efficient transmitter architectures, especially in wideband envelope tracking architectures.
Optimally, embodiments of the present invention may also benefit from differential paths, e.g., maximizing the net value of the signal range through a DAC, providing improvements in noise and offset performance, e.g., in response to separation of the AC and DC signal paths.
In some embodiments, the DC component may be updated/recombined (e.g., added) into an AC envelope signal at any suitable time (e.g., during each transmit slot), such as in a WCDMA or LTE system. In some embodiments, when the envelope tracking path is located separately from the envelope tracking modulator, any DC offset introduced may be controlled separately, for example, by a digital serial interface.
In some embodiments, the digitally removable DC component may then be recombined (e.g., added) into the AC (analog) envelope signal by a second low frequency (possibly low resolution/precision) DAC as shown in fig. 5.
Optimally, some embodiments of the present invention may provide the ability to adapt to the envelope operating mode, depending on the favorable operating environment. Particularly, the ability to reconfigure the DC signal level of an envelope tracking signal based on a power level, for example, over a particular time frame. In addition to changing the DC level removed and added to the signal, the gain of the differential signal can also be changed through the use of the net value available provided by the differential interface.
In some embodiments, the DC component that can be removed from the digital envelope signal may be only a partial value of the DC level of the digital envelope signal. In this manner, when most (but not all) of the DC component has been removed, the remaining portion of the DC component will pass through the main (AC) signal path since only the DC coupling remains. In this example, the required signal resolution in the DA signal path would likely be reduced. This example may also be used in DC offset correction where the difference between the two DC components represents the correction signal needed to compensate for DC offset in the envelope tracking system.
In particular, it will be appreciated by those skilled in the art that the foregoing inventive concepts may be applied by semiconductor manufacturers in any integrated circuit that includes a PA that employs a single-ended power supply. It will also be appreciated that a semiconductor manufacturer may also apply the inventive concept to a stand-alone device, such as a power supply module, or to the design of an Application Specific Integrated Circuit (ASIC), and/or any other subsystem components. Alternatively, the embodiments of the present invention may be implemented by discrete circuits or combined elements.
Although the above embodiments of the invention have clearly described the functional purposes of the functional units, modules, logic elements and/or processors, it should be understood that any suitable distribution of functionality between these functional units or processors can also be applied in the present invention. For example, functions implemented using separate processors or controllers may also be implemented by the same processor or controller. Thus, references to a unit having a particular function are intended to cover the appropriate method for performing the function, rather than the only structure or logic for performing the function.
The invention can be implemented in any suitable form including hardware, software, firmware or any combination of these. Furthermore, the invention may be implemented at least in part by computer components running on one or more data processors and/or digital signal processors, or configurable modular components such as Field Programmable Gate Array (FPGA) devices. However, the elements described in connection with the embodiments of the invention may be functionally and logically implemented in any suitable way. The functionality may be implemented in a single unit, in a plurality of units or in part in other functional units.
While the invention has been described with reference to certain embodiments, it is not intended to be limited to the specific form set forth herein. The scope of the invention is limited only by the claims of the present application. Furthermore, while only one feature of the invention may have been described in connection with an embodiment, those skilled in the art will appreciate that various features of the various described embodiments may be combined in accordance with the invention. In the claims, the term "comprising" should be interpreted as "including but not limited to" and does not exclude the presence of other elements or steps than those listed in a claim.
Furthermore, although individually listed, a plurality of means, elements or steps of a method may be implemented by e.g. a unit or a processor. Furthermore, although different features of the invention are claimed in different claims, these may possibly be combined, and the mere fact that certain measures are recited in mutually different claims does not indicate that a combination of these features is not feasible and/or advantageous. Also, the inclusion of a feature in one claim does not limit the scope of the claim, and features defined in one claim may, where appropriate, be used in other claims.
Furthermore, the order of arrangement of the claims does not imply that the features of the invention must be performed in the specific order, and in particular that the steps of the method claimed by the invention must be performed in the specific order claimed. Conversely, the individual steps can also be carried out by other suitable steps. Moreover, the singular does not exclude the plural, and the plural is not excluded by the words "a", "an", "first", "second", etc.
Although the present invention has been described with reference to the preferred embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (17)
1. An integrated circuit for an envelope tracking signal supporting a differential interface for providing a differential interface for the envelope tracking signal, the integrated circuit comprising:
a subtraction module comprising a first input for receiving a digital envelope tracking signal and a second input for receiving a second signal, wherein the subtraction module is configured to subtract the second signal from the digital envelope tracking signal to generate an envelope tracking signal, the envelope tracking signal having a reduced average dc component, the second signal being a dc component included in the digital envelope tracking signal;
a digital-to-analog converter for receiving the envelope tracking signal to generate a corresponding differential analog format signal; and
a modulator coupled to the differential output of the DAC, the modulator comprising a DC input for inserting a DC component into the differential analog format signal, the DC component inserted into the differential analog format signal being substantially equal to the second signal, such that the DC offset of the envelope tracking signal is recovered.
2. The integrated circuit of claim 1, wherein the modulator further comprises a differential-to-single-ended conversion module, the differential-to-single-ended conversion module comprising the dc input point to insert the dc component into the differential analog format signal while converting the differential analog format signal to a single-ended envelope tracking signal.
3. The integrated circuit of claim 2, wherein the differential to single-ended conversion module is configured to provide current-mode differential to single-ended conversion of a signal applied to the DC input.
4. The integrated circuit of claim 1, further comprising a processor, optionally coupled to:
the DC input point is used for dynamically improving at least one signal characteristic of the DC component; or,
the subtraction module is used for dynamically improving at least one signal characteristic of the second signal.
5. The integrated circuit of claim 4, wherein the dynamically improved signal characteristics comprise: a dc offset of the second signal or the dc component.
6. The IC of claim 4 wherein the processor is configured to dynamically improve the at least one signal characteristic during a clock cycle.
7. The IC of claim 6 wherein the processor is configured to dynamically improve the at least one signal characteristic in units of transmit slots for each transmit slot.
8. The integrated circuit of claim 4, wherein the signal characteristics improved by the processor include at least one of: signal amplitude, signal linearity, and signal phase.
9. The ic of claim 1 wherein the dc component of the digital envelope tracking signal is substantially equal to the second signal, such that the envelope tracking signal with the reduced average dc component is substantially an ac portion of the envelope tracking signal.
10. The ic of claim 1 wherein the envelope tracking signal having a reduced average dc component comprises an ac portion of the envelope tracking signal and the envelope tracking signal comprises less dc portion than the digital envelope tracking signal.
11. The integrated circuit of claim 1, wherein the dc component inserted into the differential analog format signal is equal to a combination of the second signal and a dc offset value of the digital-to-analog converter.
12. The integrated circuit of claim 1, further comprising a second digital-to-analog converter for inserting the dc component into the envelope tracking signal having a reduced average dc component at the dc insertion point.
13. The ic of claim 1 further comprising a signal correction module disposed between the subtraction module and the dac for correcting signal characteristics of the envelope tracking signal having the reduced average dc component.
14. The integrated circuit of claim 1, further comprising an envelope modulation module comprising or coupled to the subtraction module and configured to improve at least one envelope signal characteristic of the digital envelope signal.
15. The ic of claim 14 wherein the envelope modulation module is configured to adjust the at least one envelope signal characteristic according to at least one of:
limiting the signal bandwidth of the digital envelope tracking signal;
performing gain and/or offset calibration on the digital envelope signal;
and performing a signal formatting operation on the digital envelope signal.
16. A wireless communication unit that supports envelope tracking transmissions, the wireless communication unit comprising:
a subtraction module comprising a first input for receiving a digital envelope tracking signal and a second input for receiving a second signal, wherein the subtraction module is configured to subtract the second signal from the digital envelope tracking signal to generate an envelope tracking signal, the envelope tracking signal having a reduced average dc component, the second signal being a dc component of the digital envelope tracking signal;
a digital-to-analog converter for receiving the envelope tracking signal to generate a corresponding differential analog format signal; and
a modulator coupled to the differential output of the DAC, wherein the modulator comprises a DC input point for inserting a DC component into the differential analog format signal of the envelope tracking signal, the DC component inserted into the differential analog format signal being substantially equal to the second signal, such that the DC offset of the envelope tracking signal is recovered.
17. A method for envelope tracking signals supporting a differential interface, the method comprising:
receiving a digital envelope tracking signal;
subtracting a second signal from the digital envelope tracking signal to produce an envelope tracking signal, the envelope tracking signal having a reduced average dc component, the second signal being a dc component of the digital envelope tracking signal;
performing digital-to-analog conversion on the envelope tracking signal with the reduced average DC component to generate a corresponding differential analog format signal; and
inserting a DC component into the differential analog format signal of the envelope tracking signal, wherein the DC component inserted into the differential analog format signal is substantially equal to the second signal, so that the DC offset of the envelope tracking signal is recovered.
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| CN201410464783.9A CN104300916B (en) | 2011-10-20 | 2012-10-22 | Signal processing circuit and signal processing method |
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| US13/345,760 | 2012-01-09 | ||
| US13/345,760 US8803605B2 (en) | 2011-02-01 | 2012-01-09 | Integrated circuit, wireless communication unit and method for providing a power supply |
| US13/612,888 US8665018B2 (en) | 2011-02-01 | 2012-09-13 | Integrated circuit, wireless communication unit and method for a differential interface for an envelope tracking signal |
| US13/612,888 | 2012-09-13 |
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| CN104883139B (en) * | 2015-05-22 | 2018-02-13 | 电子科技大学 | A kind of double switch power modulator for envelope-tracking system |
| DE112018003280B4 (en) * | 2017-06-27 | 2024-06-06 | Knowles Electronics, Llc | POST-LINEARIZATION SYSTEM AND METHOD USING A TRACKING SIGNAL |
| CN110504927A (en) * | 2019-08-02 | 2019-11-26 | 武汉谐声半导体科技有限公司 | The interface circuit of D class power amplifier and the D class power amplifier of numeral input |
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| DE10250613B4 (en) * | 2002-10-30 | 2007-02-08 | Advanced Micro Devices, Inc., Sunnyvale | Integrated RF signal level detector usable for automatic power level control |
| US7043213B2 (en) * | 2003-06-24 | 2006-05-09 | Northrop Grumman Corporation | Multi-mode amplifier system |
| US7421037B2 (en) * | 2003-11-20 | 2008-09-02 | Nokia Corporation | Reconfigurable transmitter with direct digital to RF modulator |
| DE602006020734D1 (en) * | 2005-07-27 | 2011-04-28 | Nxp Bv | RF TRANSMITTER WITH COMPENSATION OF DIFFERENTIAL PATH DELAY |
| CN101527545A (en) * | 2009-04-17 | 2009-09-09 | 京信通信系统（中国）有限公司 | Doherty envelope tracking power amplifier and method for treating radio frequency signal |
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| CN104300916A (en) | 2015-01-21 |
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