CN103066927B - For method and the device of the distortion of methods of digital predistortion amplifier - Google Patents

For method and the device of the distortion of methods of digital predistortion amplifier Download PDF

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CN103066927B
CN103066927B CN201110316070.4A CN201110316070A CN103066927B CN 103066927 B CN103066927 B CN 103066927B CN 201110316070 A CN201110316070 A CN 201110316070A CN 103066927 B CN103066927 B CN 103066927B
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signal
amplifier
error
needs
distorter
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CN103066927A (en
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赵光玲
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Nokia Shanghai Bell Co Ltd
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Alcatel Lucent Shanghai Bell Co Ltd
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Abstract

The invention provides a kind of method and device of the distortion for methods of digital predistortion amplifier, and a kind of amplification module with digital pre-distorter orthofunction.This device comprises error generation unit and equalizer; Wherein, this error generation unit is used for acquisition needs amplifying signal, obtains the output signal of this amplifier, and needs this output signal of amplifying signal and this amplifier to produce error signal according to this; This equalizer, needs amplifying signal and this error signal for receiving this, and according to this error signal, based on predetermined self adaptation standard, needs amplifying signal to carry out equilibrium to this, and the signal exported through equilibrium is to be supplied to this amplifier.This amplification module comprises this device and amplifier.Realization mechanism of the present invention is relatively simple and easy, and accurately, has adaptivity, improves real-time, and improves the operating efficiency of amplifier.

Description

For method and the device of the distortion of methods of digital predistortion amplifier
Technical field
The present invention relates to a kind of methods of digital predistortion technology, particularly relate to a kind of method and device of the distortion for methods of digital predistortion amplifier, and a kind of amplification module with digital pre-distorter orthofunction.
Background technology
In order to reduce the distortion of amplifier, such as, by the distortion caused by memory effect and intermodulation distortion (intermodulationdistortion), usually by setting up the inverse model of amplifier in advance, to reduce the distortion that amplifier exports, and improve the linearisation degree of amplifier output.Usually according to amplifier nonlinearity degree, bandwidth and memory effect etc., Volterra progression is used:
F [ x ( n ) ] = Σ k = 1 K Σ q = 0 Q - 1 a kq x ( n - q ) | x ( n - q ) | k - 1
In formula, K is nonlinear exponent number, and Q is the memory depth of amplifier, sets up non-linearization model, carries out methods of digital predistortion (DigitalPredistortion) to the distortion of amplifier.System of linear equations can be set up according to the constrained input of amplifier, solve every coefficient of Volterra progression, to adjust this inverse model, but the complexity owing to implementing, the method needs at different parts, implements discretely in such as FPGA, DSP or CPU etc.
In addition, also there are some shortcomings in the method.For some nonlinear degrees for high or wide-band amplifier, Volterra progression is used to set up inverse model, very complicated, because now need the exponent number of very high Volterra progression, and Volterra progression is multidimensional convolution, so its complexity is very high and be easily subject to the impact of finite word length effect, easily cause when performing in FPGA overflowing.On the other hand, for each different amplifier, need to set up respective inverse model independently, and redefine the corresponding parameter of Volterra progression, this is just difficult to realize real-time renewal, is difficult in this way realize self adaptation.In addition, because Volterra progression is unlimited, and when setting up the inverse model of amplifier, only have chosen the item number that Volterra progression is limited, so utilize the inverse model that Volterra progression creates, itself be exactly approximate and be coarse, easily produce error.Especially for the amplifier that nonlinear degree is high, and wide-band amplifier is all the more so.This reduces the efficiency of amplifier.But wide-band amplifier is trend of today, so it is crucial especially for how overcoming the above problems the efficiency effectively improving amplifier.
Summary of the invention
Visible, the shortcoming that the method mentioned in background technology exists is that complexity is higher, poor real, non-self-adapting, need to implement discretely and for non-linear seriously or for wide-band amplifier, its accuracy is lower, and this has had a strong impact on the efficiency of amplifier.
In order to solve the problems of the technologies described above, according to an aspect of the present invention, the invention provides a kind of device of the distortion for methods of digital predistortion amplifier, described device comprises: error generation unit and equalizer; Wherein said error generation unit, needing amplifying signal for obtaining, obtaining the output signal of described amplifier, and producing error signal according to the described described output signal of amplifying signal and described amplifier that needs; And described equalizer, describedly amplifying signal and described error signal is needed for receiving, and according to described error signal, based on predetermined self adaptation standard, equilibrium is carried out to the described amplifying signal that needs, and export through the signal of equilibrium to be supplied to described amplifier.By this device, by carrying out methods of digital predistortion to the distortion of amplifier, the linearisation degree of the comprehensive response amplitude/amplitude characteristic, amplitude/phase characteristic etc. of equalizer and amplifier can be significantly improved.
According to one embodiment of present invention, described error generation unit comprises: normalization unit, for the described output signal normalization by described amplifier; Lock unit, for by the described output signal of described amplifier and the described input signal of described amplifier synchronous; Buffer, for cushioning predetermined time section by the described amplifying signal that needs; And subtracter, for obtaining the described signal through buffering with the difference through normalization and between synchronous signal to produce described error signal.Preferably, section equals described and needs equalizer described in amplifying signal, through described amplifier, described normalization unit, described lock unit and the time arrived needed for described subtracter described predetermined time.
In the present invention, the described output signal normalization of described amplifier is referred to the gain that erase amplifier produces the input signal of amplifier.Such as, when the gain factor of amplifier is G, the output signal of amplifier is multiplied by the inverse of gain by normalization unit, i.e. 1/G.
According to one embodiment of present invention, described lock unit comprises: thick lock unit, smart lock unit and Phase synchronization unit.The synchronization accuracy of thick lock unit reaches the integer samples time; Depend on over-sampling rate, the synchronization accuracy of smart lock unit reaches the fractional sampling time; Phase synchronization unit makes the output signal of the input signal of amplifier and amplifier synchronous in phase place.
According to one embodiment of present invention, described equalizer, described error generation unit integrate, thus simplify the overall structure of device, reduce the complexity of device, reduce cost.
According to one embodiment of present invention, described self adaptation standard is one of the following: least-mean-square error algorithm; Least mean square algorithm; And the minimum quadratic power algorithm of recurrence.
In addition, according to another aspect of the present invention, present invention also offers a kind of method of the distortion for methods of digital predistortion amplifier, described method comprises reception needs amplifying signal; Obtain the output signal of described amplifier; Described error signal is produced according to the described described output signal of amplifying signal and described amplifier that needs; According to described error signal, based on predetermined self adaptation standard, equilibrium is carried out to the described amplifying signal that needs; And export through the signal of equilibrium to be supplied to described amplifier.
According to one embodiment of present invention, described generation error signal step also comprises: by the described output signal normalization of described amplifier; By the described output signal of described amplifier and the described input signal of described amplifier synchronous; The described amplifying signal that needs is cushioned predetermined time section; And obtain the described signal through buffering with the difference through normalization and between synchronous signal to produce described error signal.Preferably, section equals the described amplifying signal that needs through described equalization step, through the time sum needed for described amplifier, described normalization step and described synchronizing step described predetermined time.
According to one embodiment of present invention, described synchronizing step also comprises: thick synchronous, smart synchronous and Phase synchronization.Slightly synchronous synchronization accuracy reaches the integer samples time; Depend on over-sampling rate, the synchronous synchronization accuracy of essence reaches the fractional sampling time; Phase synchronization makes the output signal of the input signal of amplifier and amplifier synchronous in phase place.
According to one embodiment of present invention, described self adaptation standard is one of the following: least-mean-square error algorithm; Least mean square algorithm; And the minimum quadratic power algorithm of recurrence.
In addition, according to a further aspect of the invention, present invention also offers a kind of amplification module with digital pre-distorter orthofunction, it comprises this device for the distortion of methods of digital predistortion amplifier, and described amplifier.
The preferred technical scheme provided of the present invention is provided, by according to the input signal of amplifier and output signal, produces error signal.Although this error signal is by time domain subtracts each other generation, because Fourier transform is linear, so this error signal reflects in fact the error on frequency domain.On the other hand, memory effect and intermodulation distortion are the build-in attributes of amplifier, change slowly in time, and are the elements on frequency domain.Thus, this error signal contains in fact and reflects by the caused various errors such as the memory effect of amplifier, intermodulation distortion.Therefore, this error signal contains the element of all distortions on interested frequency band, thereby eliminating the error caused by limited item number in prior art.In essence, the present invention is the technology based on spectral substraction.In addition, equalizer is made up of some tap filters, it is according to this error signal, via different adaptive algorithms, each term coefficient of tap filter can be regulated adaptively, to make the frequency response substantially constant of equalizer and amplifier, which thereby enhance real-time, and add the adaptive ability of amplifier, improve the operating efficiency of amplifier.In addition, application of the present invention is quite extensive, can be used on various nonlinear element, to improve their operating efficiency.On the other hand, realization mechanism of the present invention is relatively simple and easy, does not consume too much resource extraly.Meanwhile, relatively accurate according to device of the present invention, there is adaptivity, and can be easily.
Various aspects of the present invention are more clear by the explanation by specific embodiment hereinafter.
Accompanying drawing explanation
By reading the detailed description done non-limiting example done with reference to the following drawings, other features, objects and advantages of the present invention will become more apparent:
Fig. 1 shows the device 100 of the distortion for methods of digital predistortion amplifier according to an embodiment of the invention;
Fig. 2 and Fig. 3 shows the exemplary frequency spectrum of the signal on two inputs of subtracter 1340; And
Fig. 4 shows the exemplary frequency spectrum of error signal.
In the drawings, run through different diagrams, same or similar Reference numeral represents identical or corresponding parts or feature.
Embodiment
Fig. 1 shows the device 100 of the distortion for methods of digital predistortion amplifier according to an embodiment of the invention.This device 100 comprises equalizer 110 and error generation unit 130, wherein this error generation unit 130 comprises buffer 1310, normalization unit 1320, lock unit 1330 and subtracter 1340, and this lock unit 1330 comprises thick lock unit 1331, smart lock unit 1332 and Phase synchronization unit 1333.The input of amplifier 120 is provided with digital to analog converter (not shown), the output of amplifier 120 is provided with analog to digital converter (not shown).
As shown in Figure 1, the buffer 1310 in error generation unit 130 needs amplifying signal for obtaining, and namely this buffer 1310 obtains the input of equalizer 110.
Equalizer 110 receives and needs amplifying signal, carries out equilibrium (i.e. predistortion), and exported---namely through the signal of equilibrium---that the input signal as amplifier 120 is supplied to amplifier 120 to it.Such as, the output signal of equalizer 110 can be transported to the input of amplifier 120 via digital to analog converter.The output signal of amplifier 120 enters the normalization unit 1320 in error generation unit 130 via analog to digital converter.In this unit, by the output signal normalization of amplifier 120.Then lock unit 1330 is entered through normalized output signal.In lock unit 1330, the output signal of amplifier 120 is synchronous with its input signal.Particularly, this signal enters thick lock unit 1331, smart lock unit 1332 and Phase synchronization unit 1333 in succession.The synchronization accuracy of thick lock unit 1331 reaches the integer samples time; Depend on over-sampling rate, the synchronization accuracy of smart lock unit 1332 reaches the fractional sampling time; Phase synchronization unit 1333 makes the output signal of the input signal of amplifier 120 and amplifier 120 synchronous in phase place.
The received amplifying signal that needs is cushioned predetermined time section by the buffer 1310 in error generation unit 130, this predetermined time section equal to need amplifying signal through equalizer 110, amplifier 120, normalization unit 1320, lock unit 1330 and time of arriving needed for subtracter 1340.The output of buffer 1310 and the output of Phase synchronization unit 1333 are connected respectively to two inputs of subtracter 1340.Visible, buffer 1310 and lock unit 1330 make the output signal of amplifier 120 synchronous with the input signal of amplifier 120, ensure that the signal on two inputs of subtracter 1340 needs amplifying signal corresponding to identical.
Subtracter 1340 by obtain through buffering need amplifying signal with through normalization and the output signal of synchronous amplifier 120 subtract each other, to obtain difference between them as error signal.The output of subtracter 1340 is connected with equalizer 110.That is, the output of subtracter 1340, i.e. error signal, be transported to equalizer 110 as control signal.Equalizer 110 receives and needs amplifying signal and the error signal as control signal, and according to error signal, based on predetermined self adaptation standard, to needing amplifying signal to carry out equilibrium, and the signal through equilibrium is supplied to the input of amplifier 120.Preferably, this self adaptation standard comprises the minimum quadratic power algorithm of least-mean-square error algorithm, least mean square algorithm and recurrence.
According to one embodiment of present invention, equalizer 110 can be made up of a series of tap filter.Particularly, equalizer 110 can use self adaptation standard based on this error signal, such as the minimum quadratic power algorithm of least-mean-square error algorithm, least mean square algorithm and recurrence etc. regulate each term coefficient of tap filter, to make the frequency response substantially constant of equalizer 110 and amplifier 120, improve the comprehensive response amplitude/amplitude characteristic of equalizer 110 and amplifier 120, the linearisation degree of amplitude/phase characteristic, thus reduction error signal, realize the methods of digital predistortion of the distortion to amplifier 120.
What this device 100 was implemented is the process iterated, and achieves renewal and the adaptivity of real-time methods of digital predistortion.Meanwhile, according to different requirements, also can the item number of conditioning equaliser.Through iteration after a while, this device 100 automatically can realize the methods of digital predistortion of the distortion to any amplifier and/or non-linear components.In addition, this device 100 calculates relatively simple, can integrate, such as, be integrated in on-site programmable gate array FPGA (Field-ProgrammableGateArray), thus simplify the complexity of device, reduce cost.
Fig. 2 and Fig. 3 shows the exemplary frequency spectrum of the signal on subtracter 1,340 two inputs, and the unit of its ordinate is dB, and the unit of abscissa is Hz.
Fig. 4 shows the exemplary frequency spectrum of error signal, the spectral difference of the signal namely in Fig. 2 and Fig. 3 on subtracter 1,340 two inputs, and the unit of its ordinate is dB, and the unit of abscissa is Hz.
As seen from the figure, Fig. 2 shows the frequency spectrum needing amplifying signal through buffering, and Fig. 3 shows after amplifier process, has the frequency spectrum of the signal of various distortion.
Although what subtracter 1340 was implemented is subtracting each other of signal in time domain, because Fourier transform is linear, so the error signal drawn by subtracter 1340 can the error of two input signals of subtracter 1340 on perfect representation frequency domain.On the other hand; memory effect and intermodulation distortion are the build-in attributes of amplifier; change slowly in time; and be the element on frequency domain; so the frequency band be applicable to only need be selected, with this to be included on interested frequency band likely by the various distortions of the caused amplifier such as memory effect and intermodulation distortion.Therefore, the error signal drawn by subtracter 1340 can represent the various distortions by the caused amplifier such as memory effect and intermodulation distortion.Thus, the present invention is in fact the methods of digital predistortion realizing the distortion to amplifier based on spectral substraction.By the method, can be avoided and adopt item number limited due to Volterra progression in the scheme of Volterra progression and the inexactness that causes, and implement relatively simple and easy.
It should be noted that, above-described embodiment is only exemplary, but not limitation of the present invention.Any technical scheme not deviating from spirit of the present invention all should fall within protection scope of the present invention, and this comprises the different technologies feature that use occurs in different embodiments, and installation method can combine, to obtain beneficial effect.In addition, any Reference numeral in claim should be considered as the claim involved by restriction; " comprise " word and do not get rid of device unlisted in other claims or specification or step; " one " before device does not get rid of the existence of multiple such device; In the equipment comprising multiple device, the one or more function in the plurality of device can be realized by same hardware or software module.

Claims (12)

1., for a digital pre-distorter equipment for the input of predistortion amplifier, described digital pre-distorter equipment comprises:
Error generation unit, for:
-acquisition needs amplifying signal, obtains the output signal of described amplifier; And
-producing error signal according to the described described output signal of amplifying signal and described amplifier that needs, wherein said error signal represents the described error needed between amplifying signal and the described output signal of described amplifier on frequency domain; And equalizer, it is coupled to described error generation unit communicatedly, for:
-based on described error signal and predetermined self adaptation standard, equilibrium is carried out to the described amplifying signal that needs; And
-export signal through equilibrium to described amplifier.
2. digital pre-distorter equipment according to claim 1, is characterized in that, described error generation unit comprises:
Normalization unit, for the described output signal normalization by described amplifier;
Lock unit, for by synchronous with the input signal of described amplifier for the described output signal of described amplifier;
Buffer, for cushioning predetermined time section by the described amplifying signal that needs; And
Subtracter, for obtaining signal through buffering with the difference through normalization and between synchronous signal to produce described error signal.
3. digital pre-distorter equipment according to claim 2, it is characterized in that, described predetermined time section equal the described amplifying signal that needs through described equalizer, described amplifier, described normalization unit, described lock unit and the time arrived needed for described subtracter.
4. digital pre-distorter equipment according to claim 2, is characterized in that, described lock unit comprises: thick lock unit, smart lock unit and Phase synchronization unit.
5. digital pre-distorter equipment according to any one of claim 1 to 4, is characterized in that, described equalizer, described error generation unit integrate.
6. digital pre-distorter equipment according to claim 1, is characterized in that, described self adaptation standard is one of the following: least-mean-square error algorithm; Least mean square algorithm; And the minimum quadratic power algorithm of recurrence.
7., for a digital pre-distorter correction method for the input of predistortion amplifier, said method comprising the steps of:
A. receive and need amplifying signal;
B. the output signal of described amplifier is obtained;
C. produce error signal according to the described described output signal of amplifying signal and described amplifier that needs, wherein said error signal represents the described error needed between amplifying signal and the described output signal of described amplifier on frequency domain;
D. according to described error signal, based on predetermined self adaptation standard, carry out equilibrium to the described amplifying signal that needs; And
E. signal through equilibrium is exported to be supplied to described amplifier.
8. method according to claim 7, is characterized in that, described step C comprises further:
C1. by the described output signal normalization of described amplifier;
C2. by synchronous with the input signal of described amplifier for the described output signal of described amplifier;
C3. the described amplifying signal that needs is cushioned predetermined time section; And
C4. signal through buffering is obtained with the difference through normalization and between synchronous signal to produce described error signal.
9. method according to claim 8, it is characterized in that, described predetermined time section equal the described amplifying signal that needs through described step D process, through described amplifier, through described step C1 process and through the time sum needed for described step C2 process.
10. method according to claim 8, is characterized in that, described step C2 also comprises: thick synchronous, smart synchronous and Phase synchronization.
11. methods according to any one of claim 7 to 10, it is characterized in that, described self adaptation standard is one of the following: least-mean-square error algorithm; Least mean square algorithm; And the minimum quadratic power algorithm of recurrence.
12. 1 kinds of amplification modules with digital pre-distorter orthofunction, described module comprises:
Digital pre-distorter equipment according to any one of claim 1-6; And described amplifier.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1747460A (en) * 2004-09-10 2006-03-15 日立通讯技术株式会社 Delay locked loop circuit, digital predistortion type transmitter using same, and wireless base station
CN101316250A (en) * 2007-05-31 2008-12-03 大唐移动通信设备有限公司 Digital predistortion apparatus and method for multi-antenna system
CN101656512A (en) * 2008-08-18 2010-02-24 富士通株式会社 Device and method for measuring nonlinearity of power amplifier and predistortion compensation device
CN101695061A (en) * 2009-09-30 2010-04-14 西安电子科技大学 Linearization device and linearization method in broad band multicarrier communication system
CN101286963B (en) * 2008-05-30 2010-09-08 北京北方烽火科技有限公司 Wideband adaptive digital predistortion engine apparatus based on programmable device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1747460A (en) * 2004-09-10 2006-03-15 日立通讯技术株式会社 Delay locked loop circuit, digital predistortion type transmitter using same, and wireless base station
CN101316250A (en) * 2007-05-31 2008-12-03 大唐移动通信设备有限公司 Digital predistortion apparatus and method for multi-antenna system
CN101286963B (en) * 2008-05-30 2010-09-08 北京北方烽火科技有限公司 Wideband adaptive digital predistortion engine apparatus based on programmable device
CN101656512A (en) * 2008-08-18 2010-02-24 富士通株式会社 Device and method for measuring nonlinearity of power amplifier and predistortion compensation device
CN101695061A (en) * 2009-09-30 2010-04-14 西安电子科技大学 Linearization device and linearization method in broad band multicarrier communication system

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