Summary of the invention
The technical problem to be solved in the present invention is to be easily subject to Electro-static Driven Comb interference because bus voltage is low, causes that data cannot effectively be transferred to receiving terminal, it is provided that a kind of method of bus transfer that can reduce Electro-static Driven Comb interference and system.
The present invention solves above-mentioned technical problem by following technical proposals:
A kind of method that the invention provides bus transfer, bus two ends are connected to a FPDP and a receiving terminal, and this FPDP and processes device and is connected, and the method includes:
S1: this process device sends an information by this FPDP;
S2: judge that this information is data or an instruction, if data, then perform step S3, if instruction, then perform step S4;
S3: the difference between the upper limit of bus voltage and lower limit less than 0.3V in the way of these data are transmitted to this receiving terminal from this FPDP, and return step S1;
S4: the difference between the upper limit of bus voltage and lower limit more than 1.1V in the way of this instruction is transmitted to this receiving terminal from this FPDP, and return step S1。
Data and instruction are very different, and are data or instruction can select suitable transmission means by what judge to send so that information transmission is more efficient.In prior art, after these data are from the transmission of this FPDP to this receiving terminal, it will continue to keep step S3In transmission means, in this transmission means, because bus voltage is relatively low, the instruction of subsequent transmission is easily subject to the interference of Electro-static Driven Comb, therefore the present invention send instruction time transmission means can be switched over, namely transmission instruction time with step S4In transmission means carry out, reduced the interference of the Electro-static Driven Comb that instruction is subject in transmitting procedure by the bigger bus voltage of difference between bound.
It is preferred that step S3For:
S31: the difference between the upper limit of this bus voltage and lower limit is adjusted to less than 0.3V;
S32: the pattern of information is received when being adjusted to by this receiving terminal for the difference between the upper limit and lower limit of bus voltage less than 0.3V from this FPDP;
S33: these data are transmitted to this receiving terminal from this FPDP, and returns step S1;
Step S4For:
S41: the pattern of information is received when being adjusted to by this receiving terminal for the difference between the upper limit and lower limit of bus voltage more than 1.1V from this FPDP;
S42: the difference between the upper limit of this bus voltage and lower limit is adjusted to more than 1.1V;
S43: this instruction is transmitted to this receiving terminal from this FPDP, and returns step S1。
Step S31And step S32Middle first the difference between the upper limit of bus voltage and lower limit is adjusted to less than 0.3V, then just carries out mode adjustment, be so obtained in that good transmission speed.
Step S41And step S42Middle advanced row mode adjustment, is then adjusted to more than 1.1V by the difference between the upper limit of bus voltage and lower limit, it is possible to make lower power consumption again.
It is preferred that step S3In bus voltage the upper limit and lower limit between difference be less than or equal to 0.2V, step S4In bus voltage the upper limit and lower limit between difference be more than or equal to 1.2V.
It is preferred that in step S3In this receiving terminal be the upper limit of HS pattern and this bus voltage be 0.3V, the lower limit of this bus voltage is 0.1V, in step S4In this receiving terminal be the upper limit of LP pattern and this bus voltage be 1.2V, the lower limit of this bus voltage is 0V, and when not transmitting information from this FPDP to this receiving terminal, this bus voltage is 1.2V.
It is preferred that this bus is MIPI bus, this FPDP is MIPI interface.
The bus and the FPDP that select other are equally applicable to the present invention.
Present invention also offers the system of a kind of bus transfer, it is characterized in that, the system of this bus transfer includes a FPDP, a bus, a receiving terminal and a process device, and this FPDP is connected with this receiving terminal by this bus, and this FPDP is also connected with this process device;
This process device is for sending an information by this FPDP, and judge that this information is data or an instruction, if data, then the difference between the upper limit of bus voltage and lower limit less than 0.3V in the way of by these data from the transmission of this FPDP to this receiving terminal;If instruction, then the difference between the upper limit of bus voltage and lower limit more than 1.1V in the way of by this instruction from the transmission of this FPDP to this receiving terminal.
Preferably, this process device is data or an instruction for judging this information sent, if this information is data, then the difference between the upper limit of this bus voltage and lower limit is adjusted to less than 0.3V, receive the pattern of information from this FPDP when being adjusted to by this receiving terminal for the difference between the upper limit and lower limit of bus voltage less than 0.3V, and by these data from the output of this FPDP to this receiving terminal;If this information is instruction, receive the pattern of information from this FPDP when being then adjusted to by this receiving terminal for the difference between the upper limit and lower limit of bus voltage more than 1.1V, difference between the upper limit of this bus voltage and lower limit is adjusted to more than 1.1V, and by this instruction from the transmission of this FPDP to this receiving terminal.
It is preferred that this FPDP sends the difference between the upper limit and the lower limit of this bus voltage during these data for less than or equal to 0.2V, it is more than or equal to 1.2V that this FPDP sends the difference between the upper limit and the lower limit of this bus voltage during this instruction.
It is preferred that when this FPDP sends these data, this receiving terminal is HS pattern, and under this HS pattern, the upper limit of this bus voltage is 0.3V, and the lower limit of this bus voltage is 0.1V;When this FPDP sends this instruction, this receiving terminal is LP pattern, and under this LP pattern, the upper limit of this bus voltage is 1.2V, and the lower limit of this bus voltage is 0V, and when not transmitting information from this FPDP to this receiving terminal, this bus voltage is 1.2V.
It is preferred that this bus is MIPI bus, this FPDP is MIPI interface;And/or this receiving terminal is LCM.
This span of " less than 0.3V " and " less than or equal to 0.2V " substantially has a lower limit, data can be transmitted to the demand of this receiving terminal from this FPDP meeting, those skilled in the art know that and how reasonably to determine this lower limit, for instance this difference obviously can not take negative.
The span of " more than 1.1V " and " more than or equal to 1.2V " substantially has a upper limit, instruction can be transmitted to the demand of this receiving terminal from this FPDP meeting, those skilled in the art know that and how reasonably to determine this upper limit, considering for power consumption, circuit rated voltage and supply voltage etc., this span obviously has a rational upper limit.
Meeting on the basis of this area general knowledge, above-mentioned each optimum condition, can combination in any, obtain the preferred embodiments of the invention.
The actively progressive effect of the present invention is in that: decreases bus and is subject to the probability of Electro-static Driven Comb interference so that information can effectively be transferred to receiving terminal.
Embodiment 1
As in figure 2 it is shown, there is a bus 3, these bus 3 two ends are connected to FPDP 2 and a receiving terminal 4, and this FPDP 2 processes device 1 with one and is connected.In the present embodiment, this bus is a MIPI bus, this FPDP is a MIPI interface, this receiving terminal is a LCM, this process device is a central processing unit, and this central processing unit sends information by this MIPI interface, and this MIPI interface is connected to this MIPI bus, the other end of this MIPI bus connects this LCM, and this central processing unit transmits information to this LCM by this MIPI interface and this MIPI bus.As it is shown in figure 1, the method for this bus transfer includes in the present embodiment:
Step 101: this central processing unit sends information by this MIPI interface;
Step 102: this central processing unit is before sending the information, it is necessary to the type of this information is judged, if this information is data, then performs step 1031, if this information is instruction, then performs step 1041;
Step 1031: the upper limit of the voltage of this MIPI bus is adjusted to 0.3V by this central processing unit, the lower limit of the voltage of this MIPI bus is adjusted to 0.1V;
Namely the difference between the upper limit and the lower limit of the voltage of this MIPI bus is 0.2V.
Step 1032: this LCM is adjusted to HS pattern by this central processing unit;
Step 1033: these data are transmitted to this LCM from this MIPI interface, and returns step 101.
Step 1041: this LCM is adjusted to LP pattern by this central processing unit;
Step 1042: the upper limit of the voltage of this MIPI bus is adjusted to 1.2V by this central processing unit, the lower limit of this MIPI bus voltage is adjusted to 0V;
Namely the difference between the upper limit and the lower limit of the voltage of this MIPI bus is 1.2V.
Step 1043: this instruction is transmitted to this LCM from this MIPI interface, and returns step 101.
In the present embodiment, when the information needing transmission is data, the upper limit of bus voltage and lower limit be respectively preferably 0.3V and 0.1V be because compared to other value can obtain transmission speed and capacity of resisting disturbance in combination with preferably transmission.
In the present embodiment, when the information needing transmission is instruction, the upper and lower bound of the voltage of this MIPI bus is respectively preferably 1.2V and 0V and is because the integration capability of anti-interference and low-power consumption now preferably.
Although in the present embodiment, for the purpose realizing preferably anti-static electrictity release interference, the setting procedure of mode of operation and bus voltage is according to such order, but those skilled in the art it is understood that, such setting order should not be considered as limitation of the present invention, adopts other setting order can realize equally reducing Electro-static Driven Comb interference.
By using static gun that mobile terminal is shot at, owing to the liquid crystal display screen of mobile terminal is connected with this LCM, and under the shooting of static gun, owing to liquid crystal display screen area is bigger, the Electro-static Driven Comb impact being subject to is also corresponding bigger, this LCM and this MIPI bus being connected with this LCM can be impacted by the Electro-static Driven Comb that liquid crystal display screen receives, when being provided without the present invention, when static gun is set to this mobile terminal is shot at by the state that atmospherical discharges is 8KV, this MIPI bus will be interfered and cause that instruction cannot correctly be transmitted.After adopting the present invention, static gun needs this MIPI bus just to be made to be interfered when being set to this mobile terminal is shot at by the state that atmospherical discharges is 12KV, it is seen that after adopting the present invention, antistatic effect is greatly improved.