CN103048647A

CN103048647A - High-frequency ground wave radar multichannel receiver

Info

Publication number: CN103048647A
Application number: CN2012105859493A
Authority: CN
Inventors: 陆小虎; 施春荣; 周涛; 邵世卿; 谢向前
Original assignee: CSIC Pride Nanjing Atmospheric and Oceanic Information System Co Ltd
Current assignee: CSIC Pride Nanjing Atmospheric and Oceanic Information System Co Ltd
Priority date: 2012-12-28
Filing date: 2012-12-28
Publication date: 2013-04-17

Abstract

The invention discloses a high-frequency ground wave radar multichannel receiver and belongs to the field of a radar receiver. The receiver comprises n groups of receiving channels and a FPGA (field programmable gate array) chip, wherein each group of receiving channels respectively receive signals through antennas, and the signals sequentially pass through a corresponding high-speed electronic switch, a band-pass filter and a serial LVDS (low voltage differential signaling) interface analog-digital conversion chip and then enter the FPGA chip for digital signal processing. The high-frequency ground wave radar multichannel receiver has the advantages that the adopted analog-digital conversion chip is integrated with a prepositive low-noise amplifier, a variable gain amplifier, an anti-aliasing filter and an analog-digital converter, in addition, the output is differential LVDS serial output, the complexity of the circuit design is greatly reduced, and the reliability and the stability of the receiver are improved.

Description

A kind of high-frequency ground wave radar multichannel receiver

Technical field

The present invention relates to a kind of radar receiver, relate in particular to the large array multiple-unit of a kind of high-frequency ground wave radar receiver, belong to the radar receiver field.

Background technology

Existing high-frequency ground wave radar receiver mostly is 8 passages, and it can only be satisfied with portable ground wave radar and the work of little array ground wave radar, and the limitation of number of channels has limited the development of the large array multiple-unit of high-frequency ground wave radar greatly.On Effect on Detecting, portable ground wave radar can only the detection flows field information, and the effect of the flow field that little array ground wave radar (such as 8 arrays) is surveyed, wave and wind field also is barely satisfactory.Target detection is the direction of in the future high-frequency ground wave radar research, and little array earthwave radar cell short slab few, that the radar data amount is few also exposes undoubtedly.Multichannel digitized radar receiver for wave radar system greatly in array provide may, and use the parallel not high ADC(modulus conversion chip of integrated level) very complex on circuit design, its stability and fiduciary level are also not ideal enough.

Adopt the not high designed multichannel receiver of ADC of integrated level, need pre-low-noise amplifier, controllable gain amplifier and frequency overlapped-resistable filter at the ADC front end, this Analog Circuit Design is complicated, and can affect the isolation of passage, signal digital is taked parallel output after quantizing, the AD that 24 passages are 16 needs 384 IO mouths and 384 PCB cablings at least, and the complexity of PCB design is well imagined.

Summary of the invention

The object of the invention is to: propose the simple high-frequency ground wave radar multichannel receiver of a kind of circuit design, to improve stability and fiduciary level.

This receiver comprises n winding receipts passage and fpga chip, n is natural number, every winding is received passage and is included antenna, high speed electronic switch, bandpass filter and serial LVDS interface module conversion chip, the reception signal of described antenna is successively by entering fpga chip behind corresponding high speed electronic switch, bandpass filter and the serial LVDS interface module conversion chip, to carry out digital signal processing.

Pre-low-noise amplifier, variable gain amplifier, frequency overlapped-resistable filter and analog to digital converter that described serial LVDS interface module conversion chip is integrated connects successively, the output terminal of described analog to digital converter is difference LVDS interface.

Described fpga chip has adopted the XilinxV6 Series FPGA chip of LVDS interface integrated.

Technique effect:

1, adopt high integration serial LVDS interface module conversion chip, simplified the mimic channel of head end complex, the IO mouth resource that needs reduces in a large number, greatly reduces the complicacy of circuit design, has improved stability and the fiduciary level of receiver.

2, because circuit design is simple, the sensitivity of receiver, dynamic range, signal to noise ratio (S/N ratio) and channel isolation all have obvious lifting.

Description of drawings

Fig. 1 is structured flowchart of the present invention.

Fig. 2 is string and conversion realization schematic diagram.

Embodiment

Below the invention will be further described.

The structure of high-frequency ground wave radar multichannel receiver of the present invention as shown in Figure 1, comprise n winding receipts passage and fpga chip, n is natural number, shown 3 windings receipts passage among the figure, every winding is received passage and is included antenna, high speed electronic switch, bandpass filter and serial LVDS interface module conversion chip, the reception signal of described antenna is successively by entering fpga chip behind corresponding high speed electronic switch, bandpass filter and the serial LVDS interface module conversion chip, to carry out digital signal processing.

High-frequency ground wave radar is the radar of FMICW system, and high speed electronic switch is closed receiving cable during the radar transmitter emission, is not opening receiving cable reception echoed signal during the emission.The passband of analog bandpass filtering device is 2MHz, and it is used for the interference that the inhibition zone external signal brings to receiving system.Serial LVDS interface module conversion chip adopts the high integration modulus conversion chip, 8 passage pre-low-noise amplifiers (LNA), variable gain amplifier (VGA), frequency overlapped-resistable filter (AAF) and analog to digital converter that it is integrated connects successively, the output terminal of analog to digital converter is difference LVDS interface, LNA and VGA are used for adjusting the change in gain of signalling channel, to improve the linear dynamic range of system sensitivity and Adjustment System.The differential signal input is partly adopted in the analog input of this serial LVDS interface module conversion chip, disturbs to reduce, and digital output is difference LVDS serial output, and speed can reach 600M/s.Comprise 8 passages because passage is received in every winding, adopt 8 antenna reception echoed signals so passage is received in every winding.Fpga chip has adopted the XilinxV6 series ultra large scale FPGA chip of LVDS interface integrated, this chip is with a large amount of DSP resources, fpga chip with the LVDS differential signal convert to single-ended after, go here and there and change, and signal carried out mixing, filtering extraction, reach again host computer.

The sampling clock of serial LVDS interface module conversion chip is 50MHz, and this chip is exported three road signals, is respectively serial data signal, data synchronizing signal and frame synchronizing signal.The speed of serial data signal and data synchronizing signal can reach 600M/s, and PCB must consider impedance matching during design, and three road signals of chip output also will keep isometric as far as possible.This chip near high speed electronic switch and the bandpass filter of front end, to reduce the length of mimic channel, reduces interchannel phase mutual interference as far as possible.String among the present invention and conversion are as shown in Figure 2, three road differential signals convert single-ended signal to by the IBUFDS among the FPGA respectively, enter again IODELAY, IODELAY can adjust the phase place of signal accurately, three tunnel Signal Regulation are become synchronously, convert serial data to parallel data by ISERDESE at last.

Adopt two kinds of 24 designed passage radars of different ADC to receive the extension set characterisitic parameter as shown in table 1.Be not difficult to find out, adopt the designed reception extension set circuit of parallel interface ADC complicated, the pcb board number of plies reaches 16 layers, and the IO resource of the FPGA that needs is also quite a lot of.And the reception extension set of employing serial LVDS interface ADC, because the ADC integrated level is high, circuit design is simply too much, so the indexs such as the sensitivity that receives, dynamic range, channel isolation are all significantly better than the former.

Table 1:24 passage ground wave radar receiver characterisitic parameter

The ADC type of service	Characteristic	IO mouth quantity	Data line quantity	The PCB number of plies	Signal extension set performance index
						Serial ADC	Integrated level is high	60	60	8	Excellent
Parallel ADC	Only comprise digital-to-analog conversion	384	384	16	Generally

Claims

1. high-frequency ground wave radar multichannel receiver, it is characterized in that: comprise n winding receipts passage and fpga chip, n is natural number, every winding is received passage and is included antenna, high speed electronic switch, bandpass filter and serial LVDS interface module conversion chip, the reception signal of described antenna is successively by entering fpga chip behind corresponding high speed electronic switch, bandpass filter and the serial LVDS interface module conversion chip, to carry out digital signal processing.

2. high-frequency ground wave radar multichannel receiver according to claim 1, it is characterized in that: pre-low-noise amplifier, variable gain amplifier, frequency overlapped-resistable filter and analog to digital converter that described serial LVDS interface module conversion chip is integrated connects successively, the output terminal of described analog to digital converter is difference LVDS interface.

3. high-frequency ground wave radar multichannel receiver according to claim 1 is characterized in that: described fpga chip has adopted the XilinxV6 Series FPGA chip of LVDS interface integrated.