CN103036274A - Battery charge modulator with boost capability - Google Patents
Battery charge modulator with boost capability Download PDFInfo
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- CN103036274A CN103036274A CN2012103754961A CN201210375496A CN103036274A CN 103036274 A CN103036274 A CN 103036274A CN 2012103754961 A CN2012103754961 A CN 2012103754961A CN 201210375496 A CN201210375496 A CN 201210375496A CN 103036274 A CN103036274 A CN 103036274A
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Abstract
A system and method for controlling a converter of a power stage receiving an adapter current for providing current to a load. The converter is operative in a buck mode for charging a battery and in a boost mode for discharging the battery to the load to supplement adapter current. The adapter current is compared with a predetermined level to develop a control signal, and at least one pulse control signal is developed based on the control signal and used to control the modulator. The modulator operates the converter in the buck mode when the adapter current up to the predetermined level, and operates the converter in the boost mode when the adapter current exceeds the predetermined level. The battery current may also be monitored to adjust the control signal to limit battery charge or discharge current in both modes.
Description
The cross reference of related application
The application requires the U.S. Provisional Application S/N61/544 of submission on October 6th, 2011, the U.S. Provisional Application S/N61/544 that on October 6th, 044 and 2011 submitted to, 058 rights and interests, the full content of these applications is intentional incorporated herein by reference with purpose for institute.
Description of drawings
Can understand better benefit of the present invention, feature and advantage with reference to following description and accompanying drawing, in the accompanying drawings:
Fig. 1 is the simplified block diagram according to the electronic equipment that comprises battery charging modulator of embodiment of the invention realization;
Fig. 2 is the more detailed block diagram according to the battery charging modulator of Fig. 1 of one embodiment of the invention realization;
Fig. 3 describes signals selected simplification curve chart according to an embodiment, is used for the operation of the battery charging modulator of key diagram 1; And
Fig. 4 describes the voltage of adapter electric current, battery charge, ICOMP and the curve chart of BOOST signal according to an embodiment, is used for the explanation transient response.
Embodiment
Those of ordinary skills provide following description so that can implement and utilize the present invention who provides under the background of application-specific and demand thereof.Yet the multiple modification of preferred embodiment will be clearly to those of ordinary skills, and the General Principle that this paper can be limited is applied to other embodiment.Therefore, the present invention is not intended to be subject to the specific embodiment that illustrates and describe herein, and should be given the widest scope consistent with principle disclosed herein and novel feature.
In the battery charger of routine, adapter is provided for the power of battery charger and system load.When system load increased, charging current reduced, so that the adapter electric current is no more than its restriction.In case charging current is reduced to 0, any additional system load meeting causes adapter to surpass its restriction.
Some configuration allows system load to draw the power more much bigger than the maximum rated power of adapter.This sustainable a period of time (for example, some second) is until surpass rated temperature or until finish the work.As an example, Intel company introduces its Sandy Bridge and Ivy Bridge CPU (CPU) with " turbine (turbo) " pattern, this allows CPU temporarily to surpass the rated power of adapter, and this situation is sustainable until CPU is overheated or finish its task.
The situation that surpasses the rated power of adapter causes safety concerns.For fear of the yoke that are subject to the adapter overcurrent situations, battery as herein described charging modulator is with the boost mode backward operation, with from battery to the system load release current.In the time of on system load is increased to the adapter power restriction, battery discharge current increases to prevent that adapter from surpassing its maximum current limit.When detection is boosted and how to be controlled transducer is theme of the present disclosure.In addition, provide the battery discharge current restriction, this restriction is the function of charge-current limit.
Fig. 1 is the simplified block diagram according to the electronic equipment 109 that comprises battery charging modulator 111 of embodiment of the invention realization.AC line voltage shown in 101 places is offered the input of AC adapter 103, this AC adapter 103 becomes DC adaptor voltages VADP with the AC voltage transitions.VADP is shown is provided for suitable connector 105, this connector 105 and compatible connector 107 couplings that are set to electronic equipment 109.In this way, VADP is provided the input of the modulator 111 that charges the battery, and this battery charging modulator 111 offers system load 113 with output voltage VO UT.Rechargeable battery 119 provides cell voltage VBAT another input of the modulator 111 that charges the battery, for form VOUT when adapter 103 is unavailable.Battery 119 and system load 113 are illustrated as over the ground (GND) and carry out reference, wherein should understand the general any suitable plus or minus voltage level of expression of GND and/or a plurality of earthing type, such as power ground connection, signal ground, analogue ground, chassis earth etc.
Fig. 2 is the more detailed block diagram according to the battery charging modulator 111 of one embodiment of the invention realization.Battery charging modulator 111 comprises controller 200 and power stage 204, and this power stage 204 comprises or otherwise be coupled to battery 119, and this battery 119 can be removable.Power stage 204 comprises by the L shaped transducer that becomes of electronic switch Q1 and Q2 and inductor, it can be operated under " step-down " pattern being used to and from the VADP of adapter 103 battery 119 be charged, with under " boosting " pattern with the voltage of rising battery 119, thereby make battery 119 to system load 113 discharges.
VADP is offered the end of sense resistor RSA, this end of this sense resistor RSA is coupled to the node CSIP of the input that is configured to controller 200.In one embodiment, controller 200 realizes that wherein I/O (I/O) node (illustrating with square symbols) is implemented as the pin of IC, but also can conceive different implementations on integrated circuit (IC).Unless point out in addition in this article, otherwise with identical title reference node and pin.The other end of RSA is coupled to the node CSIN as another pin of controller 200.Although not shown, can existence and the filter element (for example, resistance, electric capacity or its combination) of CSIN and CSIP pin series coupled.
Node CSIN also as the output node of (or otherwise being coupled to) battery charging modulator 111, forms the output voltage VO UT that offers system load 113.Node CSIN is coupled to the drain electrode of electronic switch Q1, the drain electrode that its source electrode is coupled to electronic switch Q2 at phase (PHASE) node.The source-coupled of Q2 is to GND.The PHASE node is configured to the pin of controller 200, and it is coupled to the end of inductor L, and the other end of this inductor L is coupled to node CSOP, and this node CSOP is coupled to the end of another sense resistor RSB.The other end of RSB is coupled to node CSON, and this node CSON further is coupled to the plus end of battery 119, and its negative terminal is coupled to GND.CSOP and CSON are configured to the pin of controller 200, and CSOP forms cell voltage VBAT.Although not shown, can existence and the filter element (for example, resistance, electric capacity or its combination) of CSON and CSOP pin series coupled.Can be coupling between VBAT and the VOUT such as switching devices such as transistor devices, when adapter 103 disconnects, the power of battery is offered system load 113.
In an illustrated embodiment, electronic switch Q1 and Q2 can be embodied as n channel metal oxide semiconductor field effect transistor known to those skilled in the art (MOSFET) separately.The electronic switching device of other type be can use, the FET etc. of other type and the transistor of other type comprised, such as bipolar junction transistor (BJT) or igbt (IGBT) etc.
Transducer (switch Q1 and Q2 and inductor L) and sense resistor RSB jointly realize the power stage 204 of battery charging modulator 111.The operation of power stage 204 is by controller 200 controls, as further describing herein.When adapter 103 connected, adapter electric current I ADP flow through sense resistor RSA.Charging current ICHG flows through sense resistor RSB, is indicated to the charging current of battery 119.As described further below, when battery 119 also provided power (discharge), when being in boost mode, ICHG also indicated discharging current.Load current ILD is illustrated as flowing out power stage 204, and load current is offered system load 113.
In one embodiment, the voltage VBAT of battery 119 is between the scope of approximately 9 to 13 volts (V), and adaptor voltages VADP is about 19V.The CSIN node is coupled to " system bus " node, forms the approximately VOUT of 19V.In an illustrated embodiment, when being that timing power stage 204 is operated in the step-down controller pattern (or decompression mode) to battery 119 charging and ICHG, and be operated in the boost converter pattern (or boost mode) cell voltage is boosted to the adaptor voltages level when battery 119 discharges and ICHG power stage 204 when bearing.Negative ICHG(-ICHG) also can be called as positive discharging current IDCHG.
CSIP and CSIN node/pin are offered respectively noninverting or just (+) and anti-phase or negative (-) input of the current sense amplifier 201 in the controller 200, be used for sensing adapter electric current I ADP.The output of sensing amplifier 201 forms adapter current feedback (ACFB) voltage, and this voltage is provided for the upper end input of intersection multiplexer (CROSS MUX) 203.Adapter current reference (ACREF) voltage is provided for the lower end input of CROSS MUX203, and CROSS MUX203 reception control signal BOOST(boosts).The upper right output of CROSS MUX203 is provided for the negative input of adapter current error amplifier 205, and the output of the bottom right of CROSS MUX203 is provided for the positive input of error amplifier 205.The output of error amplifier 205 is provided for minimum current and selects MUX(IMIN MUX) input of 207.
CSOP and CSON node are supplied to the top and bottom input by another CROSS MUX209 of signal BOOST control.The top and bottom output of CROSS MUX209 is supplied to positive input and the negative input of charging sensing amplifier 211, is used for sensing charging current ICHG.The output of sensing amplifier 211 forms charging current feedback (CCFB) voltage, and this voltage is provided for the negative input of battery charging current error amplifier 215.Charging current reference voltage CCREF is provided for the upper end input of another CROSS MUX213, and discharging current reference voltage DCREF is provided for the lower end input of CROSS MUX213.The upper end output of CROSS MUX213 is provided for the positive input of error amplifier 215.The output of error amplifier 215 is provided for another input of IMIN MUX207.Node ICOMP is coupled in the output of IMIN MUX207, and this node ICOMP further is coupled to compensation condenser C1, and this compensation condenser C1 is coupling between ICOMP and the GND.In an illustrated embodiment, C1 is arranged on the outside of controller 200, with the compensation that allows as required to regulate compensation and/or allow other appropriate format.
Error amplifier 205,215, the 217th provides mutual conductance (gm) amplifier of current signal at its output.IMIN MUX207 Select Error amplifier 205 and minimum or " more negative " current level (larger current sink) of 215, and provide electric current I MIN SEL so that capacitor C1 is charged, to form ICOMP voltage at the ICOMP node.If two electric currents just are, then reduced-current is selected as IMIN_SEL; If electric current for just and another for negative, then negative current is selected as IMIN_SEL; If it is negative that two electric currents are, the electric current (more negative) that then has by a relatively large margin is selected as IMIN_SEL.
CSON node sensing cell voltage VBAT and being provided for comprises the resistor R1 that is coupled in series between node CSON and the GND and the resistor divider of R2 in the controller 200.The intermediate node of resistor R1 and R2 forms charging voltage feedback voltage CVFB, and this charging voltage feedback voltage CVFB is provided for the negative input of charging voltage error amplifier 217.Charging voltage reference voltage CVREF is provided for the positive input of error amplifier 217.Node VCOMP is coupled in the output of error amplifier 217, and this node VCOMP further is coupled to and comprises the capacitor C2 that is coupled in series between VCOMP and the GND and the compensating circuit of resistor R3.In an illustrated embodiment, C2 and R3 are arranged on the outside of controller 200, to allow to regulate compensation.
ICOMP and VCOMP node are provided for the corresponding input of VMIN buffer 219, VMIN buffer 219 select lower in ICOMP and the VCOMP voltage level one at its output as COMP voltage.The top and bottom output of CROSS MUX209 also is provided for respectively the positive and negative input of amplifier 221, and this amplifier 221 at one end receives COMP and provides control voltage VCTRL at the other end.If the gain of amplifier 221 is G, then amplifier 221 is used for generating VCTRL=COMP-G (CSOP-CSON).The gain G of amplifier 221 is that relatively low gain is to realize the low gain inner current loops, as further described herein.
VCTRL is provided for the positive input of pulse-width modulation (PWM) comparator 223, and pulse-width modulation (PWM) comparator 223 receives RAMP voltage and forms pwm signal in its output in its another input.Provide RAMP by ramp generator 225, wherein RAMP is shown triangular ramp etc. (but the slope that can contemplate replacement configures).In one embodiment, RAMP is with predetermined clock frequency vibration.In one embodiment, the frequency of RAMP is roughly 400 kilo hertzs (KHz).By comparator 223 RAMP and VCTRL are compared to form PWM.PWM is provided for the upper end input of CROSS MUX225 and the input of synchronous grid controller 229.Synchronous grid controller 229 is coupled to PHASE and GND node (being coupled to power stage 204) and output is offered the lower end input of CROSS MUX225.In one embodiment, grid controller 229 also can be coupled to the drain source voltage (VDS) that the CSIN node is used for sensing Q1 synchronously, is used for realizing under boost mode as required diode emulation.Node UGATE is coupled in the output of the upper end of CROSS MUX225, and this node UGATE is provided for the grid of Q1, and the output of the lower end of CROSS MUX 225 is coupled to node LGATE, and this node LGATE is provided for the grid of Q2.
VCTRL also is provided for the positive input that keeps comparator 227, and this keeps comparator 227 to receive in its negative input and keeps threshold voltage HOLD TH.HOLD TH is set to be lower than the voltage of the minimum levels of RAMP voltage, and this RAMP voltage tiltedly becomes between minimum ramp voltage RAMP VALLEY and peak value ramp voltage RAMP PEAK.HOLD TH is set to be lower than the voltage of RAMP VALLEY scheduled volume, and this scheduled volume generally is selected as being equal to or greater than the expected offset voltage sum of comparator 223 and 227 to guarantee that comparator 227 is to be lower than the threshold voltage switching of comparator 223.Keep the output of comparator 227 that the HOLD that signal HOLD offers latch 231 is inputted.The comparator 233 that boosts receives ACFB and ACREF at its positive and negative input respectively, and has output, signal MODE is offered the IN input of latch 231.Provide the BOOST signal at the Q of latch 231 output.
Quick mode changes circuit 235 and comprises current sense amplifier 237 and 243, comparator 239 and 245 and delay block 241 and 247.CSIP and CSIN node are coupled to respectively in sensing amplifier 237 and 243 the positive and negative input of each.The output of sensing amplifier 237 is provided for the positive input of comparator 239, and this comparator 239 receives ACREF at its negative input end, and provides on the OVER(to the input of delay block 241) signal.The output of delay block 241 is provided for set (S) input of latch 231.The output of sensing amplifier 243 is provided for the negative input of comparator 245, and this comparator 245 receives ACREF at its positive input terminal, and provides under the UNDER(to the input of delay block 247) signal.The output of delay block 247 is provided for replacement (R) input of latch 231.
Each CROSS MUX (203,209,213,225) is to be boosted by BOOST() the identical mode controlled operates.In normal or " step-down " pattern, BOOST is low and each CROSS MUX directly is sent to its output with its input, so that the upper end input is coupled to upper end output and the lower end input is coupled to lower end output.In boost mode, when BOOST is asserted to when high, input by cross-couplings to output, so that lower end output instead is coupled in the upper end input and upper end output instead is coupled in the lower end input.Note, each CROSS MUX (203,209,213,225) can be positioned at other position in corresponding signal path to reverse corresponding signal.
The voltage that (between CSIP and the CSIN node) of indication adapter electric current I ADP striden sense resistor RSA obtain gain (for example gain is 20) by sensing amplifier 201 and with respect to the GND level shift so that ACFB voltage to be provided.When BOOST when low, ACFB and ACREF(adapter current reference) directly pass error amplifier 205 to form the first control current signal.In a similar manner, pilot cell charging current ICHG (between CSOP and the CSON node) voltage of striding sense resistor RSB obtain gain (for example gain is 20) by sensing amplifier 211 and with respect to the GND level shift so that CCFB voltage to be provided.When BOOST when low, CCFB and CCREF(charging current with reference to) be provided for error amplifier 215 to form the second control current signal.Select more negative current level (as previously mentioned) by IMIN MUX207, as the IMIN_SEL by ICOMP node compensation (via capacitor C1).In this way, ask the amplifier of less electric current to be selected as possible control operation.
The cell voltage VBAT that forms at CSON is provided for resitstance voltage divider R1 and R2.Error amplifier 217 is with cell voltage feedback and the reference of CVREF(charging voltage) compare, and the output of error amplifier 217 drives the VCOMP node.
Measure charging current output at CSOP-CSON, and this charging current output arranges the low gain inner current loops to reduce the Q value (de-Q) of power stage 204.As shown, when BOOST when low, CSOP and CSON are provided for amplifier 221 to regulate the VCTRL signal with COMP.In one embodiment, amplifier 221 has relatively low gain (for example, gain is 5).Low voltage wherein deducts the multiple (for example, 5) of charging current magnitude of voltage to form VCTRL from COMP as presenting the COMP of inner current loops among VMIN buffer 219 selection ICOMP and the VCOMP.
VCTRL and RAMP are compared to generate PWM with the switching of Q1 and the Q2 of power ratio control level 204.In decompression mode, when BOOST when low, PWM control UGATE, with the switching of control Q1, and synchronous grid controller 229 control LGATE, to control the switching of Q2.In decompression mode, power stage 204 is as the buck converter operation, because the voltage of VBAT is lower than VADP.At the decompression mode device, when PWM uprised, UGATE was driven to height, and with conducting Q1, and when the PWM step-down, UGATE is driven to low to disconnect Q1.Can realize time lag control (dead time control), so that not simultaneously conducting of Q1 and Q2.In decompression mode, in each PWM cycle period, conducting Q2 after Q1 disconnects.
Be not that switch Q1 and the Q2 that is driven by PWM is called as " synchronously " switch.When at decompression mode but not during boost mode, Q1 is main switch and Q2 is synchro switch.In one embodiment, synchro switch is actuated to dummy diode (diode emulation).Particularly, when the electric current that passes inductor L after the cycle period PWM step-down under decompression mode reaches approximately 0, disconnect for the remainder Q2 of this circulation.Thisly determine in order to make, grid controller 229 compares to determine the drain source voltage (VDS) of Q2 with the voltage of PHASE with GND synchronously, and as they disconnection Q2 when (can with respect to the offset voltage of being scheduled to) about equally.If necessary, CSIN can be offered synchronous grid controller 229 to monitor the VDS of Q1, be operated in the diode emulation during boost mode, to make Q1.
When at boost mode, pwm signal instead drive LGATE take control Q2(in boost mode as main switch) switching and Q1 be synchro switch.In boost mode, battery 119 is by the RSB discharge, and power stage 204 is as boosting type converter work.When discharging current was higher than continuous current mode (CCM)/discontinuous current pattern (DCM) threshold value, Q1 was operated in synchronous mode, and generally switches to the state opposite with Q2.Therefore, when the Q2 conducting, disconnect and vice versa (but according to the time lag control operation, both not simultaneously conductings) at each the PWM cycle period Q1 that is higher than the CCM/DCM threshold value.Yet when discharging current was lower than the CCM/DCM threshold value under boost mode, Q1 remained open, and wherein its body diode becomes and can operate.As understood by those skilled in the art, also have other to be used for the technology of control synchro switch.
Can determine the CCM/DCM threshold value based on inductance L and the frequency of operation (being the frequency of RAMP) of input voltage VADP (at the CSIP place), output voltage VO UT, inductor L.In one embodiment, VADP is relative with the RAMP frequency fixing, so that the CCM/DCM threshold value changes according to VOUT.In another embodiment, it is predetermined that the CCM/DCM threshold value is based on the average level of VOUT.Can select threshold value except the CCM/DCM border according to specific implementation or operating parameter.
When BOOST under boost mode is asserted to when high, the input counter-rotating of error amplifier 205, this causes ICOMP, COMP and VCNTRL to raise.In case VCTRL is higher than HOLD TH and again generates pwm pulse, switch unless changed circuit 235 by quick mode, otherwise the state of BOOST is latched and it can not change until VCTRL is lower than HOLD TH again, below will further be described this.Under boost mode, when system load reduces so that ACFB when just being lower than the ACREF set point, it is low that ACFB is lower than ACREF and the driven decline of VCTRL and MODE.When VCTRL becomes when being lower than HOLD TH, keep comparator 227 that HOLD is dragged down, this drags down HOLD input of latch 231, so that the BOOST step-down is to switch to decompression mode.
In a word, under decompression mode, when BOOST when low, each among the CROSS MUX 203,209,213 and 225 is directly coupled to its output with its input, and power stage 204 is operating as normal decompression mode modulator.In this case, one of ACFB＜ACREF or CCFB＜CCREF drive COMP and VCTRL for higher, and pwm signal drives UGATE and inner current loops is configured to negative feedback.When BOOST uprised for boost mode, each among the CROSS MUX 203,209,213 and 225 to its output, caused power stage 204 with the boost mode operation, so that cell voltage is elevated to the voltage level of VADP its input cross-couplings.In this case, ACFB＜ACREF and CCFB＜CCREF and CVFB＜CVREF drive COMP for lower, and pwm signal drives LGATE, and inner current loops is redeployed as negative feedback.
During in its current limit, under stable state, the adapter control loop is generally regulated ACFB=ACREF in adapters, until battery reaches its discharging current restriction, as described in this article.Yet in the situation of the system load step that relates to the boost mode change, this may be slower, because ICOMP or VCOMP need to discharge VCTRL is pulled to HOLD TH, in order to switch between pattern.Quick mode changes circuit 235 and help to carry out comparatively faster switching between step-down and boost mode.
Scheduled volume is hanged down in the gain of the ratio of gains current sense amplifier 201 of current sense amplifier 237, and comparator 239 compares output and the ACREF of amplifier 237.When at decompression mode, if adapter electric current I ADP increases fast in response to load increases step, so that ACFB is higher than the ACREF respective amount, then comparator 239 switches and OVER is asserted as height.If the duration OVER at delay block 241 remains height at least, then delay block 241 trigger and arrange latch 235 to draw high BOOST to switch to boost mode no matter the state of IN or HOLD.
In one embodiment, the gain of the ratio of gains current sense amplifier 201 of current sense amplifier 237 (for example, gain is 18) is low by approximately 10% so that when ACFB in the delay period higher approximately 10% the time than ACREF, operate and switch to boost mode.In one embodiment, the delay of delay block 241 in the scope of about 100-200 microsecond (μ s) to realize comparatively faster response not in response to glitch generation saltus step.But in arrangement, this delay can be any suitable amount.
Similarly, the high scheduled volume of gain of the ratio of gains current sense amplifier 201 of current sense amplifier 243, and comparator 245 compares output and the ACREF of amplifier 243.When at boost mode, if adapter electric current I ADP reduces to reduce fast in response to load, so that ACFB is lower than the ACREF respective amount, then comparator 245 switches and UNDER is asserted as height.If the duration UNDER at delay block 247 remains height at least, then delay block 247 trigger and reset latch 235 with drag down BOOST to switch back decompression mode the state regardless of IN or HOLD.
In one embodiment, the gain of the ratio of gains current sense amplifier 201 of current sense amplifier 243 (for example, gain is 22) is high by approximately 10% so that when ACFB in the delay period lower approximately 10% the time than ACREF, operate and switch to decompression mode from boost mode.In one embodiment, the delay of delay block 247 be about 100 μ s to realize comparatively faster response not in response to glitch generation saltus step.
Quick mode changes circuit 235 and realizes very fast transformation between step-down and boost operations pattern in response to load transient faster.Delay block 241 and 247 inserts enough delays, switches between step-down and boost mode in response to the moment crest or load transition that does not have the enough duration that can verify switch mode avoiding.Delay block 241 and 247 delay are enough short in to realize than adapter and the faster switching between the pattern of battery control loop.
Reference value A CREF, CCREF, DCREF and CVREF can be fixed on predetermined level.Perhaps, one or more in the reference value can be programmable.In programmable configuration, one or more inside or external programmable device (not shown) provide one or more in the programmable reference value.
Usually the rechargeable battery such as battery 119 is rated as to have and compares different discharging currents from charging current.For example, battery 119 can be rated as the large discharging current of comparing with its charging current.In decompression mode, CROSS MUX213 selects CCREF is offered error amplifier 215, for regulating the maximum charging current level.In boost mode, CROSS MUX213 selects DCREF is offered error amplifier 215, for regulating the maximum discharge current level.If maximum charge is identical with discharging current or roughly the same, then can uses single charging reference, and it is directly offered error amplifier 215, for regulating maximum charge and discharging current level.
Fig. 3 draws load current ILD, adapter electric current (IADP), battery discharge current (ICHG or IDCHG), compensation control voltage VCTRL and BOOST signal with respect to the simplification curve chart of time, and the operation according to the battery charging modulator 111 of an embodiment is shown.That ILD is that (0 ampere or " 0A ") is drawn with respect to zero and tiltedly become with constant rate of speed from 0A and to rise to unlimited current level, IADP draws by the ACFB indication and with respect to ACREF,-ICHG is by the CCFB indication of drawing with respect to 0A between DCREF and CCREF, COMP draws with respect to HOLD TH, and BOOST is binary system or digital value, and it is asserted to low (or logical zero) and it is asserted to height (or logical one) for the boost operations pattern for decompression mode.
The operation of error amplifier 217 is left in the basket or is not shown, supposes that wherein battery 119 is not in its maximal voltage level.Note, when battery 119 was charged fully, amplifier 217 prevented boost mode (or only allowing minimum boost operations), to prevent the further charging of battery 119.Yet, when load attempts to extract the more electric current of electric current that can provide than adapter, can use boost mode, battery 119 discharges are with the compensating load electric current in this case.When battery 119 was not charged fully, loop was controlled between error amplifier 205 and 215.Curve chart describe to offer system load 113 load current ILD, with respect to ACREF and by the adapter electric current I ADP of ACFB indication, with respect to CCREF (decompression mode) and DCREF (boost mode) pass through the negative charge current-ICHG of battery 119, with respect to COMP voltage and the BOOST signal of HOLD TH voltage level.Negative charge current-ICHG also can be called as discharging current (IDCHG).Load current ILD is shown is increased to high value so that control operation to be shown with linear velocity from 0.The variation of supposing ILD in this time is enough slow and not shown or ignore the operation that quick mode changes circuit 235.
At very first time t0, operation is in decompression mode, and wherein load current ILD is low or 0 ampere (A), so that the ACFB of indication adapter electric current I ADP is relatively low.Because ILD is 0 or near 0, whole adapter electric currents flows through RSB with to battery 119 chargings basically.Suppose that battery 119 is not charged fully, and its voltage is fully low and absorb whole charging currents.Therefore, CCFB(charging current feedback) reach or attempt to surpass the CCREF(charging current with reference to), and error amplifier 215 control COMP are to be limited in battery charge its maximum level of being determined by CCREF.Until time t1 subsequently, when ILD increased, ACFB and ILD raise pro rata and keep below simultaneously ACREF after time t0, and error amplifier 215 retentive controls with charge-current limit at the maximum level of being determined by CCREF.Period between time t0 and the t1 is the charge-current limit period.
At time t1, ILD is elevated to ACREF(adapter current feedback) reach or begin to surpass ACREF(adapter current reference) point.ACREF indication maximum adaptation device current level, so that error amplifier 205 begins to attempt to reduce current level, ILD continues to raise after time t1 simultaneously.At whenabouts t1 place, error amplifier 205 bear control with the adapter current limit at the maximum level of being determined by ACREF.Along with ILD continues to raise, error amplifier 205 limit adaptation device current levels begin to reduce so that pass the charging current of battery 119.In this way, charging current begins to reduce (or-ICHG increase), so that more electric current can be used for offering the ILD of system load 113.Period after time t1 begins the adapter current limit period.
After time t1, when ILD continued to increase, IADP kept constant based on ACREF, and-ICHG continuation increase (charging current reduces).The level of VCTRL is reduced to and makes IADP keep the constant level that whole ILD level that system load 113 asks are provided simultaneously.Between time t0 and time t2 subsequently, ILD remains and is lower than maximum adaptation device electric current, and the remaining sum of electric current is provided for battery 119 as charging current.
At time t2 subsequently, ILD reaches maximum adaptation device electric current and charging current becomes the voltage that 0VCTRL is reduced to about HOLD TH.Along with ILD continues to raise, keep comparator 227 that HOLD is switched to low, to discharge the HOLD input of latch 231.ACFB is higher than ACREF and latch 231 switches to assert that BOOST is that height is initiated the boost operations pattern.
Under the boost operations pattern, after time t2, power stage 204 switches to boost mode and battery 119 discharges so that electric current is offered ILD.Along with ILD raises, error amplifier 205 retentive controls with the adapter current limit at the maximum level of being determined by ACREF.Along with ILD continues to raise, error amplifier 205 is regulated COMP and is operated in the boost mode to increase the discharging current level of battery 119 with power ratio control level 204.Therefore, when IADP remained on its maximum level, VCTRL raise along with ILD and raises to increase discharging current-ICHG, thereby balance of current is offered ILD.Adapter current limit period from time t2 is effective to time t3 subsequently, the adapter electric current is maintained its greatest hope level.
At time t3 subsequently, the discharging current of battery 119 reaches the maximum discharge current level of being determined by DCREF.At time t3, the ILD current level reaches the maximum current level of adapter 103 and the discharging current level sum of battery 119.The level of ILD should not attempted to surpass this maximum current level and reach the obvious period.Yet if ILD increases as shown in figure after time t3, error amplifier 215 recovers control to prevent surpassing its maximum level of being indicated by DCREF from the discharging current of battery 119.After time t3, operation enters the discharging current restriction period, and wherein the discharging current level of battery 119 maintains its maximum level that allows.In this way, protection battery 119 is in order to avoid above its maximum rated discharging current level, to protect battery and/or to make the fail safe optimization.
If ILD continues to increase as shown in figure after time t3, the discharging current level of battery 119 is limited, so that additional electric current is provided by adapter 103.Therefore, adapter 103 surpasses its maximum current level.Depend on the configuration of adapter 103, the system bus voltages level of VOUT can begin to descend.Can allow this situation to continue finite time, reach obvious time quantum or the VOUT significantly amount that can not descend as long as adapter 103 is no more than its maximum current level.In one embodiment, can allow ILD to reach the finite time section more than being elevated to both maximum current level of adapter 103 and battery 119.If ILD continues to be higher than the maximum current level of adapter 103 and battery 119, then can detect fault or error condition by the additional (not shown) such as protective circuit, and electronic equipment 109 can cut out to prevent error situation, damage or catastrophe failure.
When ILD reduced, operation was basically similar on oppositely.The extra load electric current that battery 119 complementary adapter do not provide, and discharging current reduces when load current reduces.Be lower than ACREF and VCTRL and drop to when being lower than HOLD TH when ACFB drops to, decompression mode is switched back in operation.As previously mentioned, synchronously grid controller 229 is operated under the diode simulation model Q2, wherein Q2 disconnection when dropping to approximately 0 by the determined inductor current of VDS that monitors Q2.In one embodiment, grid controller 229 is realized minimum Q2 ON time synchronously during decompression mode, even so that the boost current level of less also to be provided during decompression mode.This boost function is used for preventing from too early switching to boost mode under decompression mode, and minimizes or reduce the switching vibration at buck/boost switching point place.In one embodiment, CSIN can be offered synchronous grid controller 229 monitoring the VDS of Q1, with during boost mode according to diode simulation operations Q1.
Fig. 4 describes relative (and/or normalization) adapter electric current I ADP, battery charge (ICHG), VCTRL and BOOST signal in the curve chart of the relation of time, and the transient response according to the battery charging modulator 111 of an embodiment is shown.In this case, system load (for example, ILD) be increased to 5A from 3A, and ACREF is about 4A.The adapter electric current keeps relatively constant when ILD increases, so that drop to HOLD TH in response to VCTRL, charging current is reduced to 0.The BOOST signal uprises to switch to boost mode, and along with ILD continue to increase, VCTRL increases discharging current, as ICHG further become negative be lower than 0 indicated.
Although described in detail the present invention with reference to some preferred version of the present invention, can conceive other possible version and modification.Those of ordinary skills are to be understood that, they can easily utilize disclosed concept and specific embodiment to design or revise other structure as the basis to realize identical purpose of the present invention, and this does not deviate from the spirit and scope of the present invention that are defined by the following claims.
Claims (22)
1. controller, be used for control from the transducer of the power stage of adapter received current, wherein said adapter also provides electric current to load, wherein said transducer is operated in decompression mode so that battery is charged, and be operated in boost mode so that battery to load discharge, wherein said controller comprises:
The current error system, described current error system compares and forms its control signal of indication with adapter electric current and predetermined adapter current level;
Modulator, described modulator forms at least one pulse control signal based on described control signal, and has output, is used for utilizing described at least one pulse control signal control transducer; And
Handover control system, described handover control system is controlled described current error system and described modulator, make transducer be operated in decompression mode when being less than or equal to described predetermined adapt device current level at the adapter electric current, wherein said handover control system is controlled described current error system and described modulator to make transducer be operated in boost mode when the adapter electric current surpasses described predetermined adapt device current level.
2. controller as claimed in claim 1 is characterized in that, described handover control system comprises:
The first comparator, described the first comparator compares and provides indication its mode signal adapter current sensing signal and adapter current reference;
The second comparator, described the second comparator discharges inhibit signal when described control signal reaches predetermined maintenance threshold value; And
Latch, when described inhibit signal was released, described latch switched between step-down and boost mode based on described mode signal.
3. controller as claimed in claim 1, it is characterized in that, described handover control system comprises that quick mode changes system, described quick mode change system makes operation switch to described boost mode from described decompression mode when the adapter electric current surpasses described predetermined adapt device current level the first scheduled volume and reaches the first predetermined amount of time, and described quick mode change system makes operation switch to described decompression mode from described boost mode when the adapter electric current is lower than described predetermined adapt device current level the second scheduled volume and reaches the second predetermined amount of time.
4. controller as claimed in claim 1 is characterized in that, described current error system is with battery current and predetermined level compares and optionally regulate described control signal.
5. controller as claimed in claim 4 is characterized in that, described current error system regulates described control signal battery current is restricted to predetermined maximum discharge level under boost mode.
6. controller as claimed in claim 1 is characterized in that, described current error system comprises:
The first amplifier, described the first amplifier amplification adapter current sense value also provides adapter current feedback value;
The second amplifier, described the second amplifier amplifies the battery current sensing value and the battery current value of feedback is provided;
The first error amplifier, described the first error amplifier receive described adapter current feedback value and adapter reference value and the first error amount are provided;
The second error amplifier, described the second error amplifier receive described battery current value of feedback and charging reference value and the second error amount are provided; And
First selects circuit, described first select circuit select minimum in described the first and second error amounts one as the circuit compensation value, be used to form described control signal.
7. controller as claimed in claim 6 is characterized in that, described current error system also comprises:
The 3rd error amplifier, described the 3rd error amplifier receive battery voltage value and cell voltage reference value and voltage compensation value are provided;
Second selects circuit, and described the second selection circuit is selected minimum in described current offset values and the described voltage compensation value one and selected offset is provided; And
The 3rd amplifier, described the 3rd amplifier is regulated described selected offset by described battery current sensing value, and described control signal is provided.
8. controller as claimed in claim 6 is characterized in that, described modulator comprises:
Pulse comparator, described pulse comparator compares and provides the first pulse control signal with described control signal and ramp signal; And
Synchronous grid controller, described synchronous grid controller receives described the first pulse control signal and the second pulse control signal is provided.
9. controller as claimed in claim 8, it is characterized in that, also comprise multiplex circuit, described multiplex circuit exchanges described adapter current feedback value and described adapter reference value between described step-down and boost mode, exchange the polarity of described battery current sensing value and exchange described the first pulse control signal and described the second pulse control signal.
10. controller as claimed in claim 9 is characterized in that, described multiplexer circuit also between described step-down and boost mode the exchange described charging limits value and the discharge limits value so that described charging reference value to be provided.
11. an electronic equipment, described electronic configurations becomes to receive the adapter electric current, the rechargeable battery and have system load of being configured to be coupled, and described electronic equipment comprises:
The source node that is used for receiving the adapter electric current and electric current is offered system load, and the battery node that is used for being coupled to battery;
Be coupled to the transducer of described source node and described battery node, described converter configurations becomes to be operated in decompression mode to utilize the adapter electric current to the battery charging and to be operated in boost mode so that battery discharges to described source node; And
Converter control system comprises:
The current surveillance system, described current surveillance system compares and forms its control signal of indication with adapter electric current and predetermined adapter current level;
Modulator, described modulator forms at least one pulse control signal based on described control signal, and has output, is used for utilizing described at least one pulse control signal to control described transducer; And
Handover control system, described handover control system is controlled described current surveillance system and described modulator, make described transducer be operated in described decompression mode when being less than or equal to described predetermined adapt device current level at the adapter electric current, wherein said handover control system is controlled described current surveillance system and described modulator to make described transducer be operated in described boost mode when the adapter electric current surpasses described predetermined adapt device current level.
12. electronic equipment as claimed in claim 11 is characterized in that, described system load comprises the processor that is coupled to memory.
13. electronic equipment as claimed in claim 11 is characterized in that, also comprises:
Current sensor is used for sensing adapter electric current and the adapter current sensing signal is provided; And
Wherein said handover control system also comprises:
The first comparator, described the first comparator compares and provides indication its mode signal described adapter current sensing signal and adapter current reference;
The second comparator, described the second comparator discharges inhibit signal when described control signal reaches predetermined maintenance threshold value; And
Latch, when described inhibit signal was released, described latch switched between step-down and boost mode based on described mode signal.
14. electronic equipment as claimed in claim 11 is characterized in that, also comprises:
Be coupled to the current sensor of described battery node, be used for the sensing battery current; And
Wherein said current surveillance system with described battery current and predetermined discharge level comparison to regulate described control signal under boost mode, described battery current is restricted to predetermined maximum discharge current.
15. electronic equipment as claimed in claim 11 is characterized in that:
Described current surveillance system comprises:
The first current sensor is used for sensing adapter electric current and the adapter current sensing signal is provided; And
The first error amplifier, described the first error amplifier compare described adapter current sensing signal and adapter reference signal and be provided for to form the first error signal of described control signal;
Wherein said modulator forms the first and second pulse control signals based on described control signal; And
Wherein said handover control system comprises multiplexer circuit, and described multiplexer circuit exchanges described adapter current sensing signal and described adapter reference signal between described step-down and boost mode, exchange described the first and second pulse control signals.
16. electronic equipment as claimed in claim 15 is characterized in that:
Described current surveillance system comprises:
The second current sensor is used for the sensing battery current and the sensing signal of the battery current with first and second polarity is provided;
Amplifier, described amplifier receive described battery current sensing signal and the battery current feedback signal are provided; And
The second error amplifier, described the second error amplifier compares and provides the second error signal to be used for optionally regulating described control described battery current feedback signal and selected battery reference signal
Signal processed; And
Wherein said multiplexer circuit also between described step-down and boost mode exchange described first and second polarity of described battery current sensing signal and communicating battery charging reference signal and battery discharge reference signal so that the reference signal of described selection to be provided.
17. one kind is used for control from the method for the transducer of the power stage of adapter received current, wherein said adapter also provides electric current to load, wherein said transducer is operated in decompression mode so that battery is charged, and be operated in boost mode so that battery to load discharge, wherein said method comprises:
Compare and provide indication its control signal adapter electric current and the adapter current level of being scheduled to;
Modulate at least one pulse control signal based on described control signal;
When the adapter electric current is less than or equal to predetermined adapter current level, apply at least one pulse control signal so that transducer is operated in decompression mode; And
When the adapter electric current surpasses predetermined adapter current level, apply at least one pulse control signal so that transducer is operated in boost mode.
18. method as claimed in claim 17 is characterized in that, also comprises:
Compare and provide indication its mode signal adapter current sensing signal and adapter current reference;
When reaching predetermined maintenance threshold value, control signal discharges inhibit signal; And
When described inhibit signal was released, the Schema-based signal switched between step-down and boost mode.
19. method as claimed in claim 17 is characterized in that, also comprises:
During boost mode, battery current and the battery discharge current level of being scheduled to are compared; And
During boost mode, regulate control signal battery current is restricted to predetermined battery discharge current level.
20. method as claimed in claim 17 is characterized in that, also comprises:
Described modulation comprises based on described control signal modulates the first and second pulse control signals; And
When switching between step-down and boost mode, exchange adapter electric current and the adapter current level of being scheduled to also exchange the first and second pulse control signals.
21. a controller that is used for battery charging modulator comprises the power stage that receives the adapter electric current from adapter, wherein the adapter electric current also is provided for system load, and described controller comprises:
The first testing circuit, described the first testing circuit configuration is used for sensing adapter electric current;
The second testing circuit, described the second testing circuit is configured to the sensing battery current;
Control circuit, be used for when the summation of system load electric current and described charging current is no more than maximum adaptation device current level, making power stage be operated in first mode to provide described battery current as charging current, and when described system load electric current meets or exceeds described maximum adaptation device current level, make power stage be operated in the second pattern, and provide described battery current to arrive on the described maximum adaptation device current level to increase the available system electric current as discharging current; And
Wherein said control circuit comprises battery protecting circuit, and described discharging current surpassed predetermined charging current level during it prevented described the second pattern.
22. controller as claimed in claim 21 is characterized in that, described first mode is that decompression mode and wherein said the second pattern are boost modes.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
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| US201161544058P | 2011-10-06 | 2011-10-06 | |
| US61/544,058 | 2011-10-06 | ||
| US13/479,390 US9246348B2 (en) | 2011-10-06 | 2012-05-24 | Battery charge modulator with boost capability |
| US13/479,390 | 2012-05-24 |
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| CN103036274A true CN103036274A (en) | 2013-04-10 |
| CN103036274B CN103036274B (en) | 2016-03-16 |
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