CN103023460B - Novel radio frequency receiving tuner system - Google Patents

Novel radio frequency receiving tuner system Download PDF

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CN103023460B
CN103023460B CN201210496151.1A CN201210496151A CN103023460B CN 103023460 B CN103023460 B CN 103023460B CN 201210496151 A CN201210496151 A CN 201210496151A CN 103023460 B CN103023460 B CN 103023460B
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CN103023460A (en
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王韶军
周健军
金晶
梁伟强
黄戈
卓秉忠
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SHANGHAI HIGH DEFINITION DIGITAL TECHNOLOGY INDUSTRIAL Co Ltd
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Abstract

The invention provides a novel radio frequency receiving tuner system. The system comprising the following modules: a signal link module which is in charge of amplification, frequency conversion and filtering of a radio frequency input signal, and a frequency synthesizer module which is in charge of generating a local oscillation signal needed for frequency conversion. Moreover, a digital control unit is arranged in the system so as to realize communication with a digital baseband module or a microcontroller. The novel radio frequency receiving tuner system has the following positive effects: supporting a complete single chip integrated satellite digital television tuner, needing no assistive devices, such as an external LNA (Low Noise Amplifier), a Saw Filter and a crystal oscillation circuit; supporting multi-band receiving, such as 950MHz-1450MHz (ABS-S band), 950MHz-1750MHz (ABS-S expansion band) and 950MHz-2150MHz (DVB-S band); using simple 3.3V single supply in a power management system; being integrated with an I2C bus controller, and providing a software control interface; being integrated with automatic calibration circuits for frequency, gain, bandwidth and the like, and being free from manual testing and manual debugging.

Description

New-type radio-frequency receiver turning system
Technical field
The present invention relates to digital data transmission, particularly the radio frequency reception tuner of the high-performance Multiband-multimode of satellite digital TV standard.
Background technology
Present at digital information high speed development, Digital Television as one from programme acquisition, program making program transmission until the system end to end of user side processing signals all in a digital manner.Compared with simulated television, Digital Television has that picture quality is high, program capacity large (be analog television transmission passage program capacity l0 doubly more than), the feature such as sound accompaniment is effective; And satellite digital TV is China realizes one of important step of total digitalization radio and television strategy.It is reported, in the middle of nearly 400,000,000 TV user of China, the following share that the number of users being carried out TV reception by satellite TV receiver will be occupied nearly 20%.
As everyone knows, satellite digital TV is full-fledged America and Europe, and the U.S. just started the live of satellite digital TV from 1993, and Europe have also been developed ripe DVB-S satellite digital TV live broadcast system, and is widely used.In recent years, China also accelerates the development step of satellite digital TV live broadcast system.During 9 days 20 June in 2008 15 points, China uses " Long March 3B " carrier rocket in Xichang Launching Site, successfully will " No. nine, culminant star " radio and television broadcasting satellite feeding space." No. nine, culminant star " replacement " No. two, prosperous promise " becomes China's first broadcast satellite direct broadcasting satellite.Because culminant star No. 9 direct broadcasting satellite Set Top Box are determined to adopt ABS-S standard, and freely receive satellite television programming.Therefore, No. 9, culminant star is not commercial satellite, but country drops into the part of " Rural areas " engineering of public purse, its public purpose solves the outlying district masses to watch and listen radio and television difficulty " project supported by commen people ", " benevolent project ", do not use encrypted card, but the satellite television programming of other frequencies and standard can not be received.Direct broadcasting satellite " Rural areas " Set Top Box according to GY/T233-2008 " direct broadcasting satellite IRD network access technical conditions and method of measurement " standard, should be able to carry out correct demodulation to the signal meeting ABS-S modulation technique specification.
Radio frequency reception tuner (RF tuner) is as one of the core devices of satellite digital television receiver set top box, its major function be by the radio frequency satellite-signal (frequency range in ABS-S standard: 950MHz-1450MHz) that received by outdoor satellite receiver (reception pot) after amplification, frequency conversion, filtering process, be converted to low frequency baseband signal, give digital baseband circuit and be further processed.Himself feature is that circuit work frequency is high, performance requirement is high.The RF tuner of prior art distinguishes from type, mainly contains Can Tuner and Silicon Tuner two kinds: the former is the traditional circuit module built by discrete component, and technology is comparatively ripe, but circuit module volume is large, and cost is high; And the latter is the one chip solution occurred with chip technology fast development in recent years, have area little, performance is high, the feature that cost is low.
From current technology trends, Silicon Tuner will replace Can Tuner completely.This is based on some reason following:
1. performance is given prominence to: Silicon Tuner has met the requirement of Digital Television completely along with development in recent years, its performance surmounts Can Tuner comprehensively, support more large-screen more the televising of high definition, make Silicon Tuner more adapt to the development trend in Digital Television height Qinghua.
2. improve system development flexibility ratio: Silicon Tuner is owing to have employed the solution of single-chip high integration, be integrated with a large amount of digital circuit unit and software control interface, have except high flexibility ratio high controllability except making chip itself, also receiver/set-top-box system is made to develop more simple and flexible, by the various performance parameters of simple software merit rating and adjustable receiver.And traditional Can Tuner possesses adjustable flexibility hardly.And the apparent small size of Silicon Tuner, the advantage of high integration be also its be more suitable for being applied in receiving system exploitation of the small screen small size.
3. high market value: relative to Can Tuner, Silicon Tuner market value advantage also clearly, its cost is only equivalent to 1/3 to 1/5 of Can Tuner cost, the Silicon Tuner of low-cost and high-performance obviously more favor by market.
Certainly, existing Silicon Tuner technology itself is in recent years also at development, Silicon Tuner many employings double conversion technology more common on the market, reduce the design difficulty of chip itself, but need external extra SAW (Surface Acoustic Wave) filter (Saw Filter), add system cost and complexity.
In view of above problem, the invention of the Silicon Tuner system of the single-conversion that a kind of practicality is good, operating performance is higher is imperative.
Summary of the invention
The technical problem to be solved in the present invention is mainly: in existing Silicon Tuner engineering practice, system cost and complexity is high and other defect sex chromosome mosaicism etc. emerges in an endless stream.
In order to solve the problem, the present invention adopts the frame design of zero-if architecture, without the need to the outer intermediate-frequency filter of sheet, and base-band signal frequency low (1/2 signal bandwidth), greatly reduce chip power-consumption, improve integrated level.The subject matter of zero-if architecture is several aspects such as the interference of DC maladjustment, 1/f noise, LO leakage and I/Q mismatch, and the present invention adopts the advanced design technology such as DC maladjustment technology for eliminating, low noise technology, double LO frequency VCO and I/Q collimation technique to overcome the above problems emphatically, therefore advanced zero-if architecture scheme is practical;
The present invention is in key modules, as proposed and apply the advanced technologies such as Automatic adjusument, digital control, structural remodeling in the design of LNA, Mixer, LPF, AGC, chip under different frequency different mode is made to be reconfigurable into the receiver adapting to this this pattern of frequency, thus single-chip multimode multi-frequency Signal reception is achieved, and keep the feature of low power consumption and low cost.
For solving the problems of the technologies described above, the invention provides a kind of New-type radio-frequency receiver turning system, its technical scheme is as follows: a kind of New-type radio-frequency receiver turning system, and it comprises as lower module:
Signal link module, is responsible for radio-frequency input signals amplification, frequency conversion and filtering;
Frequency synthesizer module: be responsible for producing the local oscillation signal needed for frequency conversion; In addition,
Internal system is also provided with digital control unit, realizes the communication with digital baseband block or microcontroller.
Described signal link module mainly comprises binary channels low noise amplifier, RF variable gain amplifier, frequency mixer, variable bandwidth low-pass ripple device, baseband variable gain amplifier and DC maladjustment and eliminates circuit.
Described signal link module adopts the zero-if architecture of Direct Conversion, provides the I/Q two-way analog signal output transforming to base band frequency.
Described system employing DC maladjustment cancellation loop suppresses the DC component in signal link, and its control model support automatically regulates and regulates with digital baseband.
Present system comprises radio frequency automatic growth control and base band automatic growth control.Described system is provided with rf gain automatic control unit at radio-frequency front-end, and this unit can the gain of Lookup protocol radio-frequency front-end, between noise and the linearity, do optimum choice.
The binary channels low noise amplifier design that described native system adopts single ended input, both-end to export simultaneously; Described binary channels low noise amplifier adopts cathode-input amplifier structure, adopts noise cancellation technique to reduce noise.
Described baseband variable gain amplifier provides the signal gain of maximum 50dB, and its gain control signal comes from digital baseband unit, supports digital control and analogue enlargement two kinds of modes.
Described variable bandwidth low-pass ripple device adopts 5 rank chebyshev low-pass filters, its be provided with ensure filter accuracies automatic frequency calibration circuit corrector strip in resistance and capacitance, ensure the precision of filter.
Described frequency synthesizer module mainly comprises broad tuning voltage controlled oscillator, programmable charge pump, high-speed programmable frequency-divider, second order single-bit quantification modulator, phase frequency detector and loop filter.
Described system adopts fractional frequency division to realize frequency synthesis than phase-locked loop.
Described broad tuning voltage controlled oscillator adopts Direct Conversion structure, dual-core architecture, covers 1.8G-4.4GHz frequency range respectively; Described high-speed programmable frequency-divider, adopts pulse to swallow formula frequency divider; Described pulse is swallowed formula frequency divider and is made up of preposition high-speed dual mode pre-divider, programmable counter and a swallow counter.
A processing method for New-type radio-frequency receiver turning system, it comprises the steps:
First, described binary channels low noise amplifier amplifies the radiofrequency signal of input; Radiofrequency signal after RF variable gain amplifier amplifies further by frequency mixer Direct Conversion to base band;
Then, the cut-off frequency of digital baseband unit option and installment variable bandwidth low-pass ripple device again, filter out-band external signal, retains baseband signal;
Finally, the baseband signal selected is amplified to needed for base band analog to digital converter by baseband variable gain amplifier again
Signal amplitude, realizes receiving.
The binary channels low noise amplifier design that described binary channels low noise amplifier adopts single ended input, both-end to export; Adopt cathode-input amplifier structure, adopt noise cancellation technique to reduce noiseproof feature and decline.
Described baseband variable gain amplifier provides the signal gain of maximum 50dB, and its gain control signal comes from digital baseband unit, supports digital control and analogue enlargement two kinds of modes.
Described variable bandwidth low-pass ripple device adopts 5 rank chebyshev low-pass filters, and it is provided with the automatic frequency calibration circuit corrector strip ensureing filter accuracies.
The invention has the beneficial effects as follows:
1, the satellite digital TV tuner of complete Single-Chip Integration is supported, without the need to additional devices such as sheet outer LNA, Saw Filter, crystal oscillating circuits;
2, support that multiband receives: 950MHz-1450MHz (ABS-S frequency range), 950MHZ-1750MHz(ABS-S extended frequency band) and 950MHz-2150MHz(DVB-S frequency range);
3, power-supply management system, adopts simple 3.3V single power supply; Integrated I2C bus control unit, provides software control interface; The auto-calibration circuits such as integrated frequency, gain, bandwidth, debug without the need to manual testing.
Accompanying drawing explanation
Fig. 1 present system adopts the single ended input/difference output broadband LNA basic structure schematic diagram of noise cancellation technique;
The overall frame structure schematic diagram of Fig. 2 present system;
Fig. 3 baseband variable gain amplifier architecture of the present invention schematic diagram;
Fig. 4 multimode frequency synthesizer of the present invention illustrative view of functional configuration.
Embodiment
The present invention is applied in digital data transmission, in particular to the Silicon Tuner chip system meeting the high-performance Multiband-multimode of ABS-S/DVB-S/DVB-S2 satellite digital TV standard a kind of in digital video broadcast-satellite transmission system, be the significant improvement of making on the basis to existing Silicon Tuner chip system, there is very important practice significance.
As everyone knows, conventional radio frequency receiver system generally adopts super-heterodyne architecture, but power consumption is large needed for super-heterodyne architecture, and integrated level is poor, must outer contact pin outer filter.And adopt the receiver system of zero-if architecture owing to adopting Direct frequency conversion, suppress without the need to image frequency, and IF signal frequency is low, has power consumption little, the feature that integrated level is high.
New-type radio-frequency receiver turning system of the present invention, that is: Silicon Tuner system global structure as shown in Figure 2: primarily of signal link (Signal Chain) and the large module composition of frequency synthesizer (Frequency Synthesizer) two.Signal link is responsible for radio-frequency input signals amplification, frequency conversion and filtering, and frequency synthesizer is responsible for producing the local oscillation signal LO needed for frequency conversion.In addition, internal system integrated digital control unit, and realized and digital baseband block or microcontroller communication by USB bus (I2C/SPI).
As Figure 1-4, described signal link (Signal Chain) eliminates circuit (DCOC) composition primarily of binary channels low noise amplifier (LNA), RF variable gain amplifier (RFPGA), frequency mixer (Mixer), variable bandwidth low-pass ripple device (LPF), baseband variable gain amplifier (BBVGA) and DC maladjustment.
Described signal link (Signal Chain) adopts the zero-if architecture of Direct Conversion, provides the I/Q two-way analog signal output transforming to base band frequency.There is not the problem of Image interference in zero-if architecture, without the need to image-reject filter, has structure simple, feature low in energy consumption.
In actual motion, the radio frequency reception of satellite digital television signal realizes in the following manner: first, and described binary channels low noise amplifier amplifies the radiofrequency signal of input; Radiofrequency signal after RF variable gain amplifier (RFPGA) amplifies further by frequency mixer (Mixer) Direct Conversion to base band; Then, the cut-off frequency of digital baseband unit option and installment variable bandwidth low-pass ripple device (LPF) again, filter out-band external signal, retains baseband signal; Finally, the baseband signal selected is amplified to the signal amplitude needed for base band analog to digital converter (ADC) by baseband variable gain amplifier (BBVGA) again, realizes receiving.
Described binary channels low noise amplifier (LNA) and RF variable gain amplifier (RFPGA) can provide the signal gain of maximum 70dB.The use of binary channels low noise amplifier (LNA) and RF variable gain amplifier (RFPGA) can suppress the noise of late-class circuit, reduces the noise factor of whole signal link.But too high gain inputs in large-signal, when there is large sideband interference especially, serious nonlinear distortion can be caused.Therefore, rf gain automatic control unit (RFAGC) is added at radio-frequency front-end.RFAGC unit can the gain of Lookup protocol radio-frequency front-end, between noise and the linearity, do optimum choice.
Owing to adopting zero-if architecture, the structure of frequency mixer should be chosen to be the four-quadrant frequency mixer of I/Q output.In order to solve the problem by 1/f noise serious interference in zero intermediate frequency reciver scheme, frequency mixer should adopt passive structures.Because the switch frequency-converter tube in the frequency mixer of passive structures does not have direct current to pass through, therefore there is less 1/f noise.
In order to solve the DC maladjustment problem in zero intermediate frequency reciver, the DC component that the present invention adopts DC maladjustment cancellation loop (DCOC) to suppress in signal link, its control model support automatically regulates and regulates with digital baseband.Satellite digital TV radio frequency reception requires higher to local oscillation signal.In order to obtain frequency error factor speed faster, lower phase noise and spuious and higher frequency resolution, the present invention adopts fractional frequency division than phase-locked loop to realize frequency synthesizer.
In addition, receiver turning system suppresses (Adjacent Channel Rejection) to have higher requirements to sideband, and therefore described low pass filter adopts 5 rank chebyshev low-pass filters.On the other hand, higher sideband inhibition and letter band selectivity be obtained, necessarily require the cut-off frequency of low pass filter to have degree of precision.Because the cut-off frequency precision of low pass filter limits by the absolute precision of resistance in sheet and electric capacity, therefore the present invention designs resistance and capacitance in automatic frequency calibration circuit (AFC) corrector strip, ensures the precision of filter.
Described binary channels low noise amplifier (LNA) is positioned at radio-frequency transmitter foremost, and its major function is that radio frequency input signal carries out undistorted amplification and processes for frequency mixer.The leading indicator of described binary channels low noise amplifier (LNA) comprising: noise factor (NF), the linearity (IIP3), gain (gain), input and output impedance matching (VSWR), isolation, operating frequency range.Noise factor due to a receiver depends primarily on noiseproof feature and the gain of what circuit above, therefore in order to make whole receiver have good noise factor, needs noiseproof feature and the gain of paying close attention to what circuit, particularly LNA above more.
In addition, LNA not only needs can not add too many noise while amplification weak signal, still must can keep linear when receiving strong signal.When particularly receiving a weak signal when there is high reject signal (comprising block signal in band or out of band under normal circumstances), LNA is necessary retention wire sex work also, otherwise just there will be crosstalk.Crosstalk may cause decline (obstruction) or the cross modulation of sensitivity.What block is that the intermodulation product term caused due to high reject signal has flooded the weak signal that will receive, and cross modulation refers to that the modulation transmission of a signal is given the carrier wave of another signal by nonlinear interaction.These non-linear counter productives caused can reduce receiver to the reception of signal and disposal ability, therefore need to reduce the impact that these problems are brought during LNA design as far as possible.
In addition, for the feature that Received signal strength changes in amplitude is larger, gain control module must be adopted to regulate to the gain of LNA, the input signal of different amplitude all can be processed in operation of receiver interval, thus avoid large-signal distortion, avoid small-signal to be buried in large-signal and noise simultaneously.
The low noise amplifier of binary channels described in the present invention (LNA) adopts cathode-input amplifier structure, for cost with the degree of freedom (Rin ≈ 1/gm) of sacrificing the design of input stage metal-oxide-semiconductor, realizes input impedance and mates preferably in broad frequency range; And adopt noise cancellation technique to reduce the negative effect of the noiseproof feature decline that this design brings.It adopts current multiplexing technology to be optimized design to reduce power consumption to input metal-oxide-semiconductor while employing altogether grid input.
The LNA method for designing that the present invention adopts single ended input/both-end to export simultaneously, the common-mode signal in the process that the differential signal that both-end exports can effectively suppress late-class circuit to process signal.
Described baseband variable gain amplifier (BBVGA) can provide the signal gain of maximum 50dB, and its gain control signal comes from digital baseband unit, supports digital control and analogue enlargement two kinds of modes.
In the present invention, variable bandwidth low-pass ripple device (LPF) realizes anti aliasing purposes function, and can carry out frequency automatic correction and bandwidth tuning, has precipitous transition band, less noise factor and lower power consumption.
The present invention adopts 5 rank Chebyshev 1 mode filter structures (Chebyshev type I), to reach higher stopband attenuation rate, controls passband ripple simultaneously.This filter construction is called leapfrog structure, because it is from LC ladder-type filter prototype, therefore also has lower sensitivity.In this filter circuit, the mutually deserved capacitance resistance array of each electric capacity and resistance realizes, automatic calibration and tuning time controlled by digital bit signal.
Described frequency mixer (Mixer) relies on the non-linear behavior of circuit itself to complete frequency translation function.The present invention adopts zero intermediate frequency reciver structure.Radiofrequency signal input transconductance stage, local oscillation signal input switch pair.Transconductance stage adopts Cascode structure, can obtain the isolation between better LO-RF, reduces the impact of local oscillation signals leak and radio frequency signal leakage, and can improve the linearity of frequency mixer.RC high pass filter between transconductance stage and Switch Controller, by baseband interference signal filtering, can play the effect of good restraint speckle.A low pass filter output low frequency signal of output, suppresses for high frequency spurs.
In order to reduce the impact of DC maladjustment for frequency mixer, output adopts DC maladjustment cancellation loop, is minimum by the interference reduction of DC maladjustment.Described frequency synthesizer takes the indirect frequency synthesis structure based on fractional frequency-division phase-locked loop.Whole multimode frequency synthesizer internal components mainly comprises broad tuning voltage controlled oscillator, programmable charge pump, high-speed programmable frequency-divider, Sigma-Delta modulator, phase frequency detector and loop filter.Output frequency covers satellite digital TV frequency range (950MHz-2150MHz).Its loop filter is realized by the outer device of sheet, and the loop bandwidth reached is 20KHz.
Under described broad tuning voltage controlled oscillator adopts the prerequisite of Direct Conversion structure, the local oscillating frequency that frequency synthesizer exports needs to cover above all frequency ranges.Therefore, the voltage controlled oscillator in the present invention is operated in 2 or 4 times of these frequency ranges, by the frequency dividing ratio that fractional divider is different, produces all local oscillated signals of orthogonal (I/Q two-way).Voltage controlled oscillator is intended adopting dual-core architecture, covers 1.8G-4.4GHz frequency range respectively.When ensureing tuning range, reduce the phase noise of phase-locked loop.
The present invention adopts VCO core circuit, and adopt CMOS cross coupling structure, capacitor array (cap bank) is controlled by numerical frequency calibration circuit, forms the coarse adjustment module of VCO frequency; Variable capacitance pipe and inductance L form resonant cavity, and are controlled by PLL loop, form the fine tuning module of VCO frequency.Use PMOS and NMOS tube mutual coupling to providing negative resistance simultaneously, the electric current that tail current source is provided PMOS mutual coupling to and NMOS mutual coupling between obtain multiplexing, reduce power consumption.And resonant tank is connected in parallel between difference output, make the selection of inductance can replace original two inductance with the symmetry spiral inductance of twice inductance value, not only save chip area, and the higher Q value of symmetry inductance also can improve the phase noise performance of output.Variable resistor provides bias current, compares transistor tail current source, use resistance provide the advantage of tail current to be do not have 1/f noise to upconvert near frequency of oscillation, therefore in circuit also without the need to adding LC noise filtering network.The output that supply voltage adopts inside circuit band-gap reference to produce, to eliminate the frequency shift (FS) because voltage dithering causes.Fine tuning electric capacity takes the mode of MOS variable capacitance and rf_mimcap series connection, makes full use of the tuning range of MOS variable capacitance.
Described high-speed programmable frequency-divider, adopts pulse to swallow formula frequency divider (pulse swallow frequency divider).This method can provide numerical value very large and continuous distribution, programmable frequency dividing ratio, has comparatively simple circuit structure simultaneously, and lower power consumption.
Described pulse is swallowed formula frequency divider and is made up of a preposition high-speed dual mode pre-divider (dual modulus prescaler), programmable counter (programmable counter) and swallow counter (swallow counter).Dual-modulus prescaler can be operated in N+1 frequency division or Fractional-N frequency two kinds of patterns, and the selection of frequency dividing ratio is realized by a mould control signal.Wherein N is a fixed value, depending on the height of incoming frequency, generally gets 2n.The mould (P and S) of programmable counter and swallow counter is variable, is connected with Sigma-Delta modulator by interface.
In order to realize good fractional frequency division, second order single-bit quantification Sigma-Delta modulator is adopted in the present invention, it has good stability and noise shaping ability, compare compared with the Sigma-Delta modulator of other structures, the effect of phase noise of noise to whole phase-locked loop introduced by it is less simultaneously.
Feedback frequency ffeed compared with reference frequency fref, and is controlled charge pump current according to the difference of frequency and phase place by described phase frequency detector.
In the Design of Frequency Synthesizer process comprising sigma-delta modulator, because the out-of-band noise of modulator to the phase noise in band and spuiously can bring contribution, therefore the present invention particularly enhances the linearity of phase frequency detector.In order to prevent dead band (offseting nonlinearity erron by the zero phase of lock-out state to cause) from occurring, need to add Postponement module in phase frequency detector.
The radiofrequency signal dynamic range that radio-frequency transmitter receives is usually very large, needs receiver to carry out gain control in real time, reduces to keep the signal to noise ratio (S/N) outputed signal not become large with input signal as far as possible.When input signal is very little, the signal to noise ratio (S/N) of output signal depends on the noiseproof feature of circuit, needs to carry out low noise plus and blowup to signal.When input signal is very large, the signal to noise ratio (S/N) of output signal depends on the amount distortion of signal, needs to carry out the amplification of high linearity low gain to signal.
Present system comprises radio frequency automatic growth control RFAGC and base band automatic growth control BBAGC.RFAGC is made up of LNA, RFPGA and RFDET, and the peak detection circuit RFDET being wherein positioned at RFPGA output detects radiofrequency signal size and the gain of control LNA and RFPGA.BBAGC is made up of BBPGA and digital baseband testing circuit, and digital baseband detects output signal size and the gain of FEEDBACK CONTROL BBPGA.
In a word, the binary channels low noise amplifier of New-type radio-frequency receiver turning system of the present invention amplifies the radiofrequency signal of input; Radiofrequency signal after RF variable gain amplifier RFPGA amplifies further by frequency mixer (Mixer) Direct Conversion to base band; Then, the cut-off frequency of digital baseband unit option and installment low pass filter again, filter out-band external signal, retains baseband signal; Finally, the baseband signal selected is amplified to the signal amplitude needed for base band analog to digital converter (ADC) by baseband variable gain amplifier (BBVGA) again, realizes receiving.Described frequency synthesizer is responsible for producing the local oscillation signal LO needed for frequency conversion.
New-type radio-frequency receiver turning systematic function of the present invention is as follows: support complete Single-Chip Integration satellite digital TV tuner; Support national DTH standard A BS-S, European standard DVB-S, DVB-S2 simultaneously; Support multiband receiving function; 3.3V single power supply; Support software control interface, I2C standard; Support the auto-calibration circuits functions such as frequency, gain, broadband; Operating frequency: 950MHz ~ 2150MHz; Input impedance (single-ended): 75 Ω; Incoming level :-100 ~-15dBm; Noise factor: <5dB; Input third order intermodulation point (IIP3): >-5dBm; Gain controls: control range >60dB; To make an uproar mutually index :≤-73dBc/Hz1kHz; ≤-83dBc/Hz10kHz; ≤-93dBc/Hz100kHz; Current sinking: <150mA; Inband flatness: <3dB; Clutter recognition: >20dB.
The present invention adopts the receiver frame design of zero-if architecture, without the need to the outer intermediate-frequency filter of sheet, and base-band signal frequency low (1/2 signal bandwidth), greatly reduce chip power-consumption, improve integrated level.The subject matter of zero-if architecture is several aspects such as the interference of DC maladjustment, 1/f noise, LO leakage and I/Q mismatch, and the present invention adopts the advanced design technology such as DC maladjustment technology for eliminating, low noise technology, double LO frequency VCO and I/Q collimation technique to overcome the above problems emphatically, therefore advanced zero-if architecture scheme is practical.
The present invention is in key modules, as propose in the design of LNA, Mixer, LPF, AGC and application as advanced technologies such as Automatic adjusument, digital control, structural remodelings, chip under different frequency different mode is made to be reconfigurable into the receiver adapting to this this pattern of frequency, thus single-chip multimode multi-frequency Signal reception is achieved, and keep the feature of low power consumption and low cost.
As the radio frequency chip system for the purpose of industrialization, the present invention improves stability and the reliability of chip, to reach the requirement of industrial volume production in many aspects.Concrete measure comprises: ensure that chip can be issued to set performance index at wider working environment, and operating voltage supports 3V-3.6V input, and the change that ambient temperature support is-40 DEG C-105 DEG C also supports all process corner; Electrostatic discharge (ESD) protective circuit is added to all input and output pins; Again at Embedded pressurizer, for circuit with stable supply voltage and suppress power supply disturbance; Automatic calibration and compensation are carried out to circuit parameters such as resistance value, capacitance, transistor transconductance, VCO frequency of oscillation, filter cutoff frequency, DC offset voltage; In this external chip layout design, will re-optimization laying out pattern, reduce digital-to-analogue and disturb, and safeguard measure is implemented to Key Circuit and signal.
The description of above preferred embodiment makes those skilled in the art can manufacture or use the present invention.The various amendments of these embodiments are apparent for a person skilled in the art, and the General Principle defined here can be applied in other embodiment and not deviate from the spirit or scope of the present invention.Therefore, the present invention is not limited to shown here embodiment, and will meet the most wide in range scope consistent with the principle disclosed and novel feature here.

Claims (14)

1. a New-type radio-frequency receiver turning system, is characterized in that, it comprises as lower module:
Signal link module, is responsible for, by radio-frequency input signals amplification, frequency conversion and filtering, comprising the zero-if architecture of Direct Conversion;
Frequency synthesizer module: be responsible for producing the local oscillation signal needed for frequency conversion; In addition,
Internal system is also provided with digital control unit, realizes the communication with digital baseband block or microcontroller.
2. New-type radio-frequency receiver turning system according to claim 1, is characterized in that: described signal link module mainly comprises binary channels low noise amplifier, RF variable gain amplifier, frequency mixer, variable bandwidth low-pass ripple device, baseband variable gain amplifier and DC maladjustment and eliminates circuit.
3. New-type radio-frequency receiver turning system according to claim 2, is characterized in that: described signal link module adopts the zero-if architecture of Direct Conversion, provides the I/Q two-way analog signal output transforming to base band frequency.
4. according to the arbitrary described New-type radio-frequency receiver turning system of claim 1 or 2, it is characterized in that: described system adopts DC maladjustment cancellation loop to suppress the DC component in signal link, and its control model support automatically regulates and regulates with digital baseband.
5., according to the arbitrary described New-type radio-frequency receiver turning system of claim 1 or 2, it is characterized in that: described system comprises radio frequency automatic growth control and base band automatic growth control; Described system is provided with rf gain automatic control unit at radio-frequency front-end, and this unit can the gain of Lookup protocol radio-frequency front-end, between noise and the linearity, do optimum choice.
6. New-type radio-frequency receiver turning system according to claim 2, is characterized in that: the binary channels low noise amplifier design that described system adopts single ended input, both-end to export simultaneously; Described binary channels low noise amplifier adopts cathode-input amplifier structure, adopts noise cancellation technique to reduce noise to the impact of systematic function.
7. New-type radio-frequency receiver turning system according to claim 2, it is characterized in that: described baseband variable gain amplifier provides the signal gain of maximum 50dB, its gain control signal comes from digital baseband unit, supports digital control and analogue enlargement two kinds of modes.
8. New-type radio-frequency receiver turning system according to claim 2, it is characterized in that: described variable bandwidth low-pass ripple device adopts 5 rank chebyshev low-pass filters, its be provided with ensure filter accuracies automatic frequency calibration circuit corrector strip in resistance and capacitance.
9. New-type radio-frequency receiver turning system according to claim 1, is characterized in that: described frequency synthesizer module mainly comprises broad tuning voltage controlled oscillator, programmable charge pump, high-speed programmable frequency-divider, second order single-bit quantification modulator, phase frequency detector and loop filter.
10. New-type radio-frequency receiver turning system according to claim 1, is characterized in that: described system adopts fractional frequency division than phase-locked loop to realize frequency synthesis.
11. New-type radio-frequency receiver turning systems according to claim 9, is characterized in that: described broad tuning voltage controlled oscillator adopts Direct Conversion structure, dual-core architecture, cover 1.8G-4.4GHz frequency range respectively; Described high-speed programmable frequency-divider, adopts pulse to swallow formula frequency divider; Described pulse is swallowed formula frequency divider and is made up of preposition high-speed dual mode pre-divider, programmable counter and a swallow counter.
The processing method of 12. New-type radio-frequency receiver turning systems according to claim 2, it is characterized in that, it comprises the steps:
First, described binary channels low noise amplifier amplifies the radiofrequency signal of input; Radiofrequency signal after RF variable gain amplifier amplifies further by frequency mixer Direct Conversion to base band;
Then, the cut-off frequency of digital baseband unit option and installment variable bandwidth low-pass ripple device again, filter out-band external signal, retains baseband signal;
Finally, the baseband signal selected is amplified to the signal amplitude needed for base band analog to digital converter by baseband variable gain amplifier again, realizes receiving.
13. methods according to claim 12, is characterized in that: the binary channels low noise amplifier design that described binary channels low noise amplifier adopts single ended input, both-end to export; Adopt cathode-input amplifier structure, adopt noise cancellation technique to reduce noiseproof feature and decline; Described baseband variable gain amplifier provides the signal gain of maximum 50dB, and its gain control signal comes from digital baseband unit, supports digital control and analogue enlargement two kinds of modes.
14. methods according to claim 12, is characterized in that: described variable bandwidth low-pass ripple device adopts 5 rank chebyshev low-pass filters, and it is provided with the automatic frequency calibration circuit corrector strip ensureing filter accuracies.
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CN105610441B (en) * 2015-12-23 2019-02-01 北京时代民芯科技有限公司 A kind of current compensation system of emission type digital analog converter DC maladjustment
CN110852123A (en) * 2018-08-20 2020-02-28 紫光同芯微电子有限公司 Automatic tuning non-contact smart card resonant circuit
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CN111342775B (en) * 2018-12-19 2023-07-14 天津大学青岛海洋技术研究院 Dual-core oscillator based on current multiplexing and transformer coupling buffer amplifier
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CN112923863B (en) * 2021-01-26 2023-03-24 哈尔滨工程大学 Secondary frequency conversion fiber grating resonance peak tracking detection system
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CN113517938B (en) * 2021-09-13 2021-12-10 成都旋极星源信息技术有限公司 Automatic calibration system for transceiver
CN116032283B (en) * 2023-01-09 2023-09-22 合肥工业大学 Programmable gain amplifying circuit with DCOC calibration and implementation method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101557476A (en) * 2008-04-11 2009-10-14 上海锐协微电子科技有限公司 Single-chip multi-mode digital television tuner
CN201383850Y (en) * 2008-12-31 2010-01-13 深圳市同洲电子股份有限公司 Wideband phase lock loop frequency synthesizer and digital television reception terminal
CN101820508A (en) * 2009-02-26 2010-09-01 上海融创名睿微电子有限公司 Radio frequency front end circuit of single-ended transfer difference of digital mobile television receiver tuner
CN102404529A (en) * 2011-12-30 2012-04-04 上海集成电路研发中心有限公司 Digital television tuner receiver system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070132889A1 (en) * 2005-11-28 2007-06-14 Jianping Pan Integrated digital television tuner

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101557476A (en) * 2008-04-11 2009-10-14 上海锐协微电子科技有限公司 Single-chip multi-mode digital television tuner
CN201383850Y (en) * 2008-12-31 2010-01-13 深圳市同洲电子股份有限公司 Wideband phase lock loop frequency synthesizer and digital television reception terminal
CN101820508A (en) * 2009-02-26 2010-09-01 上海融创名睿微电子有限公司 Radio frequency front end circuit of single-ended transfer difference of digital mobile television receiver tuner
CN102404529A (en) * 2011-12-30 2012-04-04 上海集成电路研发中心有限公司 Digital television tuner receiver system

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