CN103021451A - Device and method for threshold-voltage adjustment-based multistage temperature control self-refreshing storage - Google Patents
Device and method for threshold-voltage adjustment-based multistage temperature control self-refreshing storage Download PDFInfo
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- CN103021451A CN103021451A CN2011102846567A CN201110284656A CN103021451A CN 103021451 A CN103021451 A CN 103021451A CN 2011102846567 A CN2011102846567 A CN 2011102846567A CN 201110284656 A CN201110284656 A CN 201110284656A CN 103021451 A CN103021451 A CN 103021451A
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Abstract
The invention relates to the technical field of memories and especially relates to a device and a method for threshold-voltage adjustment-based multistage temperature control self-refreshing storage. The device for threshold-voltage adjustment-based multistage temperature control self-refreshing storage comprises an oscillator, a frequency divider, a temperature sensor, and a first selector. The temperature sensor is connected to the first selector. The oscillator is connected to the frequency divider. The frequency divider is connected to the first selector. The first selector is connected to a DRAM array. The device for threshold-voltage adjustment-based multistage temperature control self-refreshing storage also comprises n substrate voltage stabilization modules and a second selector. The n substrate voltage stabilization modules produce substrate voltage VBB1 to VBBn in DRAM keeping. The second selector selects one of the substrate voltage VBB1 to VBBn under the control of a temperature voltage signal Vtemp produced by the temperature sensor and then outputs it as transistor substrate voltage of the DRAM array. The device and the method solve the prior art problems of a large temperature range corresponding to each grade frequency, a large threshold-voltage change range, and low efficiency or unreliability.
Description
Technical field
The present invention relates to the memory technology field, relate in particular to a kind of multistage temperature control self-refresh method based on threshold voltage adjustments.
Background technology
DRAM can owing to leakage current causes data corruption, therefore, should will recharge to initial charge level after the data reading before cell data is lost.This process that recharges just is called and refreshes.In addition, the DRAM that self-refresh refers to self refreshed with the fixing cycle, with the data in the storage unit of keeping the standby state.On the other hand, every rising 10 degree of temperature, leakage current doubles.In other words, when temperature rising 10 degree, holding time of memory cell data reduces by 1/2, and when rising 50 was spent, holding time was reduced to 1/32.As described above, leakage current and temperature are closely related, and therefore, temperature is the key factor that affects the refresh cycle.That is, the self-refresh cycle should be shorter when high-temperature relatively.
Prior art is according to the technology of temperature Multistage Control refreshing frequency, and with reference to the accompanying drawings 1, comprise oscillator 101, frequency divider 102, temperature sensor 103 and selector switch 104 according to the memory device of temperature Multistage Control refreshing frequency.Temperature sensor 103 has the function of sense temperature and classification processing, provides voltage signal corresponding to different phase temperature, outputs to the input end of selector switch 104.Frequency divider 102 produces multiple refreshing frequency.According to different temperatures corresponding voltage signal, selector switch 104 is selected a kind of refreshing frequency output refrq.With reference to the accompanying drawings 2, accompanying drawing 2 is the curve map of prior art threshold voltage and multistage refreshing frequency, temperature variation.In the prior art, threshold voltage vt h raises along with temperature and descends, and the refresh cycle is in cycle corresponding to different temperature stages.Each refresh cycle in stage of this moment should be satisfied the demand that refreshes under the interior worst case of this temperature stage, and wherein the inverse of refresh cycle is refreshing frequency.
Prior art CN1734667A discloses a kind of refresh period generating circuit.This refresh period generating circuit produces the refresh cycle when refreshing the DRAM unit, and its formation has: the oscillatory circuit section of vibrating environment temperature is had temperature dependent frequency; The vibration output of described oscillatory circuit section is carried out the frequency dividing circuit of frequency division; Detect the Temperature Detector of described environment temperature; And according to the output of described Temperature Detector, switchably select output from the frequency division output of a plurality of frequencies of described frequency dividing circuit, output is as the selection circuit of the signal of the benchmark of described refresh cycle, the described temperature dependency of described oscillatory circuit section has positive temperature coefficient in the temperature range of regulation, and outside the temperature range of described regulation, not having positive temperature coefficient, described selection circuit carries out the switching of described frequency division output outside the temperature range of described regulation.
The deficiencies in the prior art part is that generally, if do not add control, every 12 degree, refreshing frequency just need to double.So must the subsection setup refreshing frequency.Temperature range corresponding to every grade frequency is large, and the threshold voltage variation scope is large, inefficient or unreliable problem may occur.
Summary of the invention
In order to achieve the above object, the present invention proposes a kind of multistage temperature control self-refresh memory device based on threshold voltage adjustments, comprise oscillator, frequency divider, temperature sensor, first selector, described temperature sensor is connected with first selector, oscillator is connected to frequency divider, frequency divider is connected with first selector, first selector is connected with the DRAM array, this memory device also comprises n underlayer voltage stable module and second selector, described n underlayer voltage stable module produces the underlayer voltage VBB1 during the DRAM maintenance, VBB2, VBBn, second selector under the temperature voltage signal Vtemp control that temperature sensor produces from underlayer voltage VBB1, VBB2, one of selection outputs on the transistor substrate voltage of DRAM array among the VBBn, wherein, n is natural number.
Preferably, oscillator produces refresh signal frq, then outputs to frequency divider.
Preferably, frequency divider carries out frequency division to the refresh signal frq that oscillator produces, the refreshing frequency frqs behind the generation frequency division.
Preferably, under Vtemp control, first selector is selected to provide final refreshing frequency Refrq from a plurality of refreshing frequency frqs, outputs to the DRAM array.
Preferably, the underlayer voltage stable module comprises three fixed value resistances, triode T1, comparer and a charge pump.
Preferably, triode is taken from redundancy unit for the identical transistor of transistor in the DRAM array.
Preferably, obtain underlayer voltage VBBn by adjusting three fixed value resistances.
Preferably, second selector is ternary transmission gate.
In order to achieve the above object, the present invention also proposes a kind of method, may further comprise the steps: underlayer voltage VBB1, the VBB2 during n underlayer voltage stable module generation DRAM keeps ... VBBn, second selector under the temperature voltage signal Vtemp control that temperature sensor produces from underlayer voltage VBB1, VBB2 ... one of selection outputs on the transistor substrate voltage of DRAM array among the VBBn, wherein, n is natural number.
The present invention has overcome the prior art existence, and the temperature range corresponding such as every grade frequency is large, and the threshold voltage variation scope is large, inefficient or unreliable problem may occur.
Description of drawings
Accompanying drawing 1 is that prior art is according to the memory device of temperature Multistage Control refreshing frequency;
Accompanying drawing 2 is the curve map of prior art threshold voltage and multistage refreshing frequency, temperature variation;
Accompanying drawing 3 is according to the multistage temperature control self-refresh memory device of the embodiment of the invention based on threshold voltage adjustments;
Accompanying drawing 4 is the circuit diagram according to embodiment of the invention underlayer voltage stable module 201;
Accompanying drawing 5 is the circuit diagram according to embodiment of the invention underlayer voltage stable module 202;
Accompanying drawing 6 is the curve map according to embodiment of the invention threshold voltage and multistage refreshing frequency, temperature variation;
Accompanying drawing 7 is the circuit diagram according to embodiment of the invention selector switch 300;
Embodiment
Accompanying drawing 3 is according to the multistage temperature control self-refresh memory device of the embodiment of the invention based on threshold voltage adjustments, identical element adopt with accompanying drawing 1 in identical Reference numeral.Multistage temperature control self-refresh memory device based on threshold voltage adjustments comprises oscillator 101, frequency divider 102, temperature sensor 103.Based on the multistage temperature control self-refresh memory device of threshold voltage adjustments two selector switch selector switchs 104 are set and selector switch 300,400 is the DRAM array according to the embodiment of the invention.Described memory device arrange a plurality of underlayer voltage stable modules 201,202 ... 20n, n are natural number.Underlayer voltage stable module 201,202 ... each is connected to selector switch 300 20n, underlayer voltage stable module 201,202 ... underlayer voltage VBB1, VBB2 during 20n generation DRAM keeps ... VBBn outputs in the selector switch 300.Temperature sensor 101 is used for generating the voltage Vtemp that depends on temperature fluctuation, and temperature sensor 103 is connected with selector switch simultaneously and selector switch 300 connects.Selector switch 300 under temperature voltage signal Vtemp control from VBB1, VBB2 until select the VBBn on the transistor substrate voltage VBB who outputs to the DRAM array.Oscillator 101 produces refresh signal frq, then outputs to frequency divider, and it is carried out frequency division, the refreshing frequency frqs behind the generation frequency division.Refreshing frequency Reffq also is under Vtemp control, is selected to provide from a plurality of frequency f rqs by selector switch 1 module 104.Also be, temperature sensor 103 is connected with selector switch respectively, selector switch 300 connects, the voltage Vtemp that depends on temperature fluctuation of temperature sensor output outputs to selector switch 104 and selector switch 300, selector switch 300 under temperature voltage signal Vtemp control from VBB1, VBB2 until select the VBBn on the transistor substrate voltage VBB who outputs to the DRAM array; Simultaneously, under Vtemp control, from a plurality of frequency f fqs, selected to provide by selector switch 1 module 104.
Accompanying drawing 4 be according to embodiment of the invention underlayer voltage stable module circuit diagram (201,202 ..., 20n).As one of them example, accompanying drawing 4 shows the circuit diagram of underlayer voltage stable module 201.This underlayer voltage stable module 201 comprises fixed value resistance R11, R12, R13, a triode T1, a comparer and a charge pump.T1 can take from redundancy unit for the identical transistor of transistor in the DRAM array.Resistance R 12 is connected an end and is connected with R13, and is connected to the positive input terminal of comparer, an other termination power voltage VDD or the some reference voltage Vref of R12, the other end ground connection of R13.A termination power voltage VDD or the some reference voltage Vref of R11, and the drain and gate of an other termination triode T1, and receive the negative input end of comparer, the output terminal of comparer is connected with charge pump, the output of charge pump is VBB, feeds back to simultaneously triode.Obtain VBB1 by adjustment R11, R12, R13; In 202, obtain VBB2 by adjustment R21, R22, R23.By that analogy, in 20n, obtain VBBn by adjusting corresponding Rn1, Rn2, Rn3.The triode T1 here can take from redundancy unit for the identical transistor of transistor in the DRAM array.In like manner, accompanying drawing 5 is the circuit diagram according to embodiment of the invention underlayer voltage stable module 202, owing to be same structure, does not introduce one by one at this.
Accompanying drawing 6 is the curve map according to embodiment of the invention threshold voltage and multistage refreshing frequency, temperature variation.After adopting the present invention, threshold voltage remains unchanged in certain temperature range, and refreshing frequency can adopt frequency lower in this scope so, thereby reduces and refresh power consumption.
Accompanying drawing 7 is the circuit diagram according to embodiment of the invention selector switch 300.301,302 ... 30n can be ternary transmission gate circuit.Underlayer voltage stable module 201,202 ... underlayer voltage VBB1, VBB2 during the DRAM that 20n produces keeps ... VBBn output to successively ternary transmission gate circuit 301,302 ... 30n.Under temperature voltage signal Vtemp control, from VBB1, VBB2 until select a Voltage-output VBB the VBBn.
According to one embodiment of the invention, a kind of method for refreshing of controlling the self-refresh memory device based on the multistage temperature of threshold voltage adjustments has also been proposed, described memory device comprises oscillator, frequency divider, temperature sensor, first selector, described temperature sensor is connected with first selector, oscillator is connected to frequency divider, and frequency divider is connected with first selector, and first selector is connected with the DRAM array.Described method comprise n underlayer voltage stable module produce underlayer voltage VBB1, VBB2 during DRAM keeps ... VBBn, second selector under the temperature voltage signal Vtemp control that temperature sensor produces from underlayer voltage VBB1, VBB2 ... one of selection outputs on the transistor substrate voltage of DRAM array among the VBBn, wherein, n is natural number.
Although illustrate and described the preferred embodiments of the present invention, it will be apparent for a person skilled in the art that at it and can make a lot of variations and modification without departing from the invention aspect wider.
Claims (9)
1. the multistage temperature based on threshold voltage adjustments is controlled the self-refresh memory device, comprise oscillator, frequency divider, temperature sensor, first selector, described temperature sensor is connected with first selector, oscillator is connected to frequency divider, frequency divider is connected with first selector, and first selector is connected with the DRAM array, it is characterized in that:
This memory device also comprises n underlayer voltage stable module and second selector, underlayer voltage VBB1, VBB2 during described n underlayer voltage stable module generation DRAM keeps ... VBBn, second selector under the temperature voltage signal Vtemp control that temperature sensor produces from underlayer voltage VBB1, VBB2 ... one of selection outputs on the transistor substrate voltage of DRAM array among the VBBn
Wherein, n is natural number.
2. the multistage temperature control self-refresh memory device based on threshold voltage adjustments according to claim 1 is characterized in that oscillator produces refresh signal frq, then outputs to frequency divider.
3. the multistage temperature control self-refresh memory device based on threshold voltage adjustments according to claim 2 is characterized in that frequency divider carries out frequency division to the refresh signal frq that oscillator produces, the refreshing frequency frqs behind the generation frequency division.
4. the multistage temperature based on threshold voltage adjustments according to claim 3 is controlled the self-refresh memory device, it is characterized in that, under Vtemp control, first selector is selected to provide final refreshing frequency Refrq from a plurality of refreshing frequency frqs, outputs to the DRAM array.
5. the multistage temperature control self-refresh memory device based on threshold voltage adjustments according to claim 1 is characterized in that the underlayer voltage stable module comprises three fixed value resistances, triode T1, comparer and a charge pump.
6. the multistage temperature control self-refresh memory device based on threshold voltage adjustments according to claim 5 is characterized in that triode is taken from redundancy unit for the identical transistor of transistor in the DRAM array.
7. the multistage temperature control self-refresh memory device based on threshold voltage adjustments according to claim 6 is characterized in that, obtains underlayer voltage VBBn by adjusting three fixed value resistances.
8. the multistage temperature control self-refresh memory device based on threshold voltage adjustments according to claim 1 is characterized in that second selector is ternary transmission gate.
9. method for refreshing based on the multistage temperature control self-refresh memory device of threshold voltage adjustments, described memory device comprises oscillator, frequency divider, temperature sensor, first selector, described temperature sensor is connected with first selector, oscillator is connected to frequency divider, frequency divider is connected with first selector, and first selector is connected with the DRAM array, it is characterized in that:
Underlayer voltage VBB1, VBB2 during n underlayer voltage stable module generation DRAM keeps ... VBBn, second selector under the temperature voltage signal Vtemp control that temperature sensor produces from underlayer voltage VBB1, VBB2 ... one of selection outputs on the transistor substrate voltage of DRAM array among the VBBn, wherein, n is natural number.
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Cited By (5)
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| CN107103926A (en) * | 2016-02-22 | 2017-08-29 | 力晶科技股份有限公司 | Volatile semiconductor storage device, its new control circuit and method again |
| CN107771273A (en) * | 2015-08-06 | 2018-03-06 | 桑迪士克科技有限责任公司 | The ring oscillator for the temperature detection supplied for broadband in noise circumstance |
| CN109168190A (en) * | 2018-08-31 | 2019-01-08 | 维沃移动通信有限公司 | A kind of power consumption control method and device |
| US11488652B2 (en) | 2020-12-18 | 2022-11-01 | Windbond Electronics Corp. | Semiconductor memory device to control operating timing based on temperature of the memory device |
| US11536613B2 (en) | 2020-04-01 | 2022-12-27 | Winbond Electronics Corp. | Temperature sensing circuit and sensing method thereof |
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| US6529421B1 (en) * | 2001-08-28 | 2003-03-04 | Micron Technology, Inc. | SRAM array with temperature-compensated threshold voltage |
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| KR20050094003A (en) * | 2004-03-17 | 2005-09-26 | 주식회사 하이닉스반도체 | Refresh oscillator |
| CN1734667A (en) * | 2004-07-16 | 2006-02-15 | 尔必达存储器株式会社 | Refresh period generating circuit |
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| US6529421B1 (en) * | 2001-08-28 | 2003-03-04 | Micron Technology, Inc. | SRAM array with temperature-compensated threshold voltage |
| CN1610948A (en) * | 2001-11-02 | 2005-04-27 | 桑迪士克股份有限公司 | Non-volatile memory with temperature-compensated data read |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107771273A (en) * | 2015-08-06 | 2018-03-06 | 桑迪士克科技有限责任公司 | The ring oscillator for the temperature detection supplied for broadband in noise circumstance |
| CN107771273B (en) * | 2015-08-06 | 2020-07-21 | 桑迪士克科技有限责任公司 | Ring oscillator for temperature detection in broadband supply noise environments |
| CN107103926A (en) * | 2016-02-22 | 2017-08-29 | 力晶科技股份有限公司 | Volatile semiconductor storage device, its new control circuit and method again |
| CN107103926B (en) * | 2016-02-22 | 2021-01-15 | 力晶积成电子制造股份有限公司 | Volatile semiconductor memory device, refresh control circuit and method thereof |
| CN109168190A (en) * | 2018-08-31 | 2019-01-08 | 维沃移动通信有限公司 | A kind of power consumption control method and device |
| US11536613B2 (en) | 2020-04-01 | 2022-12-27 | Winbond Electronics Corp. | Temperature sensing circuit and sensing method thereof |
| US11488652B2 (en) | 2020-12-18 | 2022-11-01 | Windbond Electronics Corp. | Semiconductor memory device to control operating timing based on temperature of the memory device |
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| CN103021451B (en) | 2016-03-30 |
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