CN103019978A - Intelligent triggering device based on embedded system and control method thereof - Google Patents
Intelligent triggering device based on embedded system and control method thereof Download PDFInfo
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Abstract
An intelligent triggering device based on an embedded system comprises a power supply and further comprises an ARM (Advanced RISC Machines) system board, a signal acquisition module and a signal trigger module, wherein the signal acquisition module is used for completing real-time acquisition of a multi-channel data signal and outputting the signal to the ARM system board through an I2C bus interface; the ARM system board receives the acquired data signal in real time, processes the multi-channel data signal in real time by using a built-in data processing model, generates triggering data when built-in triggering strategies are met, and outputs the triggering date through a GPIO (General Purpose Input/Output) interface; and communication between the signal trigger module and the ARM system board is realized by the GPIO interface, and the signal trigger module generates a corresponding triggering signal according to the triggering data. According to the device, the real-time acquisition of the multi-channel data signal, synchronous and efficient data analysis, and timely outputting of the trigger signal are realized. The invention further provides a control method of the device.
Description
Technical field
The present invention relates to a kind of signal flip flop equipment, particularly a kind of signal flip flop equipment based on embedded system.
Background technology
At present, in materials mechanics experimental, not only need to record the data of the sensors such as load, displacement, also often need to take synchronously the photo of sample deformation destructive process.When adopting general camera to take, load or displacement in the time of can manually controlling shutter and records photographing.Although synchronous error is not very large, if shooting interval more in short-term, experimental implementation is still very loaded down with trivial details, and workload is very large.If adopt high speed camera to take, because will take hundreds and thousands of even hundreds thousand of photograph frames a second, it is very large manually controlling the error that shutter brings.It is very poor to be not only synchronism, sometimes even missed right moment for camera.In addition, when the equipment cooperatings such as material experiment-machine and scanning electron microscope, industry CT, acoustic emission, also need the corresponding load displacement information such as synchronous recording SEM image, CT image, acoustic emission information, or start the shooting recording process according to specific load displacement data.Existing material experiment-machine does not generally provide the output port of trigger pip.Extremely indivedual high-end experimental machine also just only provide one to export the port of trigger pip according to predetermined threshold value, can not export trigger pip according to the data of Real-time Collection.
Because trigger pip will be exported according to the data results such as load displacement that measure, real-time and high-precision data acquisition is primary basis.After receiving measurement data, need to carry out a series of intelligent decision, to determine whether to export trigger pip.Although can select microcomputer to finish these work, because its volume is larger, inconvenience is mobile, lacks dirigibility, and since microcomputer and operating system thereof based on the Princeton structure, real-time is undesirable.Though and single-chip microcomputer and dsp chip can well be realized real-time data acquisition, indifferent to the logic analysis of data, be difficult to adjust flexibly the data analysis determination methods according to concrete experiment purpose and export trigger pip.
Summary of the invention
The purpose of this invention is to provide a kind of intelligent trigger device based on embedded system, solution can't be carried out to the signal of a large amount of Real-time Collections complicated data analysis, and in time generates the technical matters of Trig control signal.
Another object of the present invention provides a kind of control method to above-mentioned intelligent trigger device based on embedded system, solves signals collecting, data are processed and control signal generates and is difficult for synchronously and the technical matters of coordinating.
Intelligent trigger device based on embedded system of the present invention comprises power supply, wherein: and also comprise ARM system board, signal acquisition module and signal trigger module,
Signal acquisition module is used for finishing the Real-time Collection to the multichannel data signal, and exports to the ARM system board by the I2C data bus interface;
The ARM system board receives the data-signal of Real-time Collection, utilizes built-in data processing model that the multichannel data signal is processed in real time, generates trigger data when meeting built-in trigger policy, exports by the GPIO interface;
The signal trigger module is communicated by letter with the ARM system board by the GPIO interface, generates corresponding trigger pip according to trigger data.
Described signal acquisition module comprises hyperchannel A/D conversion equipment and I2C bus interface,
Hyperchannel A/D conversion equipment is used for gathering simultaneously the multichannel real-time data signal, the output image data; By the I2C bus interface image data is sent to the ARM system board;
Hyperchannel A/D conversion equipment comprises signal regulating device, analog-digital commutator and channel selection device,
Signal regulating device is converted to the voltage magnitude of signal source to be collected the voltage signal output of setting in the amplitude range in proportion;
Analog-digital commutator, the voltage signal that signal regulating device is exported carries out exporting as image data after the analog to digital conversion;
Channel selection device, selected one or several signal inputs as signal regulating device from several signal sources to be collected.
Described signal trigger module comprises electrical level drive apparatus and GPIO interface,
Electrical level drive apparatus receives trigger data by the GPIO interface, and trigger data is converted to corresponding pulse signal or analog signal output.
Described signal trigger module also comprises the first trigger switch circuit, and the first trigger switch circuit is by GPIO interface input trigger message.
Described signal trigger module also comprises the second trigger switch circuit, will input trigger message and directly be converted to corresponding pulse signal or analog signal output.
Comprise the first A/D converter, the second A/D converter, the first full differential amplifier, the second full differential amplifier, multiplexer in the described signal acquisition module,
The pin 3 of the first A/D converter is connected respectively the I2C bus interface that is connected the peripheral system plate by the pin SCL of I2C bus interface with pin SDA with pin, connection+5V operating voltage behind the pin 3 connection pull-up resistor R21 of the first A/D converter, connection+5V operating voltage behind the pin 4 connection pull-up resistor R22 of the first A/D converter, the pin 5 connection+5V operating voltage of the first A/D converter, pin 2 ground connection of the first A/D converter;
The pin 3 of the second A/D converter is connected respectively the I2C bus interface that is connected the peripheral system plate by the pin SCL of I2C bus interface with pin SDA with pin, connection+5V operating voltage behind the pin 3 connection pull-up resistor R21 of the second A/D converter, connection+5V operating voltage behind the pin 4 connection pull-up resistor R22 of the second A/D converter, the pin 5 connection+5V operating voltage of the second A/D converter, pin 2 ground connection of the second A/D converter;
The pin 5 of the first full differential amplifier connects the pin 6 of the first A/D converter, the pin 4 of the first full differential amplifier connects the pin 1 of the first A/D converter, the pin 6 connection-12V operating voltage of the first full differential amplifier, the pin 3 connection+12V operating voltage of the first full differential amplifier, the pin 8 that connects multiplexer behind the pin 8 resistance in series R1 of the first full differential amplifier, ground connection behind the pin 1 resistance in series R3 of the first full differential amplifier, the pin 2 of the first full differential amplifier connects the output voltage of voltage reference circuit, contact resistance R2 between the pin 8 of the first full differential amplifier and the pin 5, contact resistance R4 between the pin 1 of the first full differential amplifier and the pin 4;
The pin 5 of the second full differential amplifier connects the pin 6 of the second A/D converter, the pin 4 of the second full differential amplifier connects the pin 1 of the second A/D converter, the pin 6 connection-12V operating voltage of the second full differential amplifier, the pin 3 connection+12V operating voltage of the second full differential amplifier, connect signal source to be collected behind the pin 8 resistance in series R5 of the second full differential amplifier, ground connection behind the pin 1 resistance in series R7 of the second full differential amplifier, the pin 2 of the second full differential amplifier connects the output voltage of voltage reference circuit, contact resistance R6 between the pin 8 of the second full differential amplifier and the pin 5, contact resistance R8 between the pin 1 of the second full differential amplifier and the pin 4;
The pin 2 connection+12V operating voltage of multiplexer, the pin 1 of multiplexer, pin 16, pin 15 connect the GPIO interface of peripheral system plate, the pin 3 connection-12V operating voltage of multiplexer, the pin 13 connection+12V operating voltage of multiplexer, the pin 4 of multiplexer, pin 5, pin 6, pin 7, pin 12, pin 11, pin 10, pin 9 connect signal source to be collected, pin 14 ground connection of multiplexer.
Described signal trigger module comprises level transferring chip, button S1, button S2, field-effect transistor Q1, light emitting diode D1, trigger,
Export trigger pip behind the pin 6 resistance in series R34 of level transferring chip, the pin 1 connection+5V operating voltage of level transferring chip, ground connection behind the pin 1 series capacitance C12 of level transferring chip, the pin 2 of level transferring chip is connected with pin and is connected digital reference ground, the pin 18 of level transferring chip connects the GPIO interface of peripheral system plate by the GPIO interface, the pin 11 of level transferring chip, pin 12, pin 13 ground connection, the pin 23 of level transferring chip and pin 24 are by capacitor C 13 ground connection, and the pin 23 of level transferring chip connects the 3.3V operating voltage;
Button S1 one end ground connection, the other end of button S1 connects the GPIO interface, connects the 3.3V operating voltage behind the end resistance in series R30 of button S1 connection GPIO interface;
Connect the GPIO interface behind the gate series resistance R31 of field-effect transistor Q1, connect the 3.3V operating voltage behind the gate series resistance R32 of field-effect transistor Q1, the grounded drain of field-effect transistor Q1, the source electrode of the field-effect transistor Q1 light emitting diode D1 that connects successively is connected rear connection+5V operating voltage, the anodal contact resistance R33 of light emitting diode D1 with resistance R;
Button S2 one end ground connection, the input end that connects trigger behind the other end resistance in series R35 of button S2, the output terminal output trigger pip of trigger, connection+5V operating voltage behind the input end resistance in series R36 of trigger, ground connection behind the input end series capacitance C10 of trigger.
Described signal acquisition module also comprises voltage reference circuit, sets described amplitude range by the output voltage of voltage reference circuit.
Control method according to described intelligent trigger device based on embedded system may further comprise the steps:
Real-time Collection described in the described the step 1 or directly data stream that gathers is sent to the ARM system board through the I2C bus, or the data stream that gathers is selected, then be sent to the ARM system board through the I2C bus;
When generating trigger data described in the described step 2, the data and the trigger data that gather are preserved, and graphical data is exported to display device;
Trigger pip described in the described step 3 also comprises by the trigger pip of the first trigger switch circuit to the trigger message generation of ARM system board transmission, also comprises the trigger pip that manually generates by the second trigger switch circuit.
Control method according to described intelligent trigger device based on embedded system may further comprise the steps:
S03 arranges trigger pip output cycle, the data collection cycle of signal source by the ARM system board;
S04, ARM system board monitor from GPIO bus hardware look-at-me or from the software interruption signal of GUI interface, do not receive that look-at-me carries out the judgement of s05, receive that look-at-me carries out s09;
S05, the ARM system board judges whether data signal samples according to data collection cycle, carries out s06 when needs are sampled, and returns s04 when not needing to sample;
S06, ARM system board read in the data-signal of collection from the I2C bus;
S07, the ARM system board is analyzed data, generates the trigger data parameter according to transaction module;
S08, the ARM system board judges whether to export trigger pip according to trigger policy, carries out s09 when the output trigger pip, carries out s081 when not exporting trigger pip;
S081, the ARM system board judges whether to reach the trigger pip output cycle according to trigger policy, carries out s09 during the cycle when reaching trigger pip output, does not carry out s10 during the cycle when reaching trigger pip output;
S09, the ARM system board is write the GPIO interface with trigger pip;
S10, ARM system board record data show data by the GUI interface;
S11, whether ARM system board judgment experiment process finishes, and carries out s12 during end, carries out s04 when not finishing;
S12, the ARM system board is saved to the SD card with deal with data.
Intelligent trigger device based on embedded system of the present invention, the data analysis of multi-channel data signal Real-time Collection, synchronous high-efficiency and timely trigger pip output have been realized, utilize the powerful flush bonding processor of ARM system board for the data collection and analysis of system provides hardware supported and software support, have good real-time and abundant arithmetic capability;
The operational performance of ARM system board and flexible expansion interface can be realized graphical interfaces operating system, by the forthright and sincere color touch-screen of high-resolution, can be by the various curve forms data that collect that show directly perceived, has good man-machine interface, experiment parameter conveniently is set, selects the trigger pip way of output and signal type;
Signal acquisition module and signal trigger module can be adjusted acquisition channel number, output channel number, keyswitch number as required, are convenient to system upgrade and safeguard;
The high-resolution analog to digital conversion of signal acquisition module and the I2C bus that is connected with the ARM system board can realize reliably hyperchannel Real time Data Acquisition function;
The signal trigger module can provide the multiple trigger pip way of output, can be directly by keyswitch circuit output hardware trigger signal, also can realize by software the output of the trigger pip of various Transistor-Transistor Logic level types, the output source comprises that the data that collect are judged, the GPIO port hardware interrupts and various GUI operation, support three kinds of trigger modes, comprise disrumpent feelings detection, interval record and manual triggers;
Intelligent trigger device based on embedded system of the present invention can realize that the data based intelligence software that collects triggers, and the programmed instruction that is implemented in the data handling procedure triggers;
By the intelligent trigger device based on embedded system of the present invention, can in test process, export trigger pip according to the data that record, automatic shooting captures the photo that all need such as devices such as general camera, high speed camera, scanning electron microscope in control, improve reliability, and avoided the manual operations that repeats.
Below in conjunction with accompanying drawing embodiments of the invention are described further.
Description of drawings
Fig. 1 is the structural representation that the present invention is based on the intelligent trigger device of embedded system;
Fig. 2 the present invention is based in the intelligent trigger device of embedded system the structural representation of analog to digital conversion circuit in the signal acquisition module;
Fig. 3 the present invention is based in the intelligent trigger device of embedded system the structural representation of the first differential amplifier circuit in the signal acquisition module;
Fig. 4 the present invention is based in the intelligent trigger device of embedded system the structural representation of the second full differential amplifier circuit in the signal acquisition module;
Fig. 5 the present invention is based in the intelligent trigger device of embedded system the structural representation of multiplexer circuit in the signal trigger module;
Fig. 6 the present invention is based in the intelligent trigger device of embedded system the structural representation of the first trigger switch (hardware trigger) circuit in the signal trigger module;
Fig. 7 is the structural representation that the present invention is based on signal trigger module indicating circuit in the intelligent trigger device of embedded system;
Fig. 8 the present invention is based in the intelligent trigger device of embedded system the structural representation of the second trigger switch (manual triggers) circuit in the signal trigger module;
Fig. 9 the present invention is based in the intelligent trigger device of embedded system the structural representation of electrical level drive apparatus circuit in the signal trigger module;
Figure 10 is for utilizing the intelligent trigger device that the present invention is based on embedded system to carry out the process flow diagram of trigger process control.
Embodiment
As shown in Figure 1, present embodiment based on the intelligent trigger device of embedded system by ARM system board 01, signal acquisition module 02 and signal trigger module 03 form, signal acquisition module 02 is used for finishing the Real-time Collection to the multichannel data signal, and by the output of I2C data bus interface, ARM system board 01 receives the data-signal of Real-time Collection, utilize built-in data processing model that the multichannel data signal is processed in real time, when meeting built-in trigger policy, generate trigger data, signal trigger module 03 is communicated by letter with ARM system board 01 by the GPIO data bus interface, generates corresponding trigger pip according to trigger data.
Hyperchannel A/D conversion equipment 021 comprises signal regulating device 211, analog-digital commutator 212 and channel selection device 213, and signal regulating device 211 is converted to the voltage magnitude of signal source to be collected the voltage signal output of setting in the amplitude range in proportion; By voltage reference circuit 214 setting voltage amplitude ranges; Analog-digital commutator 212, the voltage signal that signal regulating device 211 is exported carries out exporting as image data after the analog to digital conversion; Channel selection device 213, selected one or several signal inputs as signal regulating device 211 from several signal sources to be collected;
When the negligible amounts of signal source to be collected, each signal source to be collected is connected corresponding signal regulating device 211 and analog-digital commutator 212 successively, the data communication device that gathers is crossed the I2C bus interface directly to be exported, when the quantity of signal source to be collected is more, part signal source to be collected is connected corresponding signal regulating device 211 and analog-digital commutator 212 by channel selection device 213, the image data of selected signal source is directly exported by the I2C bus interface.
Working power in the present embodiment provides ± 3.3V, ± 5V and ± the 12V operating voltage.In the present embodiment, ARM system board 01 is selected the minimum system based on INTEL XSCALE PXA270 series processors, comprise operating system, touch display screen interface, USB interface, network interface, RS232 serial ports, keyboard interface, SD card interface, audio interface and expansion interface, expansion interface out-put supply signal, IO signal, spi bus signal, I2C bus signals, GPIO signal, interface clock signal etc.; Signal regulating device 211 adopts the full differential amplifier of THS4131 series, can be contracted to by the signal in the resistance adjustment amplifier gain general ± 10V scope ± 2V between, and pass through with reference to power end access+2V voltage reference, the equal lifting 2V of two ends signal voltage with difference output, set accordingly amplitude range, adapt to the signal input voltage requirement of subsequent conditioning circuit; Voltage reference circuit 214 adopts REF5020 series voltage fiducial chip; Analog-digital commutator 212 adopts the ADS1110 family chip, with 16 A/D converters of voltage reference in the sheet, can satisfy high resolving power and measure.This chip can carry out sample conversion by the interior difference input voltage of right ± 2.048V, and compatible I2C serial line interface is worked under the single supply of 2.7V to 5.5V.Figure 2 shows that the connecting circuit schematic diagram of ADS1110.ADS1110 has 8 kinds of different types, and every type has a different I2C address.Therefore for the data acquisition below 8 passages, can directly adopt a plurality of ADS1110 chips to get final product; Channel selection device 213 adopts the ADG508 family chip, is 8 tunnels analogy multiplexers; Electrical level drive apparatus 031 adopts the SN74LVC8T245 family chip, carries out the dual-supply voltage level conversion; The second trigger switch circuit 034 adopts the 74ALS14 family chip, carries out signal inversion and wave shaping.
Extremely shown in Figure 5 such as Fig. 2, comprise the first A/D converter U1 in the signal acquisition module 02, the second A/D converter U2, the first full differential amplifier U3, the second full differential amplifier U4, multiplexer U5, the pin 3 of the first A/D converter U1 is connected respectively the I2C bus interface that is connected peripheral system plate 012 by the pin SCL of I2C bus interface with pin SDA with pin, connection+5V operating voltage behind the pin 3 connection pull-up resistor R21 of the first A/D converter U1, connection+5V operating voltage behind the pin 4 connection pull-up resistor R22 of the first A/D converter U1, the pin 5 connection+5V operating voltage of the first A/D converter U1, pin 2 ground connection of the first A/D converter U1.
The pin 3 of the second A/D converter U2 is connected respectively the I2C bus interface that is connected peripheral system plate 012 by the pin SCL of I2C bus interface with pin SDA with pin, connection+5V operating voltage behind the pin 3 connection pull-up resistor R21 of the second A/D converter U2, connection+5V operating voltage behind the pin 4 connection pull-up resistor R22 of the second A/D converter U2, the pin 5 connection+5V operating voltage of the second A/D converter U2, pin 2 ground connection of the second A/D converter U2.
The pin 5 of the first full differential amplifier U3 connects the pin 6 of the first A/D converter U1, the pin 4 of the first full differential amplifier U3 connects the pin 1 of the first A/D converter U1, the pin 6 connection-12V operating voltage of the first full differential amplifier U3, the pin 3 connection+12V operating voltage of the first full differential amplifier U3, the pin 8 that connects multiplexer U5 behind the pin 8 resistance in series R1 of the first full differential amplifier U3, ground connection behind the pin 1 resistance in series R3 of the first full differential amplifier U3, the pin 2 of the first full differential amplifier U3 connects the output voltage of voltage reference circuit 214, contact resistance R2 between the pin 8 of the first full differential amplifier U3 and the pin 5, contact resistance R4 between the pin 1 of the first full differential amplifier U3 and the pin 4.
The pin 5 of the second full differential amplifier U4 connects the pin 6 of the second A/D converter U2, the pin 4 of the second full differential amplifier U4 connects the pin 1 of the second A/D converter U2, the pin 6 connection-12V operating voltage of the second full differential amplifier U4, the pin 3 connection+12V operating voltage of the second full differential amplifier U4, connect signal source to be collected behind the pin 8 resistance in series R5 of the second full differential amplifier U4, ground connection behind the pin 1 resistance in series R7 of the second full differential amplifier U4, the pin 2 of the second full differential amplifier U4 connects the output voltage of voltage reference circuit 214, contact resistance R6 between the pin 8 of the second full differential amplifier U4 and the pin 5, contact resistance R8 between the pin 1 of the second full differential amplifier U4 and the pin 4.
The pin 2 connection+12V operating voltage of multiplexer U5, the pin 1 of multiplexer U5, pin 16, pin 15 connect the GPIO interface of peripheral system plate 012, the pin 3 connection-12V operating voltage of multiplexer U5, the pin 13 connection+12V operating voltage of multiplexer U5, the pin 4 of multiplexer U5, pin 5, pin 6, pin 7, pin 12, pin 11, pin 10, pin 9 connect signal source to be collected, pin 14 ground connection of multiplexer U5.
The signal acquisition module of present embodiment can flexible configuration analog to digital conversion number of channels, both can directly the data-signal that gathers be sent to peripheral system plate 012 by the I2C bus interface, be sent to peripheral system plate 012 by the I2C bus again after also can utilizing the sheet of multiplexer U5 to select the data-signal of function scheduling multi pass acquisition, associative processor core board 011 built-in data processing model, the collection transmission policy of the modulus data-signal that formation is complicated.
Extremely shown in Figure 9 such as Fig. 6, signal trigger module 03 comprises level transferring chip U7, button S1, button S2, field-effect transistor Q1, light emitting diode D1, trigger U8, export trigger pip behind the pin 6 resistance in series R34 of level transferring chip U7, the pin 1 connection+5V operating voltage of level transferring chip U7, ground connection behind the pin 1 series capacitance C12 of level transferring chip U7, the pin 2 of level transferring chip U7 is connected with pin and is connected digital reference ground, the pin 18 of level transferring chip U7 connects the GPIO interface of peripheral system plate 012 by the GPIO interface, the pin 11 of level transferring chip U7, pin 12, pin 13 ground connection, the pin 23 of level transferring chip U7 and pin 24 are by capacitor C 13 ground connection, and the pin 23 of level transferring chip U7 connects the 3.3V operating voltage.
Button S1 one end ground connection, the other end of button S1 connects the GPIO interface, connects the 3.3V operating voltage behind the end resistance in series R30 of button S1 connection GPIO interface.
Connect the GPIO interface behind the gate series resistance R31 of field-effect transistor Q1, connect the 3.3V operating voltage behind the gate series resistance R32 of field-effect transistor Q1, the grounded drain of field-effect transistor Q1, the source electrode of the field-effect transistor Q1 light emitting diode D1 that connects successively is connected rear connection+5V operating voltage, the anodal contact resistance R33 of light emitting diode D1 with resistance R.
Button S2 one end ground connection, the input end that connects trigger U8 behind the other end resistance in series R35 of button S2, the output terminal output trigger pip of trigger U8, connection+5V operating voltage behind the input end resistance in series R36 of trigger U8, ground connection behind the input end series capacitance C10 of trigger U8.
The signal trigger module 03 of present embodiment can be finished manual triggers, program condition triggering in service, ARM system board down trigger, and it is flexible to trigger type, and intensity, the frequency agile of trigger pip are adjustable, can produce multiple trigger pip for controlled device.Utilize the intelligent trigger device based on embedded system of the present invention to carry out the control method that data acquisition triggers, may further comprise the steps:
Real-time Collection described in the step 1, or directly the data stream that gathers is sent to ARM system board 01 through the I2C bus, or the data stream that gathers is selected, then be sent to ARM system board 01 through the I2C bus;
When generating trigger data described in the step 2, the data and the trigger data that gather are preserved, and graphical data is exported to display device;
Trigger pip described in the described step 3 also comprises by the trigger pip of the first trigger switch circuit 033 to the trigger message generation of ARM system board 01 transmission, also comprises the trigger pip that manually generates by the second trigger switch circuit 034.
This control method can be finished the flexible collection of multi-channel data signal and the combination of multiple triggering type, improves the data-handling efficiency based on the intelligent trigger device of embedded system, trigger pip precision and accommodation.
As shown in figure 10, utilize the intelligent trigger device based on embedded system of the present invention to carry out the control method of signal source collection-data processing-trigger pip output, may further comprise the steps:
S01 powers up startup intelligent trigger device;
S02, initialization intelligent trigger device comprises each module self check, each module original state is set;
S03 arranges trigger pip output cycle, the data collection cycle of signal source by the ARM system board;
S04, ARM system board monitor from GPIO bus hardware look-at-me or from the software interruption signal of GUI interface, do not receive that look-at-me carries out the judgement of s05, receive that look-at-me carries out s09;
S05, the ARM system board judges whether data signal samples according to data collection cycle, carries out s06 when needs are sampled, and returns s04 when not needing to sample;
S06, ARM system board read in the data-signal of collection from the I2C bus;
S07, the ARM system board is analyzed data, generates the trigger data parameter according to transaction module;
S08, the ARM system board judges whether to export trigger pip according to trigger policy, carries out s09 when the output trigger pip, carries out s081 when not exporting trigger pip;
S081, the ARM system board judges whether to reach the trigger pip output cycle according to trigger policy, carries out s09 during the cycle when reaching trigger pip output, does not carry out s10 during the cycle when reaching trigger pip output;
S09, the ARM system board is write the GPIO interface with trigger pip;
S10, ARM system board record data show data by the GUI interface;
S11, whether ARM system board judgment experiment process finishes, and carries out s12 during end, carries out s04 when not finishing;
S12, the ARM system board is saved to the SD card with deal with data;
S13, ARM system board close the device drives signal of each module;
S14 finishes experimentation.
This control method is finished manual triggers at step s04 by look-at-me, finish disrumpent feelings detection at step s08 by data processed result, finish the interval record at step s081 by timer, so that the combined result of trigger pip produces diversity, can satisfy complicated trigger method design.
Above-described embodiment is described preferred implementation of the present invention; be not that scope of the present invention is limited; design under the prerequisite of spirit not breaking away from the present invention; various distortion and improvement that those of ordinary skills make technical scheme of the present invention all should fall in the definite protection domain of claims of the present invention.
Claims (10)
1. the intelligent trigger device based on embedded system comprises power supply, it is characterized in that: also comprise ARM system board (01), signal acquisition module (02) and signal trigger module (03),
Signal acquisition module (02) is used for finishing the Real-time Collection to the multichannel data signal, and exports to ARM system board (01) by the I2C data bus interface;
ARM system board (01) receives the data-signal of Real-time Collection, utilizes built-in data processing model that the multichannel data signal is processed in real time, generates trigger data when meeting built-in trigger policy, exports by the GPIO interface;
Signal trigger module (03) is communicated by letter with ARM system board (01) by the GPIO interface, generates corresponding trigger pip according to trigger data.
2. the intelligent trigger device based on embedded system according to claim 1 is characterized in that: described signal acquisition module (02) comprises hyperchannel A/D conversion equipment (021) and I2C bus interface,
Hyperchannel A/D conversion equipment (021) is used for gathering simultaneously the multichannel real-time data signal, the output image data; By the I2C bus interface image data is sent to ARM system board (01);
Hyperchannel A/D conversion equipment (021) comprises signal regulating device (211), analog-digital commutator (212) and channel selection device (213),
Signal regulating device (211) is converted to the voltage magnitude of signal source to be collected the voltage signal output of setting in the amplitude range in proportion;
Analog-digital commutator (212), the voltage signal that signal regulating device (211) is exported carries out exporting as image data after the analog to digital conversion;
Channel selection device (213), selected one or several signal inputs as signal regulating device (211) from several signal sources to be collected.
3. the intelligent trigger device based on embedded system according to claim 2 is characterized in that: described signal trigger module (03) comprises electrical level drive apparatus (031) and GPIO interface,
Electrical level drive apparatus (031) receives trigger data by the GPIO interface, and trigger data is converted to corresponding pulse signal or analog signal output.
4. the intelligent trigger device based on embedded system according to claim 3, it is characterized in that: described signal trigger module (03) also comprises the first trigger switch circuit (033), and the first trigger switch circuit (033) is by GPIO interface input trigger message.
5. the intelligent trigger device based on embedded system according to claim 4, it is characterized in that: described signal trigger module (03) also comprises the second trigger switch circuit (034), will input trigger message and directly be converted to corresponding pulse signal or analog signal output.
6. the intelligent trigger device based on embedded system according to claim 5, it is characterized in that: comprise the first A/D converter (U1), the second A/D converter (U2), the first full differential amplifier (U3), the second full differential amplifier (U4), multiplexer (U5) in the described signal acquisition module (02)
The pin 3 of the first A/D converter (U1) is connected respectively the I2C bus interface that is connected peripheral system plate (012) by the pin SCL of I2C bus interface with pin SDA with pin, connection+5V operating voltage behind the pin 3 connection pull-up resistor R21 of the first A/D converter (U1), connection+5V operating voltage behind the pin 4 connection pull-up resistor R22 of the first A/D converter (U1), the pin 5 connection+5V operating voltage of the first A/D converter (U1), pin 2 ground connection of the first A/D converter (U1);
The pin 3 of the second A/D converter (U2) is connected respectively the I2C bus interface that is connected peripheral system plate (012) by the pin SCL of I2C bus interface with pin SDA with pin, connection+5V operating voltage behind the pin 3 connection pull-up resistor R21 of the second A/D converter (U2), connection+5V operating voltage behind the pin 4 connection pull-up resistor R22 of the second A/D converter (U2), the pin 5 connection+5V operating voltage of the second A/D converter (U2), pin 2 ground connection of the second A/D converter (U2);
The pin 5 of the first full differential amplifier (U3) connects the pin 6 of the first A/D converter (U1), the pin 4 of the first full differential amplifier (U3) connects the pin 1 of the first A/D converter (U1), the pin 6 connection-12V operating voltage of the first full differential amplifier (U3), the pin 3 connection+12V operating voltage of the first full differential amplifier (U3), the pin 8 that connects multiplexer (U5) behind the pin 8 resistance in series R1 of the first full differential amplifier (U3), ground connection behind the pin 1 resistance in series R3 of the first full differential amplifier (U3), the pin 2 of the first full differential amplifier (U3) connects the output voltage of voltage reference circuit (214), contact resistance R2 between the pin 8 of the first full differential amplifier (U3) and the pin 5, contact resistance R4 between the pin 1 of the first full differential amplifier (U3) and the pin 4;
The pin 5 of the second full differential amplifier (U4) connects the pin 6 of the second A/D converter (U2), the pin 4 of the second full differential amplifier (U4) connects the pin 1 of the second A/D converter (U2), the pin 6 connection-12V operating voltage of the second full differential amplifier (U4), the pin 3 connection+12V operating voltage of the second full differential amplifier (U4), connect signal source to be collected behind the pin 8 resistance in series R5 of the second full differential amplifier (U4), ground connection behind the pin 1 resistance in series R7 of the second full differential amplifier (U4), the pin 2 of the second full differential amplifier (U4) connects the output voltage of voltage reference circuit (214), contact resistance R6 between the pin 8 of the second full differential amplifier (U4) and the pin 5, contact resistance R8 between the pin 1 of the second full differential amplifier (U4) and the pin 4;
The pin 2 connection+12V operating voltage of multiplexer (U5), the pin 1 of multiplexer (U5), pin 16, pin 15 connect the GPIO interface of peripheral system plate (012), the pin 3 connection-12V operating voltage of multiplexer (U5), the pin 13 connection+12V operating voltage of multiplexer (U5), the pin 4 of multiplexer (U5), pin 5, pin 6, pin 7, pin 12, pin 11, pin 10, pin 9 connect signal source to be collected, pin 14 ground connection of multiplexer (U5).
7. the intelligent trigger device based on embedded system according to claim 6, it is characterized in that: described signal trigger module (03) comprises level transferring chip (U7), button S1, button S2, field-effect transistor Q1, light emitting diode D1, trigger (U8)
Export trigger pip behind the pin 6 resistance in series R34 of level transferring chip (U7), the pin 1 connection+5V operating voltage of level transferring chip (U7), ground connection behind the pin 1 series capacitance C12 of level transferring chip (U7), the pin 2 of level transferring chip (U7) is connected with pin and is connected digital reference ground, the pin 18 of level transferring chip (U7) connects the GPIO interface of peripheral system plate (012) by the GPIO interface, the pin 11 of level transferring chip (U7), pin 12, pin 13 ground connection, the pin 23 of level transferring chip (U7) and pin 24 are by capacitor C 13 ground connection, and the pin 23 of level transferring chip (U7) connects the 3.3V operating voltage;
Button S1 one end ground connection, the other end of button S1 connects the GPIO interface, connects the 3.3V operating voltage behind the end resistance in series R30 of button S1 connection GPIO interface;
Connect the GPIO interface behind the gate series resistance R31 of field-effect transistor Q1, connect the 3.3V operating voltage behind the gate series resistance R32 of field-effect transistor Q1, the grounded drain of field-effect transistor Q1, the source electrode of the field-effect transistor Q1 light emitting diode D1 that connects successively is connected rear connection+5V operating voltage, the anodal contact resistance R33 of light emitting diode D1 with resistance R;
Button S2 one end ground connection, the input end that connects trigger (U8) behind the other end resistance in series R35 of button S2, the output terminal output trigger pip of trigger (U8), connection+5V operating voltage behind the input end resistance in series R36 of trigger (U8), ground connection behind the input end series capacitance C10 of trigger (U8).
8. the intelligent trigger device based on embedded system according to claim 7, it is characterized in that: described signal acquisition module (02) also comprises voltage reference circuit (214), sets described amplitude range by the output voltage of voltage reference circuit (214).
9. according to claim 1 to the control method of 8 arbitrary described intelligent trigger devices based on embedded system, it is characterized in that: may further comprise the steps:
Step 1 is by the data-signal of signal acquisition module (02) each data source of Real-time Collection or signal source;
Step 2, the data-signal by ARM system board (01) analyzing and processing gathers generates trigger data, and output;
Step 3, signal trigger module (03) generates corresponding trigger pip according to trigger data.
Real-time Collection described in the described the step 1 or directly data stream that gathers is sent to ARM system board (01) through the I2C bus, or the data stream that gathers is selected, then be sent to ARM system board (01) through the I2C bus;
When generating trigger data described in the described step 2, the data and the trigger data that gather are preserved, and graphical data is exported to display device;
Trigger pip described in the described step 3 also comprises by the trigger pip of the first trigger switch circuit (033) to the trigger message generation of ARM system board (01) transmission, also comprises the trigger pip that manually generates by the second trigger switch circuit (034).
10. according to claim 1 to the control method of 8 arbitrary described intelligent trigger devices based on embedded system, it is characterized in that: may further comprise the steps:
S03 arranges trigger pip output cycle, the data collection cycle of signal source by the ARM system board;
S04, ARM system board monitor from GPIO bus hardware look-at-me or from the software interruption signal of GUI interface, do not receive that look-at-me carries out the judgement of s05, receive that look-at-me carries out s09;
S05, the ARM system board judges whether data signal samples according to data collection cycle, carries out s06 when needs are sampled, and returns s04 when not needing to sample;
S06, ARM system board read in the data-signal of collection from the I2C bus;
S07, the ARM system board is analyzed data, generates the trigger data parameter according to transaction module;
S08, the ARM system board judges whether to export trigger pip according to trigger policy, carries out s09 when the output trigger pip, carries out s081 when not exporting trigger pip;
S081, the ARM system board judges whether to reach the trigger pip output cycle according to trigger policy, carries out s09 during the cycle when reaching trigger pip output, does not carry out s10 during the cycle when reaching trigger pip output;
S09, the ARM system board is write the GPIO interface with trigger pip;
S10, ARM system board record data show data by the GUI interface;
S11, whether ARM system board judgment experiment process finishes, and carries out s12 during end, carries out s04 when not finishing;
S12, the ARM system board is saved to the SD card with deal with data.
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