CN102983725B - Input power indifference change-over circuit - Google Patents
Input power indifference change-over circuit Download PDFInfo
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- CN102983725B CN102983725B CN201210517276.8A CN201210517276A CN102983725B CN 102983725 B CN102983725 B CN 102983725B CN 201210517276 A CN201210517276 A CN 201210517276A CN 102983725 B CN102983725 B CN 102983725B
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Abstract
This input power indifference change-over circuit, mainly solves that existing low pressure new energy power converter power consumption is high, efficiency is low, the problem of poor reliability.This invention comprises input power, the output of described input power is connected with the input of afterflow inductance and the input of input current sample circuit respectively, the output of afterflow inductance is connected with the input of VMOS switching circuit, the input of VMOS switching circuit is also connected with the output of control circuit, and the output of VMOS switching circuit is connected with load with energy storage filter circuit by reverse isolation circuit successively.
Description
Technical field
The present invention relates to a kind of power-switching circuit.
Background technology
In recent years, the renewable new energy resources system that AC low-tension, the DC low-voltages such as photovoltaic generation, wind power generation, storage battery power supply are powered is widely used, and the power supplying efficiency of raising low pressure new energy system, power supply quality, power supply reliability are imperative.
Current Power convert known in this field adopts substantially:
1, exchange (AC) input, adopt full-wave rectifier be direct current (DC) power supply input AC (AC) power rectifier, then carry out DC/DC be converted to direct current (DC) export.This kind of scheme solves the transfer problem of high-line input voltage AC power and small-power power.But when the input of low-voltage AC power supply and large power supply conversion, because the voltage drop of AC/DC rectification circuit is higher, and produce very high power consumption, make power supply changeover device conversion efficiency very low.
2, direct current (DC) input, directly carries out DC/DC and is converted to direct current (DC) output.This kind of scheme solves permanent plant powerup issue.But dependability is lower, especially at mobility equipment, often need the equipment reconnecting input power, once occur that electric power polarity connects anti-situation, input short accident will be produced.Therefore the equipment that ask for something reliability is higher, adds the directed rectification circuit of direct current at switch input.When the straight power supply input of low-voltage and large power supply conversion, because the voltage drop of the directed rectification circuit of direct current identification is higher, and produce very high power consumption, make power supply changeover device conversion efficiency very low.
3, in order to improve low-voltage power supply efficiency, reduce line current generally adopt boost type (BOOST) direct current (DC) supply power mode.Boost type (BOOST) direct current (DC) power supply produces short trouble when exporting, and output voltage lost efficacy lower than BOOST circuit function during input voltage, and input power is directly to load short circuits, and big current (high-power) system short-circuit protecting control difficulty is very large.
Be described being input as low pressure new forms of energy power supply for conventional rectification (identify directed) circuit, input voltage Ui=10V (AC, DC), input current Ii=20A, input power Pi=10 × 20=200W, rectification (identifying directed) circuit pressure drop Ud=2V, rectification (identifying directed) circuit consumption is: Pd=2 × 20=40W, power output Po=200-40=160W, its rectification (identifying directed) efficiency is: E=160/200=0.8, conventional rectification (identifying directed) circuit is when being input as low pressure new forms of energy power supply as can be seen here, power consumption is very large, and efficiency is very low.
Summary of the invention
The invention provides a kind of input power indifference change-over circuit, mainly solve that existing low pressure new energy power converter power consumption is high, efficiency is low, the problem of poor reliability.
Concrete technical solution of the present invention is as follows:
This input power indifference change-over circuit, comprise input power, the output of described input power is connected with the input of afterflow inductance and the input of input current sample circuit respectively, the output of afterflow inductance is connected with the input of VMOS switching circuit, the input of VMOS switching circuit is also connected with the output of control circuit, and the output of VMOS switching circuit is connected with load with energy storage filter circuit by reverse isolation circuit successively, described control circuit comprises width modulation type pulse control circuit, drive singal combiner circuit, VMOS switch driving circuit and afterflow voltage sampling circuit, the input of width modulation type pulse control circuit is connected with the output of input current sample circuit and the output of output current sample circuit respectively, the output of width modulation type pulse control circuit is connected with the input of drive singal combiner circuit, the input of drive singal combiner circuit is also connected with the output of afterflow voltage sampling circuit, the output of drive singal combiner circuit is connected with the input of VMOS switching circuit by VMOS switch driving circuit, the input of afterflow voltage sampling circuit is connected with the output of VMOS switching circuit, the input of described output current sample circuit is connected with the output of energy storage filter circuit, described width modulation type pulse control circuit is loop Current-type PWM Controller, and two output terminals A o, Bo of PWM controller are connected to one group of input of drive singal combiner circuit respectively, described input current sample circuit comprises current sensor CS1, electric capacity C13, resistance R21, diode D4, a current sensor CS1 and diode D4 branch road in series, electric capacity C13, resistance R21 respectively with this branch circuit parallel connection.
Described output current sample circuit comprises current sensor CS2, electric capacity C9 and diode D5, a current sensor CS2 and diode D5 branch road in series, electric capacity C9 and this branch circuit parallel connection.
Described afterflow voltage sampling circuit comprises by voltage stabilizing didoe Z3, filter capacitor C11, divider resistance R3, R4 composition output sample circuit and by voltage stabilizing didoe Z4, filter capacitor C12, divider resistance R1, the input sampling circuit of R5 composition, the output of described output sample circuit is the node between R4 and R3, this node is connected with an interface of drive singal combiner circuit input, the output of input sampling circuit is the node between R1 and R5, and this node is connected with another interface of drive singal combiner circuit input.
Described reverse isolation circuit is made up of the VMOS pipe group with the synchronous rectification of described VMOS switching circuit, is synchronously driven through afterflow drive circuit by described drive singal combiner circuit.
Described energy storage filter circuit adopts an electric capacity, the positive terminating load anode of this electric capacity, the negative terminating load negative terminal of this electric capacity.
The invention has the advantages that:
Input power indifference change-over circuit provided by the invention has XC/DC to expand (XC) shape, nonpolarity, many waveforms, wild frequency power input, DC (direct current) exports, the advantages such as auto polarity identification orientation, high conversion efficiency, High Power Factor, high reliability, high power density, low cost.
Accompanying drawing explanation
Fig. 1 is schematic block circuit diagram of the present invention;
Fig. 2 is electrical block diagram of the present invention;
Fig. 3 is automatic orientation BOOST electric current flow graph when the positive half cycle of Ui (M1, M2, M3, M4) PWM conducting;
Fig. 4 is automatic orientation BOOST electric current flow graph when the positive half cycle of Ui (M3, M4) PWM conducting afterflow;
Monocycle oscillogram when Fig. 5 to be input power be Ac is sinusoidal wave.
Embodiment
This input power indifference change-over circuit, comprise input power, the output of described input power is connected with the input of afterflow inductance and the input of input current sample circuit respectively, the output of afterflow inductance is connected with the input of VMOS switching circuit, the input of VMOS switching circuit is also connected with the output of control circuit, and the output of VMOS switching circuit is connected with load with energy storage filter circuit by reverse isolation circuit successively, described control circuit comprises width modulation type pulse control circuit, drive singal combiner circuit, VMOS switch driving circuit and afterflow voltage sampling circuit, the input of width modulation type pulse control circuit is connected with the output of input current sample circuit and the output of output current sample circuit respectively, the output of width modulation type pulse control circuit is connected with the input of drive singal combiner circuit, the input of drive singal combiner circuit is also connected with the output of afterflow voltage sampling circuit, the output of drive singal combiner circuit is connected with the input of VMOS switching circuit by VMOS switch driving circuit, the input of afterflow voltage sampling circuit is connected with the output of VMOS switching circuit, the input of described output current sample circuit is connected with the output of energy storage filter circuit, described width modulation type pulse control circuit is loop Current-type PWM Controller, and two output terminals A o, Bo of PWM controller are connected to one group of input of drive singal combiner circuit respectively, described input current sample circuit comprises current sensor CS1, electric capacity C13, resistance R21, diode D4, a current sensor CS1 and diode D4 branch road in series, electric capacity C13, resistance R21 respectively with this branch circuit parallel connection.
Output current sample circuit comprises current sensor CS2, electric capacity C9 and diode D5, a current sensor CS2 and diode D5 branch road in series, electric capacity C9 and this branch circuit parallel connection.
Afterflow voltage sampling circuit comprises by voltage stabilizing didoe Z3, filter capacitor C11, divider resistance R3, R4 composition output sample circuit and by voltage stabilizing didoe Z4, filter capacitor C12, divider resistance R1, the input sampling circuit of R5 composition, the output of described output sample circuit is the node between R4 and R3, this node is connected with an interface of drive singal combiner circuit input, the output of input sampling circuit is the node between R1 and R5, and this node is connected with another interface of drive singal combiner circuit input.
Reverse isolation circuit is made up of the VMOS pipe group with the synchronous rectification of described VMOS switching circuit, is synchronously driven through afterflow drive circuit by described drive singal combiner circuit.
Energy storage filter circuit adopts an electric capacity, the positive terminating load anode of this electric capacity, the negative terminating load negative terminal of this electric capacity.
Below the function of each Important Circuit is described:
Afterflow inductance: utilize inductance characteristic to boost to input power;
VMOS switching circuit: VMOS switching circuit conduction period, has electric current to pass through in afterflow inductance; VMOS switching circuit blocking interval, freewheeling circuit conducting, makes electric current in afterflow inductance continue conducting, produces high pressure, charge, powered after charging by energy storage filter circuit to load to energy storage filter circuit;
Energy storage filter circuit: VMOS switching circuit blocking interval charging and to load supplying;
VMOS switch driving circuit: the VMOS switching signal generate drive singal combiner circuit and VMOS afterflow signal carry out amplification process;
Drive singal combiner circuit: the PWM width modulation type pulse signal generated width modulation type pulse control circuit, the alternating current-direct current signal of voltage sampling circuit input, both positive and negative polarity signal or afterflow signal and power supply signal synthesize, and generate composite signal (comprising polarity, interchange, direct current, tune bandwidth signals); Then automatically distribute according to composite signal, divide into VMOS switching signal and VMOS afterflow signal;
Width modulation type pulse control circuit: according to input sampling circuit and/or the current sampling signal generation PWM width modulation type pulse signal exporting sample circuit input;
Afterflow voltage sampling circuit: sample to the current signal of VMOS switching circuit and freewheeling circuit, produces alternating current-direct current signal, both positive and negative polarity signal or afterflow signal, and above-mentioned signal is inputed to drive singal combiner circuit;
Input current sample circuit: input power input is sampled through the electric current of afterflow inductance, generates sampled signal and sampled signal be supplied to width modulation type pulse control circuit and process;
Below in conjunction with accompanying drawing, the present invention is described in detail:
IC1 (UCC28084 or other similar device), for standard both-end alternately exports PWM controller, adjusts wide output by device 1 end (OC) control PWM, exports alternative P WM waveform P1, P2.
R1, R5, C12, Z4 carry out detection shaping to afterflow waveform PA, form waveform P3.Wherein, voltage-stabiliser tube Z4 keeps the voltage stabilization of P3, and electric capacity C12, in order to filtering, makes can make P3 permanent High level when high level appears in PA.
R4, R3, C11, Z3 carry out detection shaping to afterflow waveform PB, form waveform P4.Wherein, voltage-stabiliser tube Z3 keeps the voltage stabilization of P4, and electric capacity C11, in order to filtering, makes can make P4 permanent High level when high level appears in PB.
IC2 (CD4071 or other similar device), for standard 2 inputs or door, wherein: Ao=A1+A2, Bo=B1+B2, Co=C1+C2, Do=D1+D2, forms staggered output pwm waveform after carrying out logic synthesis to P1, P2, P3, P4.
IC3, IC4 (IR442 or other similar device), be standard drive, wherein: Ao=Ai, Bo=Bi, carry out high speed large driven current density to VMOS, improves conversion efficiency to reduce VMOS switching power loss.
CS1, CS2, D4, D5, R21, C13 form current sense, discriminating, testing circuit, the current waveform that when automatically detecting that PWM opens, the high-end VMOS of power supply passes through.Its circuit super has very low power consumption simultaneously, adopt current sense coefficient ﹤ 100, controlling of sampling voltage ﹤ 0.5V, control power consumption Pe ﹤ 0.5 × IO × 0.01=0.005 × IO (IO is On current), when IO is 20A: Pe ﹤ 0.05 × 20=0.1W.
C7, C8, C9 are mainly used in further stress release treatment (burst pulse).
L1, D3, C14 form the LDC of BOOST booster circuit, in order to adapt to the asymmetry of input power, such as unipolarity direct current, unipolarity square wave, unipolarity triangular wave etc., L1 adopts differential mode symmetrical expression, also only can arrange inductance as L1 at the anode of input circuit or negative terminal.
The Ao port of pwm control circuit (IC1) and Bo port alternately export control signal P1, P2, and total maintenance interval time for afterflow (high level corresponding to PA waveform) between P1, P2.P3, P4 are by PA, PB waveform dividing potential drop gained in input circuit.P1, P2, P3, P4 access the input port of triggering signal combiner circuit (IC2), after carrying out foregoing or logical operation, then through switch driver IC3, IC4 driving, triggering signal are added to two VMOS switching circuit groups (M1, M2 respectively respectively; M3, M4), D3 has two inputs, is connected to anode and the negative terminal of input circuit respectively, and forward current charges to C14 through reverse isolation circuit D3.
M1 and M2 alternation in parallel, M3 and M4 alternation in parallel (each VMOS switch itself has diode in parallel with it).
Just lower negative on the positive half cycle of waveform or input direct-current are at input AC, when one of control signal P1 and P2 that pwm control circuit (IC1) exports are in high level, this XC/DC automatic orientation BOOST circuit is in PWM conducting state, electric current flows through first group of VMOS switching circuit group (M1, M2), second group of VMOS switching circuit group (M3, M4) successively from anode in input circuit, then flows back to negative terminal; Because D3 plays reverse isolation effect, the energy storage on C14 reverse flow can not be fed back into loop.
When control signal P1, P2 that pwm control circuit (IC1) exports are low level, then M1, M2 do not have triggering signal, therefore M1, M2 not conducting, but due to the existence of afterflow inductance L 1, and the diode in M3, M4 can form the conducting loop of certainly holding to input circuit negative terminal, thus the afterflow produced because of afterflow inductance in circuit is charged to C14 through D3 from the anode of input circuit, and simultaneously via the load of output loop, second group of VMOS switching circuit group (M3, M4), then flow back to negative terminal.In fact, once there is above-mentioned afterflow in circuit, namely PA is high level, PB is low level, thus P1, P2, P3, P4 are carried out or produces triggering signal after logical operation, make M3, M4 conducting, because the resistance of M3, M4 is very little, therefore, the power consumption produced in afterflow process is still very little.And boosting output itself can reduce line loss.Such as, Ui=10 (V), Uo=50 (V) after boosting, then according to P=U
2/ R is known, and line loss is only original 1/5.
Illustrate low-power consumption of the present invention: in circuit, adopt R
dS=0.001 Ω low on-resistance N raceway groove VMOS manages, and opens period M1, M2 and to interlock conducting, VMOS conducting resistance R at PWM
dS=0.001 Ω, the two-tube paralleling and interleaving conducting of M3, M4, VMOS conducting resistance R
dS=0.001 Ω/2=0.0005 Ω, if or input 20A electric current, then conducting voltage is: U1=0.001 × 20=0.02V, U2=0.0005 × 20=0.01V, identifies that directed power consumption is: Pe=20 × (0.02+0.01)=0.6W; Turn off in PWM blocking interval M1, M2 cut-off, M3, M4 two-tube paralleling and interleaving conducting afterflow, VMOS conducting resistance R
dS=0.001 Ω/2=0.0005 Ω, if 20A freewheel current, then conducting voltage is: U2=0.0005 × 20=0.01V, identifies that directed power consumption is: Pe=20 × 0.01=0.2W.Compare to the power consumption of the rectification identification directional circuit 40W of prior art, XC/DC of the present invention identifies that directed BOOST circuit power consumption significantly reduces automatically.
If reverse isolation circuit D3 also adopts synchronous VMOS switching circuit (synchronous waveform of its triggering signal and PA and PB), then the little characteristic of VMOS switching circuit resistance can be utilized to reduce line loss further.Especially when BOOST exports lower, the raising of conversion efficiency is more remarkable.
VMOS switch is under triggering signal effect, conducting forward or backwards can be realized according to added polarity of voltage, based on this characteristic, in input AC negative lower timing on waveform negative half period or input direct-current are, the course of work of this XC/DC automatic orientation BOOST circuit and above-mentioned conducting, afterflow Principle of Process are identical, and adopt symmetric circuit structure due to first group of VMOS switching circuit group (M1, M2) and second group of VMOS switching circuit group (M3, M4), be completely reversibility in the VMOS conducting of Ui negative half period and afterflow.Such as, when control signal P1, P2 that pwm control circuit (IC1) exports are low level, then M3, M4 do not have triggering signal, therefore M3, M4 not conducting, and realize afterflow process by first group of VMOS switching circuit group (M1, M2).
Visible, this BOOST circuit can complete the automatic identification of bipolar power supply (exchanging just profound ripple, square wave, triangular wave, AC power frequency, intermediate frequency, low frequency, ultralow frequency) directed automatically; And directed to the automatic identification of unipolarity power supply (direct current, direct current square wave, direct current triangular wave etc.), AC bi-polar power supply and direct current unipolarity power supply can regardless of positive and negative any accesses.
Above-described embodiment is most preferred embodiment of the present invention, and adopt this staggered PWM control mode that M1, M2 are interlocked conducting, each VMOS switch operating frequency is 1/2 channel frequency, VMOS switch can be made to work under comparatively low switching frequency, significantly reduce switching power loss; Correspondingly, in circuit, the operating frequency of L, C device is 2 times of VMOS pipe frequencies, and higher circuit work frequency reduces the requirement to inductance in lc circuit (L) amount and electric capacity (C), reduces cost and technology difficulty.In fact, based on the general principle of conducting of the present invention, afterflow, also can consider that each VMOS switching circuit group only adopts a VMOS switch, also be enough to embody technique effect of the present invention.Such as only retain M1, M3, equally also when input AC is born just down on the positive half cycle of waveform or input direct-current are, conducting loop can be realized by M1, M3, realize continuous current circuit by M3; In input AC negative lower timing on waveform negative half period or input direct-current are, realize conducting loop by M1, M3, realize continuous current circuit by M1.Certainly, under this scheme, also can attempt allowing the operating frequency of each VMOS switch reduce by half, but this just needs to increase afterflow inductance, storage capacitor exponentially, to meet the requirement of afterflow, thus cause that cost is higher, components and parts volume is comparatively large, power density reduces.
Claims (5)
1. an input power indifference change-over circuit, it is characterized in that: comprise input power, the output of described input power is connected with the input of afterflow inductance and the input of input current sample circuit respectively, the output of afterflow inductance is connected with the input of VMOS switching circuit, the input of VMOS switching circuit is also connected with the output of control circuit, and the output of VMOS switching circuit is connected with load with energy storage filter circuit by reverse isolation circuit successively, described control circuit comprises width modulation type pulse control circuit, drive singal combiner circuit, VMOS switch driving circuit and afterflow voltage sampling circuit, the input of width modulation type pulse control circuit is connected with the output of input current sample circuit and the output of output current sample circuit respectively, the output of width modulation type pulse control circuit is connected with the input of drive singal combiner circuit, the input of drive singal combiner circuit is also connected with the output of afterflow voltage sampling circuit, the output of drive singal combiner circuit is connected with the input of VMOS switching circuit by VMOS switch driving circuit, the input of afterflow voltage sampling circuit is connected with the output of VMOS switching circuit, the input of described output current sample circuit is connected with the output of energy storage filter circuit, described width modulation type pulse control circuit is loop Current-type PWM Controller,
Described drive singal combiner circuit adopts standard two to input or door, comprises two groups and amounts to four couples of input A1, A2, B1, B2, C1, C2, D1, D2 and corresponding four output terminals A o, Bo, Co, Do, Ao=A1+A2, Bo=B1+B2, Co=C1+C2, Do=D1+D2, wherein: in first group of input, input A1 and input C1 is connected to the first output of loop Current-type PWM Controller altogether, and input B1 and input D1 is connected to the second output of loop Current-type PWM Controller altogether; In second group of input, input A2 and input B2 is connected to the first output of afterflow voltage sampling circuit altogether, and input C2 and input D2 is connected to the second output of afterflow voltage sampling circuit altogether;
Described input current sample circuit comprises current sensor CS1, electric capacity C13, resistance R21, diode D4, current sensor CS1 and diode D4 the first branch road in series, electric capacity C13, resistance R21 respectively with described first branch circuit parallel connection;
First group of VMOS switching circuit group in described VMOS switching circuit and second group of VMOS switching circuit group adopt symmetric circuit structure.
2. input power indifference change-over circuit according to claim 1, it is characterized in that: described output current sample circuit comprises current sensor CS2 and diode D5, current sensor CS2 and diode D5 the second branch road in series, output current sample circuit and input current sample circuit share described electric capacity C13 and resistance R21, namely described electric capacity C13, resistance R21 also respectively with described second branch circuit parallel connection.
3. input power indifference change-over circuit according to claim 2, it is characterized in that: described afterflow voltage sampling circuit comprises by voltage stabilizing didoe Z3, filter capacitor C11, divider resistance R3, R4 composition output sample circuit and by voltage stabilizing didoe Z4, filter capacitor C12, divider resistance R1, the input sampling circuit of R5 composition, the output of described output sample circuit is the node between R4 and R3, this node is connected with an interface of drive singal combiner circuit input, the output of input sampling circuit is the node between R1 and R5, this node is connected with another interface of drive singal combiner circuit input.
4. input power indifference change-over circuit according to claim 3, it is characterized in that: described reverse isolation circuit is made up of the VMOS pipe group with the synchronous rectification of described VMOS switching circuit, is synchronously driven through afterflow drive circuit by described drive singal combiner circuit.
5. input power indifference change-over circuit according to claim 4, is characterized in that: described energy storage filter circuit adopts an electric capacity, the positive terminating load anode of this electric capacity, the negative terminating load negative terminal of this electric capacity.
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| CN201210517276.8A CN102983725B (en) | 2012-11-30 | 2012-11-30 | Input power indifference change-over circuit |
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| CN201210517276.8A CN102983725B (en) | 2012-11-30 | 2012-11-30 | Input power indifference change-over circuit |
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| CN102983725A CN102983725A (en) | 2013-03-20 |
| CN102983725B true CN102983725B (en) | 2015-08-26 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN2466848Y (en) * | 2001-01-15 | 2001-12-19 | 广东南方通信集团公司 | Rectifying module for switching supply unit |
| CN101056068A (en) * | 2005-09-12 | 2007-10-17 | 快捷半导体有限公司 | VRMS and rectified current sense full-bridge synchronous-rectification integrated with PFC |
| CN101672931A (en) * | 2009-09-24 | 2010-03-17 | 重庆大学 | Unipolar trapezoidal pulse current control method and device of inductive load |
| CN101713969A (en) * | 2009-11-19 | 2010-05-26 | 杭州电子科技大学 | Anti-clamp circuit of electric skylight |
-
2012
- 2012-11-30 CN CN201210517276.8A patent/CN102983725B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2466848Y (en) * | 2001-01-15 | 2001-12-19 | 广东南方通信集团公司 | Rectifying module for switching supply unit |
| CN101056068A (en) * | 2005-09-12 | 2007-10-17 | 快捷半导体有限公司 | VRMS and rectified current sense full-bridge synchronous-rectification integrated with PFC |
| CN101672931A (en) * | 2009-09-24 | 2010-03-17 | 重庆大学 | Unipolar trapezoidal pulse current control method and device of inductive load |
| CN101713969A (en) * | 2009-11-19 | 2010-05-26 | 杭州电子科技大学 | Anti-clamp circuit of electric skylight |
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