CN102980527B - A kind of three-dimension sensor real time high-speed data handling system based on CMOS - Google Patents

Abstract

Based on a three-dimension sensor real time high-speed data handling system of CMOS, it comprises the FPGA data processing module, kilomega network data transmission interface, computing machine and the USB data transmission interface that calculate based on the FPGA data processing module of two left and right three-dimension sensors of CMOS, two panels independent parallel, buffer memory RAM, three-dimensional reproduction; Adopt FPGA as system data process nucleus module, complete computing especially by data prediction, these four steps of mark background, code translator solution phase and heterodyne multi-frequency phase demodulation, and by interface module, the data after process are transferred to computing machine.It is digital signal that sensor based on CMOS reads view data, thus directly can transmit data to FPGA.FPGA and buffer memory work in coordination with computing, realize the real time high-speed process of data.This system has synchronous calculating, feature that computing velocity is high, can be used for the optical non-contact measurement of three-dimensional surface shape.

Description

A kind of three-dimension sensor real time high-speed data handling system based on CMOS

Technical field

The present invention relates to a kind of three-dimension sensor real time high-speed data handling system based on CMOS, this system can realize the high-speed real-time process of non-contact optical measuring system, can be used for object surface three-dimensional shape measurement.The invention belongs to optical three-dimensional measurement technical field.

Background technology

Based on the three-dimension sensor real time high-speed data handling system of CMOS as the data handling system of non-contact optical three-dimensional measurement, the numerous areas such as measuring three-dimensional morphology, reverse-engineering and quality testing can be applied to.But data processing in the past completes calculating on computers, in some computation processes, also exist that power consumption is high, arithmetic speed is slow, the shortcoming of poor real.For this problem, the general solution proposed both at home and abroad utilizes GPU to carry out parallel computation, can solve the slow shortcoming of computer CPU arithmetic speed like this.But because the multiple programming of GPU is comparatively complicated, and in order to realize higher computing velocity, inevitably improve the performance index such as instrument cost and overall power.In addition, in non-contact optical three-dimensional measurement, the view data of sensor shooting is comparatively huge, and the data correspondingly calculated are then less.In system in the past, the view data photographed directly all is passed to computing machine by sensor, unifiedly calculated by computing machine, this makes major part operation time of whole system consume in the transmission and storage of view data, thus cannot ensure high speed and the real-time of computing.

The sensor of non-contact optical three-dimensional measurement in the past uses CCD sensor devices.The electric signal that light signal changes into by CCD sensor devices is simulating signal, therefore needs additionally to carry out peripheral output circuit system and just can be connected with data handling system the transmission and calculating that realize view data.Therefore the data reading speed determining CCD sensor devices is slower.Although the resolution of CCD sensor devices is comparatively outstanding with performance index such as sensitivity in similar device, but in the data calculation processes of concrete non-contact optical three-dimensional measurement, the resolution of CCD sensor devices and sensitivity are far superior to the precision of demand, this causes the wasting of resources to a certain extent, and the system of directly results in has the defect that computing velocity is slow, power consumption is large.

As can be seen here, no matter be start with from algorithm optimization, start with from design of circuit system optimization, or start with from the selection of core parts, also do not propose a kind of data handling system solving the non-contact optical three-dimensional measurement of the shortcomings such as power consumption is high, arithmetic speed slow, poor real at present both at home and abroad.The present invention is directed to problems and propose three-dimension sensor real time high-speed data handling system based on CMOS, achieve the high rate bioreactor of non-contact optical 3 d measurement data.

Summary of the invention

1, object: the object of this invention is to provide a kind of three-dimension sensor real time high-speed data handling system based on CMOS, CMOS tri-level sensor is combined with FPGA data processing module by it, overcomes that available data disposal system arithmetic speed is slow, the problem of poor real.

2, technical scheme: technical solution of the present invention is: a kind of three-dimension sensor real time high-speed data handling system based on CMOS, it comprises the FPGA data processing module, kilomega network data transmission interface, computing machine and the USB data transmission interface that calculate based on the FPGA data processing module of two left and right three-dimension sensors of CMOS, two panels independent parallel, buffer memory RAM, three-dimensional reproduction.Position annexation between them is: two left and right three-dimension sensors based on CMOS obtain left and right camera image data, due to cmos sensor transmission of digital signals, it directly can be read; The FPGA data processing module of the data input two panels independent parallel that cmos sensor obtains, completes computing by data prediction, mark background, code translator solution phase and heterodyne multi-frequency phase demodulation four steps; Resolve in computation process in phase place, need to use the data that cmos sensor is repeatedly taken, therefore data are temporarily stored in buffer memory RAM; Complete after phase place resolves, calculation result is inputted the FPGA data processing module that three-dimensional reproduction calculates by the FPGA data processing module of two panels independent parallel simultaneously, carries out Stereo matching and three-dimensional reproduction calculates; Computation process needs to transmit the parameters such as camera calibration result, background threshold setting by computing machine to FPGA by USB interface, after having calculated, three dimensional point cloud kilomega network data transmission interface is transferred to computing machine.

Should be based on two left and right three-dimension sensors of CMOS: two relative positions are fixed and have the camera of common visual field, and its core sensor devices is CMOS chip; This buffer memory RAM is: the DDR2 cache chip be connected with FPGA; This computing machine is: store the computing machine that display data use.The FPGA data processing module that the FPGA data processing module of this independent parallel and three-dimensional reproduction calculate is all the data processing function modules in FPGA, and its algorithm routine has realized downloading in FPGA; This kilomega network data transmission interface is: kilomega network host-host protocol interface board, uses DM9000A protocol chip; This USB data transmission interface is: usb data interface section uses CY7C68013A chip as coding chip.

The principle of the invention is: based on the three-dimension sensor of CMOS, uses two panels CMOS chip to form left and right two cameras, to realize the collection of three-dimensional image information.Two panels independent parallel FPGA data processing module, after having carried out data prediction.First mark background according to the background threshold set, back of the body pixel will not be calculated in calculating afterwards, save calculated amount with this; Secondly formula is utilized to same frequency bar print image $\mathrm{\Φ}(x,y)=\arctan \frac{g_3(x,y)-g_1(x,y)}{g_0(x,y)-g_2(x,y)}$ Carry out phase place to resolve; Finally use heterodyne multi-frequency method, use formula ${\mathrm{\φ}}_1(x,y)=\frac{{\mathrm{\λ}}_2}{{\mathrm{\λ}}_1-{\mathrm{\λ}}_2}{\mathrm{\Φ}}_b(x,y)$ Carry out phase demodulation.Buffer memory RAM, in the phase place of FPGA data processing is resolved, calculating need to use four width images of the different fringe phase of the same fringe frequency of unified pixel, therefore the image photographed by sensor first prestores in buffer memory RAM, after four width phase shift stripe patterns shootings, view data is read into FPGA from buffer memory and carries out phase place and resolve.Symbol description in above formula is as follows: g _i(x, y) represents the gray-scale value of the i-th width image at point (x, y) place.

The FPGA data processing module that three-dimensional reproduction calculates, resolves the result obtained and carries out Stereo matching and three-dimensional reproduction by phase place.The camera calibration result used is needed to be transmitted by part USB interface by computing machine.Three-dimensional reproduction result used part kilomega network data transmission interface to transfer to computing machine.

3, advantage and effect: the present invention's advantage is compared with prior art: (1) adopts CMOS chip as imageing sensor, and direct reading number signal, has fireballing advantage.(2) adopt the Hardware data processing based on FPGA, real time high-speed data processing can be realized.(3) adopt the hardware system based on FPGA can reduce whole system power consumption, be conducive to the portability of system.

Accompanying drawing explanation

Fig. 1 is the system construction drawing of a kind of three-dimension sensor real time high-speed data handling system based on CMOS of the present invention;

Embodiment

See Fig. 1, based on a three-dimension sensor real time high-speed data handling system of CMOS, this system composition comprises the FPGA data processing module, kilomega network data transmission interface, computing machine and the USB data transmission interface that calculate based on the FPGA data processing module of left and right two three-dimension sensors of CMOS, two panels independent parallel, buffer memory RAM, three-dimensional reproduction.Position annexation between them is: two three-dimension sensors based on CMOS obtain left and right camera image data, due to cmos sensor transmission of digital signals, it directly can be read.The FPGA data processing module of the data input two panels independent parallel that cmos sensor obtains, completes computing by data prediction, mark background, code translator solution phase and heterodyne multi-frequency phase demodulation four steps.Resolve in computation process in phase place, need to use the data that cmos sensor is repeatedly taken, therefore data are temporarily stored in buffer memory RAM.Complete after phase place resolves, calculation result is inputted the FPGA data processing module that three-dimensional reproduction calculates by the FPGA data processing module of two panels independent parallel simultaneously, carries out Stereo matching and three-dimensional reproduction calculates.Computation process needs to transmit the parameters such as camera calibration result, background threshold setting by computing machine to FPGA by USB interface.After calculating completes, three dimensional point cloud kilomega network data transmission interface is transferred to computing machine.

Should be based on two left and right three-dimension sensors of CMOS: two relative positions are fixed and have the camera of common visual field, and its core sensor devices is CMOS chip; This buffer memory RAM is: the DDR2 cache chip be connected with FPGA; This computing machine is: store the computing machine that display data use.The FPGA data processing module that the FPGA data processing module of this independent parallel and three-dimensional reproduction calculate is all the data processing function modules in FPGA, and its algorithm routine has realized downloading in FPGA; This kilomega network data transmission interface is: kilomega network host-host protocol interface board, uses DM9000A protocol chip; This USB data transmission interface is: usb data interface section uses CY7C68013A chip as coding chip.

Based on the three-dimension sensor of CMOS, two panels CMOS chip is used to form left and right two cameras, to realize the collection of three-dimensional image information.Two panels independent parallel FPGA data processing module, after having carried out data prediction.First mark background according to the background threshold set, back of the body pixel will not be calculated in calculating afterwards, save calculated amount with this; Secondly formula is utilized to same frequency bar print image $\mathrm{\Φ}(x,y)=\arctan \frac{g_3(x,y)-g_1(x,y)}{g_0(x,y)-g_2(x,y)}$ Carry out phase place to resolve; Finally use heterodyne multi-frequency method, use formula ${\mathrm{\φ}}_1(x,y)=\frac{{\mathrm{\λ}}_2}{{\mathrm{\λ}}_1-{\mathrm{\λ}}_2}{\mathrm{\Φ}}_b(x,y)$ Carry out phase demodulation.Buffer memory RAM, in the phase place of FPGA data processing is resolved, calculating need to use four width images of the different fringe phase of the same fringe frequency of unified pixel, therefore the image photographed by sensor first prestores in buffer memory RAM, after four width phase shift stripe patterns shootings, view data is read into FPGA from buffer memory and carries out phase place and resolve.Symbol description in above formula is as follows: g _i(x, y) represents the gray-scale value of the i-th width image at point (x, y) place.

The FPGA data processing module that three-dimensional reproduction calculates, resolves the result obtained and carries out Stereo matching and three-dimensional reproduction by phase place.The camera calibration result used is needed to be transmitted by part USB interface by computing machine.Three-dimensional reproduction result used part kilomega network data transmission interface to transfer to computing machine.

Claims (1)

1. based on a three-dimension sensor real time high-speed data handling system of CMOS, it is characterized in that: it comprises the FPGA data processing module, kilomega network data transmission interface, computing machine and the USB data transmission interface that calculate based on the FPGA data processing module of two left and right three-dimension sensors of CMOS, two panels independent parallel, buffer memory RAM, three-dimensional reproduction; Two left and right three-dimension sensors based on CMOS obtain left and right camera image data, due to cmos sensor transmission of digital signals, it are directly read; The FPGA data processing module of the data input two panels independent parallel that cmos sensor obtains, completes computing by data prediction, mark background, code translator solution phase and heterodyne multi-frequency phase demodulation four steps; Resolve in computation process in phase place, need to use the data that cmos sensor is repeatedly taken, therefore data are temporarily stored in buffer memory RAM; Complete after phase place resolves, calculation result is inputted the FPGA data processing module that three-dimensional reproduction calculates by the FPGA data processing module of two panels independent parallel simultaneously, carries out Stereo matching and three-dimensional reproduction calculates; Computation process needs to transmit camera calibration result, background threshold setup parameter by computing machine to FPGA by USB interface, after having calculated, three dimensional point cloud kilomega network data transmission interface is transferred to computing machine;

Should be that two relative positions are fixed and have the camera of common visual field based on two left and right three-dimension sensors of CMOS, its core sensor devices be CMOS chip; This buffer memory RAM is the DDR2 cache chip be connected with FPGA; This computing machine is the computing machine storing the use of display data; The FPGA data processing module that the FPGA data processing module of this independent parallel and three-dimensional reproduction calculate is all the data processing function modules in FPGA, and its algorithm routine has realized downloading in FPGA; This kilomega network data transmission interface is kilomega network host-host protocol interface board, uses DM9000A protocol chip; This USB data transmission interface is that usb data interface section uses CY7C68013A chip as coding chip;

Based on the three-dimension sensor of CMOS, two panels CMOS chip is used to form left and right two cameras, to realize the collection of three-dimensional image information; Two panels independent parallel FPGA data processing module, after having carried out data prediction; First mark background according to the background threshold set, back of the body pixel will not be calculated in calculating afterwards, save calculated amount; Secondly formula is utilized to same frequency bar print image carry out phase place to resolve; Finally use heterodyne multi-frequency method, use formula carry out phase demodulation; Buffer memory RAM in the phase place of FPGA data processing is resolved, calculating need to use four width images of the different fringe phase of the same fringe frequency of unified pixel, therefore the image photographed by sensor first prestores in buffer memory RAM, after four width phase shift stripe patterns shootings, view data is read into FPGA from buffer memory and carries out phase place and resolve; Symbol description in above formula is as follows: g _i(x, y) represents the gray-scale value of the i-th width image at point (x, y) place;

The FPGA data processing module that three-dimensional reproduction calculates, resolves the result obtained and carries out Stereo matching and three-dimensional reproduction by phase place; The camera calibration result used is needed to be transmitted by part USB interface by computing machine; Three-dimensional reproduction result transfers to computing machine by part kilomega network data transmission interface.