CN102969990A - Multi-input differential amplifier with dynamic transduction compensation - Google Patents

Abstract

The invention discloses a multi-input differential amplifier with dynamic transduction compensation. The multi-input differential amplifier comprises an input state, an output state and a transduction compensation circuit; the input stage comprises multiple differential input pairs; the differential input pairs comprise a first differential input pair, a second differential input pair, a third differential input and a fourth differential input pair which are respectively used for producing a pair of differential signal according to a first input signal, a second input signal, a third input signal, a fourth input signal and an output stage; the output stage is used for responding to the differential signal to produce the output signal; and the transduction compensation circuit is coupled with the first and second differential input pairs so as to dynamically compensate the first transduction of the first differential input pair and the second transduction of the second differential input pair.

Description

Many inputs differential amplifier that tool is dynamically transduceed and compensated

Technical field

The present invention relates to a kind of many input differential amplifiers, relate in particular to a kind of mobile attitude transduction compensation of advancing, but with the accuracy that promotes output voltage and the many inputs differential amplifier that increases the interpolation scope of input voltage.

Background technology

In order to reduce chip area, the multidigit output buffer that drives chip can use many inputs to the interpolation type amplifier usually, and its principle is the input voltage value by several different weights of input, and interpolation produces array output voltage.

For instance, please refer to Fig. 1, Fig. 1 is known one or eight pairs of digital analog converters (digital toanalog converter, DAC) 10 schematic diagram, as shown in Figure 1, eight pairs of digital analog converters 10 can be according to a digital-to-analogue conversion code DACC of receive 3 bits, by selecting an appropriate voltage to export in eight input voltages.Yet, need 2^3-1 the action that device is chosen under this framework, therefore shared chip area is excessive.

In order to reduce chip area, then the framework of a plurality of output voltages of known employing carries out interpolation to output voltage and is wanted voltage to obtain.Please refer to Fig. 2 A to Fig. 2 B, Fig. 2 A is the schematic diagram of known one or eight pairs of four digital analog converters 20, and Fig. 2 B is the schematic diagram of more than one input differential amplifiers 22 of eight couples, four digital analog converters 20 shown in known cooperation Fig. 2 A.Shown in Fig. 2 A to Fig. 2 B, eight pairs of four digital analog converters 20 can according to 3 digital-to-analogue conversion code DACC, will have the accurate V in position _LOr V _HVoltage arrange the input voltage V export many input differential amplifiers 22 to ₁～V ₄, have the accurate voltage in suitable position with output, wherein, the accurate V in position _LLess than the accurate V in position _HIn other words, eight pairs of four digital analog converters 20 can produce at most eight kinds of input voltage V according to different 3 digital-to-analogue conversion code DACC ₁～V ₄Voltage combination give many input differential amplifiers 22 and carry out interpolation, therefore do not need to choose for specific eight kinds of input voltages, so shared chip area is little than eight pairs of digital analog converters 10.

In order to realize the function of interpolation, input the framework (one output voltage V o negative feedback to a negative input end) that differential amplifier 22 is arranged to a unity gain buffer usually, so its output voltage V o can utilize to input voltage V more ₁～V ₄Carry out interpolation and obtain appropriate voltage position standard.That is, can have the not accurate V of coordination by input _L, V _HThe input voltage V of weight ₁～V ₄Give many input differential amplifiers 22, produce suitable output voltage V o with interpolation.

Yet known use inputs that the right output voltage V o of differential input often can depart from designed interpolate value in the differential amplifier 22 more, thereby the input voltage V of the many inputs of restriction differential amplifiers 22 ₁～V ₄Accurate V in place _L, V _HBetween the interpolation scope.In view of this, known technology has improved necessity in fact.

Summary of the invention

Therefore, one of main purpose of the present invention namely is to provide a kind of operational amplifier device, and it can advance mobile attitude transduction compensation, but with the accuracy that promotes output voltage and the interpolation scope that increases input voltage.

In one embodiment, disclose many inputs differential amplifier that a kind of tool is dynamically transduceed and compensated, comprise an input stage, an output stage and a transduction compensating circuit.This input stage comprises that a plurality of differential inputs are right, and these a plurality of differential inputs are right to comprising one first differential input, is used for according to one first input signal and an output signal, produces the pair of differential signal; One second differential input is right, is used for producing this to differential wave according to one second input signal and this output signal; One the 3rd differential input is right, is used for producing this to differential wave according to one the 3rd input signal and this output signal; And one the 4th differential input right, be used for producing this to differential wave according to one the 4th input signal and this output signal.This output stage is used in response to this differential wave is produced this output signal.This compensating circuit of transduceing is coupled to that this is first right with this second differential input, is used for dynamically compensating one first right transduction of this first differential input, one second transduction right with this second differential input.

In another embodiment, also disclose many inputs differential amplifier that tool is dynamically transduceed and compensated, comprise an input stage, an output stage and one or more transduction compensating circuit.This input stage comprises that a plurality of differential inputs are right, with according to a plurality of input signals and an output signal, produces the pair of differential signal.This output stage is used in response to this differential wave is produced this output signal.This one or more the transduction compensating circuit in the middle of each be coupled to these a plurality of differential inputs between the two central corresponding person, be used for dynamically compensating this two right transductions of the differential input of correspondence.

In another embodiment, many inputs differential amplifier that another kind of tool is dynamically transduceed and compensated comprises an input stage, and it comprises that a plurality of differential inputs are right; And one or more the transduction compensating circuit, central each be coupled to these a plurality of differential inputs between the two central corresponding person.Respectively this transduction compensating circuit comprises: a variable resistor, the differential input that is coupled to these two correspondences between, an and resistance controller is coupled to this variable resistor, is used for this variable-resistance resistance of control.

Cooperate detailed description and claims of following diagram, embodiment at this, with on address other purpose of the present invention and advantage and be specified in after.

Description of drawings

Fig. 1 is the schematic diagram of known one or eight pairs of digital analog converters,

Fig. 2 A is the schematic diagram of known one or eight pairs of four digital analog converters 20.

Fig. 2 B is the schematic diagram of more than one input differential amplifiers of eight couples, four digital analog converters shown in known cooperation Fig. 2 A.

Fig. 3 A is the right schematic diagram of differential input of an input stage of the many inputs differential amplifier shown in Fig. 2 B.

Fig. 3 B is when different digital analog-converted code and corresponding input voltage, the schematic diagram of the right desirable output voltage V o of differential input among Fig. 3 A.

Fig. 3 C is input voltage when being respectively a high levels and three low level, the schematic diagram of the right transduction of differential input among Fig. 3 A.

Fig. 3 D is input voltage when being respectively a low level and three high levels, the schematic diagram of the right transduction of differential input among Fig. 3 A.

Fig. 4 is that the schematic diagram of differential amplifiers is inputted in tool more than one of the compensation of dynamically transduceing among the embodiment.

Fig. 5 A is input voltage when being respectively a high levels and three low level, the schematic diagram of the right transduction of differential input among Fig. 4.

When Fig. 5 B input voltage is respectively a low level and three high levels, the schematic diagram of the right transduction of differential input among Fig. 4.

Fig. 6 inputs the schematic diagram of differential amplifiers for more than one of the compensation of dynamically transduceing of tool among another embodiment.

Wherein, description of reference numerals is as follows:

10,20 digital analog converters

22, the differential amplifier of input more than 40

30 input stages

302～308,404～410 differential inputs are right

400 input stages

402 transduction compensating circuits

412 variable resistors

414 resistance controllers

DACC digital-to-analogue conversion code

V _L, V _HThe position is accurate

V ₁～V ₄Input voltage

The Vo output voltage

Iss ₁～Iss ₄, Iss ₁'～Iss ₄' reference current source

I (+), i (-), i (+) ', i (-) ' differential wave

Gm _H, gm _L, gm _H', gm _L' transduction value

V ₁'～V ₄' input signal

Vo ' output signal

The Con control signal

Embodiment

Please refer to Fig. 3 A to Fig. 3 B, Fig. 3 A be the differential input of an input stage 30 of the many inputs differential amplifier 22 shown in Fig. 2 B to 302～308 schematic diagram, Fig. 3 B is at different digital analog-converted code DACC and corresponding input voltage V ₁～V ₄Combination the time, differential input is to the schematic diagram of 302～308 desirable output voltage V o among Fig. 3 A.Many input differential amplifiers 22 comprise input stage 30, active load and output stage (not drawing).As shown in Figure 3A, input stage 30 includes four differential inputs to 302～308, and it includes respectively reference current source Iss ₁～Iss ₄To form the framework of source follower (Source Follower).

Under this framework, in the ideal case, shown in Fig. 3 B, suppose input voltage V ₁～V ₄All be the accurate V in position _H, V _LCombination (such as input voltage V ₁The position standard is V _HThe time its transduction gm ₁-be transduction value gm _H) and corresponding transduction gm ₁～gm ₄Be the transduction value gm that equates _H, gm _L, as input voltage V ₁～V ₄All be the accurate V in position _LOr the accurate V in position _HThe time, then can get output voltage V o and be the accurate V in position _LOr the accurate V in position _HWhen being input as V _H, V _L, V _L, V _LThe time, then can get output voltage V o is Vo=V _L+ (V _H-V _L)/4=(1/4) V _H+ (3/4) V _LThe position accurate.The rest may be inferred, can get other digital-to-analogue conversion code DACC and corresponding input voltage V among Fig. 3 B ₁～V ₄Combination is lower, and the interior slot of desirable output voltage V o is accurate.

Yet, under actual conditions, differential input to 302～308 at differential voltage V ₁～V ₄Not simultaneously, can not have not contransduction gm ₁～gm ₄, i.e. the accurate V of coordination not _L, V _HUnder the weight state, differential input has not contransduction gm to 302～308 ₁～gm ₄For instance, please refer to Fig. 3 C to Fig. 3 D, Fig. 3 C is input voltage V ₁～V ₄Be respectively the accurate V in position _H, V _L, V _L, V _LThe time, differential input is to 302～308 transduction gm among Fig. 3 A ₁～gm ₄Schematic diagram, Fig. 3 D is input voltage V ₁～V ₄Be respectively the accurate V in position _L, V _H, V _H, V _HThe time, differential input is to 302～308 transduction gm among Fig. 3 A ₁～gm ₄Schematic diagram.Shown in Fig. 3 C to Fig. 3 D, because differential input is to 302～308 transduction gm ₁～gm ₄Can be along with two ends differential voltage V ₁～V ₄Increase and reduce, namely along with input voltage V ₁～V ₄Increase and reduce with output voltage V o pressure reduction, therefore the interpolation output voltage V o of in fact many input differential amplifiers 22 is:

$\mathrm{Vo}=\frac{{\mathrm{Ngm}}_H{V}_H+{\mathrm{Mgm}}_L{V}_L}{{\mathrm{Ngm}}_H+{\mathrm{Mgm}}_L}$

Wherein, N and M are respectively input voltage V ₁～V ₄The accurate V of meta _HAnd V _LThe input number, and transduction value gm _HAnd gm _LBe respectively input voltage V ₁～V ₄Be the accurate V in position _HAnd V _LDifferential input is to 302～308 transduction gm during input ₁～gm ₄The transduction value.

In this case, since in many input differential amplifiers 22 differential input to 302～308 at input voltage V ₁～V ₄Voltage difference V with output voltage V o ₁～V ₄Has phase contransduction gm when identical ₁～gm ₄(namely at input voltage V ₁～V ₄All be the accurate V in position _HOr V _L, and input voltage V ₁～V ₄In both be the position an accurate V _HAnd both are the accurate V in position in addition _LSituation under), output voltage V o also can obtain desirable interpolate value shown in Fig. 3 B.Yet, as input voltage V ₁～V ₄Be respectively V _H, V _L, V _L, V _LThe time, output voltage V o should be Vo=V under the perfect condition _L+ (V _H-V _L)/4=(1/4) V _H+ (3/4) V _L, and differential input is to 302～308 differential voltage V ₁～V ₄Be respectively

Therefore differential input is respectively 302～308 pair of differential signal i (+), i (-) (i.e. an anode electric current and a negative terminal electric current):

$i(+)=\frac{1}{2}{\mathrm{gm}}_H{\mathrm{\&Delta;<figure-callout\; id="1"\; label="V"\; filenames="HDA0000088277320000031.png"\; state="\{\{state\}\}">V</figure-callout>}}_1+\frac{1}{2}{\mathrm{gm}}_L{\mathrm{\&Delta;V}}_2+\frac{1}{2}{\mathrm{gm}}_L{\mathrm{\&Delta;<figure-callout\; id="3"\; label="V"\; filenames="HDA0000088277320000052.png"\; state="\{\{state\}\}">V</figure-callout>}}_3+\frac{1}{2}{\mathrm{gm}}_L{\mathrm{\&Delta;<figure-callout\; id="4"\; label="V"\; filenames="HDA0000088277320000052.png"\; state="\{\{state\}\}">V</figure-callout>}}_4=\frac{3}{8}(V_H-V_L)({\mathrm{gm}}_H-{\mathrm{gm}}_L)$

$i(-)=-\frac{1}{2}{\mathrm{gm}}_H{\mathrm{\&Delta;V}}_1-\frac{1}{2}{\mathrm{gm}}_L{\mathrm{\&Delta;V}}_2-\frac{1}{2}{\mathrm{gm}}_L{\mathrm{\&Delta;V}}_3-\frac{1}{2}{\mathrm{gm}}_L{\mathrm{\&Delta;<figure-callout\; id="4"\; label="V"\; filenames="HDA0000088277320000052.png"\; state="\{\{state\}\}">V</figure-callout>}}_4=-\frac{3}{8}(V_H-V_L)({\mathrm{gm}}_H-{\mathrm{gm}}_L)$

In the case, shown in Fig. 3 C, because differential input is to 302 differential voltage V ₁Value greater than differential input to 304～308 differential voltage V ₂～V ₄Value (accurate V ascends the throne _LSo weight has greatly input voltage V ₁Be the accurate V in position _HDifferential input have larger differential voltage V to 302 ₁, | Δ V ₁|＞| Δ V ₂|～| Δ V ₄|), so differential input is to 302 transduction gm ₁Corresponding transduction value gm _HLess than differential input to 304～308 transduction gm ₂～gm ₄Corresponding transduction value gm _L(gm _H＜gm _L), can get negative terminal current i (-) in the substitution following formula greater than anode current i (+).Theory according to negative feedback, the feedback voltage of negative terminal will descend, force differential input that 302～308 anode current i (+) is got back to the situation that anode current i (+) equals negative terminal current i (-) with negative terminal current i (-), so actual output voltage Vo can be more lower slightly than desirable output voltage V o shown in Fig. 3 B.

In other words, by the formula of above-mentioned in fact interpolation output voltage V o as can be known, owing to have input voltage V ₁Be the accurate V in position _HDifferential input to 302 its differential voltage V ₁Make greatly transduction gm ₁Less, and make the accurate V in position with high potential _HComposition is lower, so output voltage V o is a little less than ideal value.The rest may be inferred, can be at input voltage V with reference to figure 3D ₁～V ₄Be respectively V _L, V _H, V _H, V _HThe time, actual output voltage Vo can be slightly higher than desirable output voltage V o shown in Fig. 3 B.

For instance, work as V ₂=V ₃=V ₄=V _L=4V, V ₁=V _HDuring=5V, interpolation output voltage V o should be 4.25V ideally, yet because differential input to 302～308 corresponding transduction gm ₁～gm ₄Can be offset to gm respectively _L=0.025mS, gm _H=0.018mS causes interpolation output voltage V o skew, therefore can push away to get V by the formula of aforementioned interpolation output voltage V o _o=4.1935V and has-error amount of 5.6mV.

In sum, in many input differential amplifiers 22 carry out low current driving amplifier that interpolation realizes, because the right transduction value of each input has with differential voltage V ₁～V ₄(be input voltage V ₁～V ₄And difference between the output voltage V o) characteristic of skew is therefore at many input differential amplifier 22 input voltage V ₁～V ₄The accurate V of meta _L, V _HWhen weight was unequal, it respectively inputs right transduction value can be with the different differences that produce of differential voltage.As a result, therefore output voltage V o can depart from designed interpolate value, and then the input voltage V of the many inputs of restriction differential amplifier 22 ₁～V ₄Accurate V in place _L, V _HBut between the scope of interpolation.

Please refer to Fig. 4, Fig. 4 is that the schematic diagram of differential amplifiers 40 is inputted in tool more than one of the compensation of dynamically transduceing among the embodiment.This differential amplifier 40 can effectively improve the error of output voltage V o, and then effectively improves the interpolation scope of input voltage.

As shown in Figure 4, inputting differential amplifier 40 more and include input stage 400 and a late-class circuit, is an output stage (not illustrating) for example.In addition, input differential amplifier 40 more and also include a transduction compensating circuit 402.Input stage 400 includes four pairs of differential inputs to 404～410, and it includes respectively reference current source Iss ₁'～Iss ₄' to form source follower (Source Follower), so also can be other quantity in other embodiments and be not limited to this.Many input differential amplifiers 40 are similar to many input differential amplifier 22 parts, i.e. differential input is used for respectively according to input signal V to 404～410 ₁'～V ₄' and an output signal Vo ' (for example being respectively input voltage and output voltage), produce pair of differential signal i (+) ', i (-) ' (being an anode electric current and a negative terminal electric current for example).Output stage then can be in response to this to differential wave i (+) ', i (-) ', produces output signal Vo ', then in the negative feedback mode as the input voltage (to Fig. 2 B similar) of differential input to 404～410 negative input end.Input signal V ₁'～V ₄' the position standard all can switch to such as be the position an accurate V _L, V _HWith interpolation go out wanted output signal Vo ', the accurate V of its meta _HGreater than the accurate V in position _LYet, below will describe in detail, input differential amplifier 40 when practical operation, input signal V more ₁'～V ₄' the position will definitely be controlled to be conversion between specific several combination.

Many input differential amplifiers 40 are with the Main Differences of many input differential amplifiers 22, input differential amplifier 40 more and comprise that also transduction compensating circuit 402 is coupled to differential input to 404,406, are used for the compensates for differential input to a transduction gm of 404 ₁' with differential input to 406 one the transduction gm ₂', so that output signal Vo ' meets a desired value (being the ideal value shown in Fig. 3 B for example).Thus, by 402 pairs of transductions of transduction compensating circuit gm ₁' with the transduction gm ₂' compensate, make transduction gm ₁' with the transduction gm ₂' central transduction value the higher person reduces and transduction value junior is increased, and with the difference of compensation because of the different transduction values that caused of differential voltage, makes output signal Vo ' meet desired value, but and then can increase input voltage interpolation scope.

Specifically, as shown in Figure 4, transduction compensating circuit 402 is coupled to reference current source Iss ₁' with reference current source Iss ₂' between, with by making offset current Icomp circulation at reference current source Iss ₁' with reference current source Iss ₂' between compensate the transduction gm ₁' with the transduction gm ₂'.In the configuration of Fig. 4, because reference current source Iss ₁'～Iss ₄' all be constant current source, therefore can flow to another reference current source by transduction compensating circuit 402 by a reference current source wherein at offset current Icomp.When offset current Icomp flowed, the differential input of corresponding outflow offset current Icomp had high current to meeting, so the rising of transduction value, and the differential input of corresponding inflow offset current Icomp has reduced-current to meeting, so the transduction value descends.Thus, transduction compensating circuit 402 can be by making offset current Icomp circulation at reference current source Iss ₁' with reference current source Iss ₂' between compensate the transduction gm ₁' with the transduction gm ₂', make output signal Vo ' meet desired value.

Preferably, transduction compensating circuit 402 can be at input signal V ₁' with V ₂' the position accurate different, and other two input signal V ₃', V ₄' the position accurately play a role when identical.More specifically, as input signal V ₁', V ₂' central input signal is V _H/ V _LThe position is accurate, and input signal V ₁', V ₂' central another input signal and other two input signal V ₃', V ₄' all be V _L/ V _HWhen (that is antiphase is accurate), 402 of compensating circuits of transduction can increase transduction gm ₁', gm ₂' in to should input signal (being input signal V ₁', V ₂' with other two input signal V ₃', V ₄' the accurate different persons in position) transduction, and reduce transduction gm ₁', gm ₂' in to should another input signal (being input signal V ₁', V ₂' with other two input signal V ₃', V ₄' the position accurate identical person) transduction.Thus, because differential voltage the greater has less transduction value, but so compensating circuit 402 compensated input signal V ₁', V ₂' the accurate and input voltage V when meta ₁'～V ₄' in other standard different input signal all, make output signal Vo ' meet desired value.

For instance, please refer to Fig. 5 A and Fig. 5 B, Fig. 5 A is input voltage V ₁'～V ₄' be respectively the position an accurate V _H, V _L, V _L, V _LThe time, differential input is to 404～410 transduction gm among Fig. 4 ₁'～gm ₄' schematic diagram, Fig. 5 B is input voltage V ₁'～V ₄' be respectively the position an accurate V _L, V _H, V _H, V _HThe time, differential input is to 404～410 transduction gm among Fig. 4 ₁'～gm ₄' schematic diagram.Shown in Fig. 5 A, at input signal V ₁' be the accurate V in position _HAnd input signal V ₂'～V ₄' be the accurate V in position _LThe time, transduction compensating circuit 402 increases transduction gm ₁' and reduce transduction gm ₂'.In other words, transduction compensating circuit 402 gm that will transduce ₁' from transduction value gm originally _HIncrease to transduction value gm _H', and the gm that will transduce ₂' from script transduction value gm _LBe reduced to transduction value gm _L', and transduction gm ₃', gm ₄' keep transduction value gm _L

On the other hand, shown in Fig. 5 B, at input signal V ₁' be the accurate V in position _LAnd input signal V ₂'～V ₄' be the accurate V in position _HThe time, transduction compensating circuit 402 also increases transduction gm ₁' and reduce transduction gm ₂'.In other words, transduction compensating circuit 402 gm that will transduce ₁' from transduction value gm originally _LIncrease to transduction value gm _L', gm will transduce ₂' from transduction value gm originally _HBe reduced to transduction value gm _H', and transduction gm ₃', gm ₄' keep transduction value gm _HThe rest may be inferred, at input signal V ₂' the position accurate with other three not simultaneously, transduction compensating circuit 402 also can increase transduction gm ₂' and reduce transduction gm ₁'.Thus, because differential voltage the greater has less transduction value, but so compensating circuit 402 compensated input signal V ₁', V ₂' the accurate and input voltage V when meta ₁'～V ₄' in other standard different input signal all, make output signal Vo ' meet desired value.

Below be described in further detail.Please continue with reference to figure 4, in one embodiment, differential input is to each comprises a N-type input transistors pair in the middle of 404～410, as input signal V ₁' be that first/second is accurate, input signal V ₂' be the second/the first standard, and input signal V ₃', V ₄' all be the second/the first punctual, transduction compensating circuit 402 increases the differential inputs transduction gm right to 404 N-type input transistors _1N', and reduce the differential input transduction gm right to 406 N-type input transistors _2N'.In the case, at input signal V ₁' be the accurate V in position _HAnd input signal V ₂'～V ₄' be the accurate V in position _LThe time, because input signal V ₁' greater than input signal V ₂', the compensating circuit 402 of therefore transduceing can make the offset current Icomp can be by reference current source Iss ₁' flow to reference current source Iss ₂', so that differential input Current rise thereby its transduction gm right to 404 N-type input transistors _1N' rise, and differential input is descended thereby its transduction gm to the right electric current of 406 N-type input transistors _2N' descend, and then make output signal Vo ' meet desired value.

On the other hand, please refer to Fig. 6, Fig. 6 is dynamically the transduce schematic diagram of many inputs differential amplifier 40 of compensation of tool among another embodiment, wherein, Fig. 6 and Fig. 4 difference only be input transistors to changed into by N-type P type and offset current Icomp flow to different, therefore with the same components symbolic representation in the hope of succinctly.As shown in Figure 6, in another example, differential input is to each more comprises a P type input transistors pair in the middle of 404～410.

Similarly, transduction compensating circuit 402 can be at input signal V ₁' with V ₂' the position accurate different, and other two input signal V ₃', V ₄' the position accurately play a role when identical.More specifically, as input signal V ₁' be that first/second is accurate, input signal V ₂' be the second/the first standard, and input signal V ₃', V ₄' all be the second/the first punctual, transduction compensating circuit 402 increases the differential inputs transduction gm right to 404 P type input transistors _1P', and reduce the differential input transduction gm right to 406 P type input transistors _2P'.For example, as input signal V ₂' be the accurate V in position _LAnd input signal V ₁', V ₃', V ₄' be the accurate V in position _HThe time, because input signal V ₂' greater than input signal V ₁', the compensating circuit 402 of therefore transduceing can make the offset current Icomp can be by reference current source Iss ₂' flow to reference current source Iss ₁', so that differential input descends thereby its transduction gm to the right electric current of 406 P type input transistors _2P' descend, and make differential input Current rise thereby its transduction gm right to 404 P type input transistors _1P' rise, and then make output signal Vo ' meet desired value.

It should be noted that as input signal V ₁' with input signal V ₂' the position accurate when identical, transduction compensating circuit 402 can compensate transduction gm ₁', gm ₂'.Shown in Fig. 3 B, input differential amplifier 40 when practical operation more, also be control inputs signal V ₃', V ₄' both equate, only change input signal V ₁', V ₂' with interpolation go out wanted output signal Vo ', therefore transduceing compensating circuit 402 can be only at input signal V ₁' with input signal V ₂' the position accurately compensate when different, and at input signal V ₁' with input signal V ₂' the position accurately do not compensate when identical.

In addition, in fact design is preferably and avoids exchanging the accurate situation in position.In other words, the first differential input can be arranged to 404 is to receive high levels V always _HInput V ₁, be low level V at wish output signal Vo ' only _LThe time switch to low level V _LAnd two other differential input can be arranged to the input signal V that continues to accept the identical bits standard to 408 and 410 ₃With V ₄Thus, transduction compensating circuit 402 only need be arranged on and continue to receive high levels V _HThe differential input of input to 404 and another with the differential input of wish output signal Vo ' variation between 406, do not need per two differential inputs between all arrange one.

Please go back to reference to figure 4, it also shows an embodiment of a thin section structure of the compensating circuit 402 of transduceing.Transduction compensating circuit 402 can comprise a variable resistor 412 and a resistance controller 414.Variable resistor 412 is coupled to reference current source Iss ₁' with reference current source Iss ₂' between, be used for providing a current path to compensate transduction gm ₁', gm ₂'.Resistance controller 414 is coupled to variable resistor 412, be used in response to input signal V ₁', V ₂' the accurate corresponding control signal Con in position control the resistance R of variable resistor 412.For example, resistance controller 414 can be according to coming the control signal Con of four digital analog converters 20 of eight couple shown in Fig. 2 A freely to control the resistance R of variable resistor 412.Therefore can be at input voltage V ₁', V ₂' the position accurate when different, resistance controller 414 can control variable resistor 412 for suitable resistance R with to transduction gm ₁', gm ₂' compensate, and at input voltage V ₁', V ₂' the position accurate when identical, resistance controller 414 can control variable resistor 412 for high value to cut off current path not to transduction gm ₁', gm ₂' compensate.

Particularly, please also refer to Fig. 4 and Fig. 5 A, at input signal V ₁'～V ₄' be respectively the position an accurate V _H, V _L, V _L, V _LThe time, transduction gm ₁'～gm ₄' formerly should be respectively transduction value gm _H, gm _L, gm _L, gm _L, this moment, resistance controller 414 control variable resistors 412 were suitable resistance R, with the gm that will transduce ₁'～gm ₄' compensate to transduction value gm _H', gm _L', (be gm _H'=gm _H+ gm and gm _L'=gm _L-gm).Output signal Vo ' should be Vo=V under the perfect condition _L+ (V _H-V _L)/4, and differential input is to 404～410 differential voltage V ₁'～V ₄' be respectively

Therefore differential input to 404～410 this differential wave i (+) ', i (-) ' are respectively:

$i{(+)}^{\&prime;}=\frac{1}{2}{\mathrm{gm}}_L[-\frac{1}{4}(V_H-V_L)]+\frac{1}{2}{\mathrm{gm}}_L[-\frac{1}{4}(V_H-V_L)]+\frac{1}{2}({\mathrm{gm}}_L-\mathrm{\&Delta;gm})[-\frac{1}{4}(V_H-V_L)]+\frac{1}{2}({\mathrm{gm}}_H+\mathrm{\&Delta;gm})[-\frac{3}{4}(V_H-V_L)]$

$i{(-)}^{\&prime;}=-\frac{1}{2}{\mathrm{gm}}_L[-\frac{1}{4}(V_H-V_L)]-\frac{1}{2}{\mathrm{gm}}_L[-\frac{1}{4}(V_H-V_L)]-\frac{1}{2}({\mathrm{gm}}_L-\mathrm{\&Delta;gm})[-\frac{1}{4}(V_H-V_L)]-\frac{1}{2}({\mathrm{gm}}_H+\mathrm{\&Delta;gm})[-\frac{3}{4}(V_H-V_L)]$

Should be Vo=V in order to meet output signal Vo ' _L+ (V _H-V _LThe output requirement of)/4, so this answers i (+) '=i (-) '=0 to differential wave i (+) ', i (-) ', following formula can obtain via abbreviation

Relational expression, simultaneously also can by

Push away at input signal V ₁'～V ₄' be respectively the position an accurate V _H, V _L, V _L, V _LSituation under, the resistance R that resistance controller 414 can be controlled variable resistor 412 is $R=\frac{8(V_H-V_L)}{(15-6k-{9k}^2)I_{\mathrm{ss}}}.$

By following formula as can be known, resistance controller 414 can be according to the accurate V in position _H, V _LDifference, reference current source Iss ₁' with reference current source Iss ₂' a reference current value Iss and the transduction gm ₁', gm ₂' original value gm _H, gm _LDecide the resistance R of variable resistor 412.The rest may be inferred, and can continue must be at input signal V with reference to figure 5B and Fig. 6 ₁'～V ₄' be respectively the position an accurate V _L, V _H, V _H, V _HIn the situation, the mechanism that transduction compensating circuit 402 compensates.Thus, transduction compensating circuit 402 can make output signal Vo ' meet desired value, but thereby increase input voltage interpolation scope, simultaneously because differential input is that same-phase changes to source voltage and input voltage, therefore as an accurate V _HWith the accurate V in position _LWhen gap is larger, compensation

Gm is also larger to reach the effect of dynamic compensation.

For instance, work as V ₂'=V ₃'=V ₄'=V _L=4V, V ₁'=V _HDuring=5V, interpolation output voltage V o ' should be 4.25V ideally, transduction compensating circuit 402 modulations differential input to 404,406 N-type input transistors to rear, can be with differential input to 406 transduction gm ₂By gm _L=0.025mS is reduced to gm _L'=0.02mS, and with differential input to 404 transduction gm ₁By gm _H=0.018mS is increased to gm _HThe value of '=0.0233mS can be by formula

Push away to such an extent that output signal Vo ' is 4.2497V, and with the error of output signal Vo ' correction to only remaining 0.3mV.Thus, do not have during compared to known the compensation-error amount of 5.6mV, transduction compensating circuit 402 can make output signal Vo ' meet desired value, but thereby can increase input voltage interpolation scope.

It should be noted that, main spirits of the present invention be receive with other differential input to differential input with varying input signal position standard to and another differential input compensate adding compensating circuit 402 both transductions of transduceing, make the minimizing of transduction value the higher person and transduction value junior is increased, with the difference of compensation because of the different transduction values that caused of differential voltage, make output signal Vo ' meet desired value, but thereby increase input voltage interpolation scope.Those of ordinary skills work as and can modify according to this or change, and are not limited to this.For instance, all describe reaching a transduction compensating circuit with four differential inputs in above-described embodiment, when practical application, the right quantity of differential input is not limited to four, can comprise one or more transduction compensating circuit and input differential amplifier 40 more, in the middle of each be coupled to these a plurality of differential inputs between the two central corresponding person, be used for compensating this two right transductions of the differential input of correspondence, so that output signal Vo ' meets a desired value.In addition, the 4th figure and the 6th figure enforcement that also can combine.

Differential input is to 302～308 transduction gm in known many input differential amplifiers 22 ₁～gm ₄With differential voltage V ₁～V ₄Not simultaneously, can not have not contransduction gm ₁～gm ₄, cause output voltage V o to depart from designed interpolate value, thereby the input voltage V of the many inputs of restriction differential amplifier 22 ₁～V ₄Accurate V in place _L, V _HBetween the interpolation scope.In comparison, in above-described embodiment in two differential inputs to increasing a transduction compensating circuit, with accurate under suitable combination in the input position, dynamically compensate this two right transductions of the differential input of correspondence, therefore so that output signal Vo ' meets a desired value, but and increase input voltage interpolation scope.

The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.

Claims (20)

1. many inputs differential amplifier that tool is dynamically transduceed and compensated is characterized in that, comprising:

One input stage, it comprises that a plurality of differential inputs are right, these a plurality of differential inputs are to comprising:

One first differential input is right, is used for according to one first input signal and an output signal, produces the pair of differential signal;

One second differential input is right, is used for producing this to differential wave according to one second input signal and this output signal;

One the 3rd differential input is right, is used for producing this to differential wave according to one the 3rd input signal and this output signal; And

One the 4th differential input is right, is used for producing this to differential wave according to one the 4th input signal and this output signal;

One output stage is used in response to this differential wave is produced this output signal; And

One transduction compensating circuit is coupled to that this is first right with this second differential input, is used for dynamically compensating one first right transduction of this first differential input, one second transduction right with this second differential input.

2. many input differential amplifiers as claimed in claim 1 is characterized in that, this transduction compensating circuit receives a control signal and dynamically compensates this first and second transduction, and wherein this control signal makes up corresponding with the position standard of this first to fourth input signal.

3. many input differential amplifiers as claimed in claim 1, it is characterized in that, this first differential input is to comprising one first reference current source, this is second differential to comprising one second reference current source, and this transduction compensating circuit is coupled between this first reference current source and this second reference current source.

4. many input differential amplifiers as claimed in claim 1, it is characterized in that, input signal in the middle of this first and second input signal is that first/second is accurate, and another input signal and the 3rd to the 4th input signal in the middle of this first and second input signal all be the second/the first on time, this transduction compensating circuit increases in this first and second transduction a transduction that should input signal, and reduces in this first and second transduction another transduction that should another input signal.

5. many input differential amplifiers as claimed in claim 1, it is characterized in that, this first to fourth differential input to central each comprise one first type input transistors pair, and wherein when this first input signal be that first/second is accurate, this second input signal is the second/the first standard, and the 3rd to the 4th input signal all be the second/the first punctual, this transduction compensating circuit increases the right right transduction of this first type input transistors of this first differential input, and reduces the right right transduction of this first type input transistors of this second differential input.

6. many input differential amplifiers as claimed in claim 5, it is characterized in that, this first to fourth differential input to central each more comprise a Second-Type input transistors pair, and wherein when this first input signal be that first/second is accurate, this second input signal is the second/the first standard, and the 3rd to the 4th input signal all be the second/the first punctual, this transduction compensating circuit increases the right right transduction of this Second-Type input transistors of this first differential input, and reduces the right right transduction of this Second-Type input transistors of this second differential input.

7. many input differential amplifiers as claimed in claim 1 is characterized in that, accurate when identical when this first input signal and the position of this second input signal, this first second transduces this transduction compensating circuit uncompensation with this.

8. many input differential amplifiers as claimed in claim 1, it is characterized in that, this first differential input is to comprising one first reference current source, this is second differential to comprising one second reference current source, and this transduction compensating circuit comprises: a variable resistor is coupled between this first reference current source and this second reference current source.

9. many input differential amplifiers as claimed in claim 8 is characterized in that this transduction compensating circuit more comprises

One resistance controller is coupled to this variable resistor, is used in response to first controlling this variable-resistance resistance with the position standard of this second input signal with this.

10. many input differential amplifiers as claimed in claim 9, it is characterized in that, this resistance controller according to the original value of a reference current value of this first reference current source and this second reference current source and this first and second transduction to determine this variable-resistance resistance.

Many inputs differential amplifier of compensation is characterized in that 11. a tool is dynamically transduceed, and comprising:

One input stage, it comprises that a plurality of differential inputs are right, with according to a plurality of input signals and an output signal, produces the pair of differential signal;

One output stage is used in response to this differential wave is produced this output signal; And

One or more compensating circuit of transduceing, central each be coupled to these a plurality of differential inputs between the two central corresponding person, be used for dynamically compensating this two right transductions of the differential input of correspondence.

12. many input differential amplifiers as claimed in claim 11, it is characterized in that, respectively this transduction compensating circuit receives other control signal and dynamically compensates this two right transductions of the differential input of correspondence, and wherein this other control signal is corresponding with the accurate combination in the position of those input signals.

13. many input differential amplifiers as claimed in claim 11, it is characterized in that, these a plurality of differential inputs are to comprising respectively a reference current source, and each is coupled between two right reference current sources of the differential input of two correspondence in the middle of this one or more transduction compensating circuit.

14. many input differential amplifiers as claimed in claim 11 is characterized in that, each should transduction compensating circuit accurate these transductions of uncompensation when identical in the position of these right input signals of these two differential inputs of correspondence.

15. many input differential amplifiers as claimed in claim 11 is characterized in that, these a plurality of differential inputs are to comprising respectively a reference current source, and this transduction compensating circuit comprises a variable resistor, are coupled between the reference current source of these two correspondences.

16. many input differential amplifiers as claimed in claim 15, it is characterized in that, this one or more the transduction compensating circuit in the middle of each more comprise a resistance controller, this variable resistor of transduction compensating circuit under being coupled to is used for controlling this variable-resistance resistance in response to the position standard of the input signal of two correspondences of a plurality of input signals.

17. many input differential amplifiers as claimed in claim 16, it is characterized in that, this resistance controller according to the original value of the right transduction of the differential input of a reference current value of these two reference current sources of correspondence and these two correspondences to determine this variable-resistance resistance.

Many inputs differential amplifier of compensation is characterized in that 18. a tool is dynamically transduceed, and comprising:

One input stage, it comprises that a plurality of differential inputs are right; And

One or more compensating circuit of transduceing, central each be coupled to these a plurality of differential inputs between the two central corresponding person, wherein respectively this transduction compensating circuit comprises:

One variable resistor, the differential input that is coupled to these two correspondences between; And

One resistance controller is coupled to this variable resistor, is used for dynamically controlling this variable-resistance resistance.

19. many input differential amplifiers as claimed in claim 18 is characterized in that this resistance controller is dynamically controlled this variable-resistance resistance according to the position standard of two right input signals of the differential input of these two correspondences.

20. many input differential amplifiers as claimed in claim 18, it is characterized in that, the differential input of these two correspondences is to comprising first and second reference current source, and this transduction compensating circuit knows that this variable resistor is coupled between this first and second reference current source.

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