CN102969896B - Power supply and control method thereof - Google Patents
Power supply and control method thereof Download PDFInfo
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- CN102969896B CN102969896B CN201210369358.2A CN201210369358A CN102969896B CN 102969896 B CN102969896 B CN 102969896B CN 201210369358 A CN201210369358 A CN 201210369358A CN 102969896 B CN102969896 B CN 102969896B
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- 238000000034 method Methods 0.000 title claims abstract description 23
- 230000001105 regulatory effect Effects 0.000 claims abstract description 68
- 238000012360 testing method Methods 0.000 claims description 11
- 230000007423 decrease Effects 0.000 claims description 9
- 238000013519 translation Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 5
- 102100029469 WD repeat and HMG-box DNA-binding protein 1 Human genes 0.000 description 3
- 101710097421 WD repeat and HMG-box DNA-binding protein 1 Proteins 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
Abstract
A power supply and a control method thereof are disclosed, the power supply including a reference regulating circuit and a voltage regulator. The reference adjustment circuit receives a voltage identification code from the processor and adjusts the reference voltage based on the voltage identification code. The voltage regulator is coupled to the reference regulating circuit and converts the input voltage into the output voltage according to the reference voltage. The reference regulating circuit regulates the reference voltage through a plurality of steps until the reference voltage reaches a target value corresponding to the voltage identification code. The reference regulating circuit regulates the reference voltage by a preset value in each step, and after the output voltage enters a preset range of the reference voltage, the next step is carried out.
Description
Technical field
Embodiments of the invention relate to power supply, relate in particular to power supply and control method thereof.
Background technology
In computer system, offer processor, for example CPU (central processing unit) or GPU (graphic process unit), operating voltage by the dynamic electric voltage recognition coding (voltage identification code, VID code) producing based on processor demand, determined.
Fig. 1 is the block diagram of existing processor power supply.Processor 103 produces VID coding based on its required operating voltage.With reference to regulating circuit 102, receive VID coding, and based on this VID coding, the reference voltage V to previous setting
refintregulate, and the reference voltage V after output adjusting
ref.
Voltage regulator 102 comprises at least one switching tube, receives the reference voltage V after regulating
ref, and according to this reference voltage V
refby input voltage V
inbe converted to output voltage V
out.Output voltage V
outthe operating voltage that is used as processor 103.Usually, output voltage V
outbe fed with regulate after reference voltage V
refcompare, thus conducting and the shutoff of at least one switching tube in control voltage regulator 102.
In some applications, except VID coding, with reference to regulating circuit 101, also from processor 103, receive a speed instruction, this speed instruction is used to indicate the required pace of change of operating voltage simultaneously.In the VR12 supply standard of setting in Intel company, three kinds of different speed have been stipulated: fast (fast), slow (slow) and decay (decay).
When receiving VID coding and SetVID_Fast or SetVID_Slow instruction, with reference to regulating circuit 101 with controllable rate by the reference voltage V previously having set
refintincrease or reduce, until the reference voltage V after regulating
refreach the corresponding desired value of encoding with VID.This desired value may equate with required operating voltage.
SetVID_Decay instruction is normally used for VID and declines in variation.In the prior art, when receiving SetVID_Decay instruction and VID coding, with reference to regulating circuit 101 by the reference voltage V previously having set
refintdirectly change the corresponding desired value of encoding with VID into, and do not control its speed.Switching tube in voltage regulator 102 is all turn-offed, output voltage V
outwith slope decay proportional to load current.
Yet, if in output voltage V
outdecay to the reference voltage V of previous setting
refintbefore, processor 103 sends new VID coding and SetVID_Fast or SetVID_Slow instruction again, the switching tube in voltage regulator 102 will be activated, with reference to regulating circuit 101 by with controllable rate by the reference voltage V previously having set
refintincrease or reduce.If output voltage V now
outmuch larger than the reference voltage V after regulating
ref, output voltage V
outon will produce undershoot.In the situation that there is no reverse-current protection, the switching tube in voltage regulator 102 can be damaged.
Fig. 2 is the oscillogram of existing processor power supply shown in Fig. 1.At t0 constantly, reference voltage V
reffor V
rEF0and output voltage V
outequal reference voltage V
ref.At t1 constantly, processor 103 is passed to SetVID_Decay instruction and VID coding VID1 with reference to regulating circuit 101.Reference voltage V
refdirectly changed into the first object value V corresponding with VID1
rEF1.Switching tube in voltage regulator 102 is all turn-offed, output voltage V
outwith slope decay proportional to load current.
At t2 constantly, SetVID_Fast instruction and the 2nd VID coding VID2 are passed to reference to regulating circuit 101, and wherein VID2 is greater than VID1.Switching tube in voltage regulator 102 is activated, reference voltage V
refwith controllable rate, increase gradually.Due in t2 output voltage V constantly
outmuch larger than reference voltage V
ref, output voltage V
outthe undershoot that upper appearance is very large.Thereafter output voltage V
outalong with reference voltage V
refincrease gradually.At t3 constantly, reference voltage V
refand output voltage V
outarrive the second desired value V corresponding with VID2
rEF2.
Summary of the invention
In order to solve above-mentioned one or more technical problem, the object of this invention is to provide a kind of power supply and control method thereof unlike the prior art.
A kind of power supply according to the embodiment of the present invention, comprising: with reference to regulating circuit, and from processor receiver voltage recognition coding, and based on this voltage identification coding and regulating reference voltage; And voltage regulator, be coupled to reference to regulating circuit to receive reference voltage, according to reference voltage, input voltage is converted to output voltage; Wherein with reference to regulating circuit, by a plurality of steps, realize the adjusting to reference voltage, until reference voltage reaches and the voltage identification corresponding desired value of encoding, with reference to regulating circuit in each step with reference to voltage-regulation one preset value, and at output voltage, enter after the preset range of reference voltage, side enters next step.
According to the control method of a kind of power supply of the embodiment of the present invention, wherein this power supply comprises and according to reference voltage, input voltage is converted to the voltage regulator of output voltage, and this control method comprises: from processor receiver voltage recognition coding; And by a plurality of step adjusting reference voltages, until reference voltage reaches and the voltage identification corresponding desired value of encoding; Wherein in each step with reference to voltage-regulation one preset value, and at output voltage, enter after the preset range of reference voltage, side enters next step.
Accompanying drawing explanation
Fig. 1 is the block diagram of existing processor power supply;
Fig. 2 is the oscillogram of existing processor power supply shown in Fig. 1;
Fig. 3 is the block diagram of processor power supply 300 according to an embodiment of the invention;
Fig. 4 is the oscillogram of the power supply of processor shown in Fig. 3 300 according to an embodiment of the invention;
Fig. 5 is the block diagram of processor power supply 500 according to an embodiment of the invention;
Fig. 6 is for indicating according to an embodiment of the invention the form of dynamic VID coding and required output voltage relation;
Fig. 7 is the flow chart of processor power supply control method according to an embodiment of the invention.
Embodiment
To describe specific embodiments of the invention in detail below, it should be noted that the embodiments described herein, only for illustrating, is not limited to the present invention.In the following description, in order to provide thorough understanding of the present invention, a large amount of specific detail have been set forth.Yet, for those of ordinary skills, it is evident that: needn't adopt these specific detail to carry out the present invention.In other examples, for fear of obscuring the present invention, do not specifically describe known circuit, material or method.
In whole specification, " embodiment ", " embodiment ", " example " or mentioning of " example " are meaned: special characteristic, structure or characteristic in conjunction with this embodiment or example description are comprised at least one embodiment of the present invention.Therefore phrase " in one embodiment ", " in an embodiment ", " example " or " example ", occurring in each place of whole specification differs to establish a capital and refers to same embodiment or example.In addition, can with any suitable combination and or sub-portfolio by specific feature, structure or property combination in one or more embodiment or example.In addition, it should be understood by one skilled in the art that the accompanying drawing providing at this is all for illustrative purposes, and accompanying drawing is not necessarily drawn in proportion.Should be appreciated that it can be directly connected or coupled to another element or can have intermediary element when claiming " element " " to be connected to " or " coupling " arrives another element.On the contrary, when claiming element " to be directly connected to " or during " being directly coupled to " another element, not having intermediary element.Identical Reference numeral is indicated identical element.Term "and/or" used herein comprises any and all combinations of one or more relevant projects of listing.
Embodiments of the invention disclose a kind of power supply comprising with reference to regulating circuit and voltage regulator.This receives VID coding with reference to regulating circuit from processor, and based on this VID coding and regulating reference voltage.Voltage regulator is coupled to reference to regulating circuit, according to reference voltage, input voltage is converted to output voltage.With reference to regulating circuit, by a plurality of steps, realize the adjusting to reference voltage, until reference voltage reaches the corresponding desired value of encoding with VID.With reference to regulating circuit in each step with reference to voltage-regulation one preset value, and at output voltage, enter after the preset range of reference voltage, side enters next step.
Fig. 3 is the block diagram of processor power supply 300 according to an embodiment of the invention.Power supply 300 comprises with reference to regulating circuit 301 and voltage regulator 302.With reference to regulating circuit 301, from processor 303, receive VID coding, and based on this VID coding and regulating reference voltage V
ref.With reference to regulating circuit 301, can receive VID by serial communication or parallel communications encodes.Processor 303 can be CPU, the signal processor of GPU or other types.In one embodiment, receive VID encode with reference to regulating circuit 301 by serial VID bus, this serial VID bus is three lines (clock clock, data data, the alarm alert) synchronous serial interface for transmitted power management information.
Voltage regulator 302 is coupled to reference to regulating circuit 301 to receive reference voltage V
ref, and according to reference voltage V
refby input voltage V
inbe converted to output voltage V
out.In one embodiment, deviant is applied to VID coding, voltage regulator 302 according to both sums by input voltage V
inbe converted to output voltage V
out.
With reference to regulating circuit 301, by a plurality of steps, realize reference voltage V
refadjusting, until reference voltage V
refreach the corresponding desired value of encoding with VID.With reference to regulating circuit 301 in each step with reference to voltage-regulation one preset value, and in output voltage V
outenter reference voltage V
refpreset range after, side enters next step.
In one embodiment, with reference to 301 couples of reference voltage V of regulating circuit
refadjusting reduced.With reference to regulating circuit 301, progressively reduce reference voltage V
ref(for example, by N step, N>=2), until reference voltage V
refreach the corresponding desired value of encoding with VID.With reference to regulating circuit 301 in each step by preset value V
pre_ifrom reference voltage V
refin deduct, and in output voltage V
outenter reference voltage V
refpreset range after, side enters next step, i=1 wherein, 2 ..., N.In one embodiment, the preset value that each step is corresponding, V
pre_1, V
pre_2..., V
pre_Nand unequal.In another embodiment, these preset values all equal V
pre.
In one embodiment, processor 303 produces VID coding according to its required operating voltage, and is coupled to voltage regulator 302 to receive output voltage V
out.In another embodiment, processor 303 produces VID coding according to the required operating voltage of load.This load, but not processor 303, be coupled to voltage regulator 302 to receive output voltage V
out.
In one embodiment, with reference to regulating circuit 301, comprise with reference to decline circuit 304 and voltage-regulation testing circuit 305.Voltage-regulation testing circuit 305 is coupled to voltage regulator 302, in output voltage V
outenter reference voltage V
refpreset range time produce voltage-regulation index signal VRSET.With reference to decline circuit 304, be coupled to voltage-regulation testing circuit 305 and regulate index signal VRSET with receiver voltage, and realize reference voltage V by a plurality of steps based on this voltage-regulation index signal VRSET
refadjusting, until reference voltage V
refreach desired value.
In one embodiment, voltage regulator 302 comprises control circuit 306 and switch transformed circuit 307.Switch transformed circuit 307 comprises at least one switching tube, the conducting by this at least one switching tube with turn-off input voltage V
inbe converted to output voltage V
out.Control circuit 306 is coupled to reference to regulating circuit 301 to receive reference voltage V
ref, and according to reference voltage V
refproduce control signal CTRL with conducting and the shutoff of at least one switching tube in control switch translation circuit 307.Control circuit 306 can adopt PWM (pulse width modulation) or PFM (pulse frequency modulated).Switch transformed circuit 307 can be set to any AC/DC or DC/DC topological structure.In one embodiment, output voltage V
outbe fed to regulate control signal CTRL.In another embodiment, load current and output voltage V
outall be fed to regulate control signal CTRL.In one embodiment, with reference to regulating circuit 301 and control circuit 306, be integrated in same chip.
In one embodiment, equal required output voltage with the VID corresponding desired value of encoding.Output voltage V
outbe used as and threshold voltage V
th1relatively.If output voltage V
outbe less than threshold voltage V
th1, output voltage V
outbe regarded as entering reference voltage V
refpreset range.In another embodiment, output voltage V
outbe used as and threshold voltage V
th1and V
th2relatively, if output voltage is greater than V
th2and be less than V
th1, output voltage V
outbe regarded as entering reference voltage V
refpreset range, V wherein
th1be greater than V
th2.In one embodiment, threshold voltage V
th1equal reference voltage V
refwith stable value V
settle(for example 10mV) sum, and threshold voltage V
th2equal reference voltage V
refwith stable value V
settlepoor.
In one embodiment, sampling and outputting voltage V
outand generation output sampled signal.This output sampled signal is fed to regulate control signal CTRL, and is used as and threshold voltage V
th1and V
th2relatively, to judge output voltage V
outwhether enter reference voltage V
refpreset range.
In one embodiment, with reference to regulating circuit 301 also from processor 303 receiving velocity instructions.When receiving first rate instruction, for example, during SetVID_Decay, and VID coding, with reference to regulating circuit 301, progressively reduce reference voltage V
ref, until reference voltage V
refreach the corresponding desired value of encoding with VID.With reference to regulating circuit 301 in each step by preset value V
pre_ifrom reference voltage V
refin deduct, and in output voltage V
outenter reference voltage V
refpreset range after, side enters next step.When receiving the second speed instruction, for example SetVID_Fast or SetVID_Slow, and during VID coding, with reference to regulating circuit 301 with controllable rate with reference to voltage V
refincrease or reduce, until reference voltage V
refreach the corresponding desired value of encoding with VID.
Fig. 4 is the oscillogram of the power supply of processor shown in Fig. 3 according to an embodiment of the invention.At t0 constantly, reference voltage V
reffor V
rEF0, output voltage V
outequal reference voltage V
ref.At t1 constantly, processor 303 is passed to SetVID_Decay instruction and VID coding VID1 with reference to regulating circuit 301.Switching tube in switch transformed circuit 307 is all turn-offed, output voltage V
outwith slope decay proportional to load current.Reference voltage V
refprogressively reduced.In each step, by preset value V
prefrom reference voltage V
refin deduct.In output voltage V
outenter reference voltage V
refpreset range after (V
ref-V
settle≤ V
out≤ V
ref+ V
settle), side triggers next step.
At t2 constantly, SetVID_Fast instruction and the 2nd VID coding VID2 are passed to reference to regulating circuit 301, and wherein VID2 is greater than VID1.Switching tube in switch transformed circuit 307 is activated, reference voltage V
refwith controllable rate, increase gradually.Due in t2 output voltage V constantly
outwith reference voltage V
refbetween gap and not quite (equal at most V
pre+ V
settle), output voltage V
outwill be along with reference voltage V
refincrease gradually and can not produce obvious undershoot.At t4 constantly, reference voltage V
refand output voltage V
outarrive the second desired value V corresponding with VID2
rEF2.
In embodiment illustrated in fig. 4, due to output voltage V
outin attenuation process, be maintained at reference voltage V always
refaround, compare with prior art shown in Fig. 2, eliminated output voltage V
outon undershoot.In addition, arrive the second desired value V
rEF2the required time is also shortened.
Fig. 5 is the block diagram of processor power supply 500 according to an embodiment of the invention.Power supply 500 comprises with reference to regulating circuit 501 and voltage regulator 502.Voltage regulator 502 is according to reference voltage V
refby input voltage V
inbe converted to output voltage V
out.With reference to regulating circuit 501, from processor 503, receive VID coding, and based on this VID coding and regulating reference voltage V
ref.
With reference to regulating circuit 501, comprise with reference to decline circuit 504, voltage-regulation testing circuit 505 and D/A converting circuit 510.D/A converting circuit 510 is converted to reference voltage V by digital input signals DIN
ref.Voltage-regulation testing circuit 505 is coupled to voltage regulator 502, in output voltage V
outenter reference voltage V
refpreset range time produce voltage-regulation index signal VRSET.With reference to decline circuit 504, be coupled to voltage-regulation testing circuit 505 and D/A converting circuit 510, based on voltage-regulation index signal VRSET, by a plurality of steps, regulate digital input signals DIN, until digital input signals DIN equals VID coding.
In one embodiment, with reference to decline circuit 504, in each step, step value STEP is deducted from digital input signals DIN, and in output voltage V
outenter reference voltage V
refpreset range after, side enters next step.In one embodiment, step value STEP equals 1LSB (least significant bit, least significant bit).In one embodiment, with reference to decline circuit 504, be that executive program is to realize the microprocessor of above-mentioned functions.
In one embodiment, with reference to decline circuit 504, comprise comparing unit 508 and subtrator 509.Comparing unit 508 compares digital input signals DIN and VID coding.Subtrator 509 is coupled to comparing unit 508, voltage-regulation testing circuit 505 and D/A converting circuit 510, and the comparative result based on voltage-regulation index signal VRSET and comparing unit 508 deducts step value STEP from digital input signals DIN.
In one embodiment, voltage-regulation testing circuit 505 comprises and door AND1, and comparator C OM1 and COM2.The in-phase input end receive threshold voltage V of comparator C OM1
th1(V
th1=V
ref+ V
settle).The in-phase input end of the inverting input of comparator C OM1 and comparator C OM2 is coupled to the output of switch transformed circuit 507 to receive output voltage V
out.The inverting input receive threshold voltage V of comparator C OM2
th2(V
th2=V
ref-V
settle).Be coupled to respectively the output of comparator C OM1 and COM2 with two inputs of door AND1, provide voltage-regulation index signal VRSET with the output of door AND1.
In one embodiment, with reference to regulating circuit 501 also from processor 503 receiving velocity instructions.When receiving first rate instruction, for example, during SetVID_Decay, and VID coding, with reference to regulating circuit 501, digital input signals DIN is only reduced to 1LSB, but not make it directly equal VID coding.With reference to regulating circuit 501, continue to wait for, until to output voltage V
outadjusting finish (V
outenter reference voltage V
refpreset range), side digital input signals DI N is reduced to 1LSB again.With reference to regulating circuit 501, continue above action, until digital input signals DIN equates with VID coding.Mode by such, makes output voltage V
outin attenuation process, closely follow reference voltage V
ref, only there is a very little difference between the two.Even if so just guaranteed, in attenuation process, with reference to regulating circuit 501, receive new speed instruction (for example SetVID_Fast or SetVID_Slow), output voltage V
outcan be changed to next required output voltage in direct slope without electric discharge.
Fig. 6 is for indicating according to an embodiment of the invention the form of dynamic VID coding and required output voltage relation.VID coding and digital input signals DIN are 8 signals.Suppose that previous digital input signals DIN is 0F1H (11110001B) and previous output voltage V
outfor 2.9V, if receive VID coding 15H (00010101B) and SetVID_Decay instruction with reference to regulating circuit 501 from processor 503, digital input signals DIN will progressively be decreased to 15H from 0F1H.Output voltage V
outto from 2.9V, decay to 0.7V with slope proportional to load current.In one embodiment, step value SETP is 01H (00000001B), stable value V
settlefor 10mV.In each step, digital input signals DIN all reduces 01H, in output voltage V
outenter reference voltage V
ref± scope of 10mV after, next step side is triggered.
If in attenuation process, with reference to regulating circuit 501, from processor 503, receive new VID coding (for example 11111011B) and SetVID_Fast or SetVID_Slow instruction, digital input signals DIN will be changed to new VID coding with controlled slope slope.
Embodiments of the invention also disclose a kind of control method of processor power supply.This power supply comprises and according to reference voltage, input voltage is converted to the voltage regulator of output voltage.This control method comprises: from processor receiver voltage recognition coding; By a plurality of step adjusting reference voltages, until reference voltage reaches and the voltage identification corresponding desired value of encoding.In each step, with reference to voltage-regulation one preset value, and at output voltage, enter after the preset range of reference voltage, side enters next step.
Fig. 7 is the flow chart of processor power supply control method according to an embodiment of the invention.This power supply comprises according to reference voltage V
refby input voltage V
inbe converted to output voltage V
outvoltage regulator.Reference voltage V
refthat D/A converting circuit produces according to digital input signals DIN.Control method comprises step 721～726.
In step 721, from processor, receive the VID coding that represents required output voltage.
In step 722, step value SETP is deducted from digital input signals DIN.
In step 723, detect output voltage V
outwhether enter reference voltage V
refpreset range.If so, to step 724, otherwise continue to detect.In one embodiment, output voltage V
outbe used as and threshold voltage V
th1and V
th2relatively, if output voltage is greater than V
th2and be less than V
th1, output voltage V
outbe regarded as entering reference voltage V
refpreset range.In one embodiment, threshold voltage V
th1equal reference voltage V
refwith stable value V
settlesum, and threshold voltage V
th2equal reference voltage V
refwith stable value V
settlepoor.
In step 724, digital input signals DIN and VID coding are compared.If digital input signals DIN equals VID coding, to step 725, otherwise to step 722.
In step 725, VID has changed.
In one embodiment, this control method also comprises: from the instruction of processor receiving velocity; When receiving first rate instruction and voltage identification coding, progressively reduce reference voltage, until reference voltage reaches desired value; And when receiving the second speed instruction and voltage identification coding, with controlled slope with reference to voltage-regulation to desired value.
Although described the present invention with reference to several exemplary embodiments, should be appreciated that term used is explanation and exemplary and nonrestrictive term.The spirit or the essence that because the present invention can specifically implement in a variety of forms, do not depart from invention, so be to be understood that, above-described embodiment is not limited to any aforesaid details, and explain widely in the spirit and scope that should limit in the claim of enclosing, therefore fall into whole variations in claim or its equivalent scope and remodeling and all should be the claim of enclosing and contain.
Claims (10)
1. a power supply, comprising:
With reference to regulating circuit, from processor receiver voltage recognition coding, and based on this voltage identification coding and regulating reference voltage; And
Voltage regulator, is coupled to reference to regulating circuit to receive reference voltage, and according to reference voltage, input voltage is converted to output voltage;
Wherein with reference to regulating circuit, by a plurality of steps, realize the adjusting to reference voltage, until reference voltage reaches and the voltage identification corresponding desired value of encoding, with reference to regulating circuit in each step with reference to voltage-regulation one preset value, and at output voltage, enter after the preset range of reference voltage, side enters next step.
2. power supply as claimed in claim 1, is wherein to reduce reference voltage with reference to regulating circuit to the adjusting of reference voltage.
3. power supply as claimed in claim 1, wherein comprises with reference to regulating circuit:
Voltage-regulation testing circuit, is coupled to voltage regulator, produces voltage-regulation index signal when output voltage enters the preset range of reference voltage;
With reference to decline circuit, be coupled to voltage-regulation testing circuit and regulate index signal with receiver voltage, and by a plurality of steps, realize the adjusting to reference voltage based on this voltage-regulation index signal, until reference voltage reaches desired value.
4. power supply as claimed in claim 3, wherein also comprises with reference to regulating circuit:
D/A converting circuit, is converted to reference voltage by digital input signals;
Wherein with reference to decline circuit, be coupled to D/A converting circuit and voltage-regulation testing circuit, based on voltage-regulation index signal, by a plurality of steps, regulate digital input signals, until digital input signals equals voltage identification coding.
5. power supply as claimed in claim 1, wherein output voltage be used as with first threshold voltage and Second Threshold voltage ratio, if output voltage is greater than Second Threshold voltage and is less than first threshold voltage, be considered as the preset range that output voltage enters reference voltage.
6. power supply as claimed in claim 1, wherein voltage regulator comprises:
Switch transformed circuit, comprises at least one switching tube, and the conducting by this at least one switching tube is converted to output voltage by input voltage with turn-offing; And
Control circuit, is coupled to reference to regulating circuit to receive reference voltage, and produces control signal with conducting and the shutoff of at least one switching tube in control switch translation circuit according to reference voltage.
7. power supply as claimed in claim 1, wherein with reference to regulating circuit also from the instruction of processor receiving velocity, when receiving first rate instruction and voltage identification coding, with reference to regulating circuit, progressively reduce reference voltage, until reference voltage reaches and the voltage identification corresponding desired value of encoding; When receiving the second speed instruction and voltage identification coding, with reference to regulating circuit with controllable rate with reference to voltage-regulation to desired value.
8. a control method for power supply, wherein this power supply comprises and according to reference voltage, input voltage is converted to the voltage regulator of output voltage, this control method comprises:
From processor receiver voltage recognition coding; And
By a plurality of step adjusting reference voltages, until reference voltage reaches and the voltage identification corresponding desired value of encoding;
Wherein in each step with reference to voltage-regulation one preset value, and at output voltage, enter after the preset range of reference voltage, side enters next step.
9. control method as claimed in claim 8, wherein output voltage be used as with first threshold voltage and Second Threshold voltage ratio, if output voltage is greater than Second Threshold voltage and is less than first threshold voltage, be considered as the preset range that output voltage enters reference voltage.
10. control method as claimed in claim 8, also comprises:
From the instruction of processor receiving velocity;
When receiving first rate instruction and voltage identification coding, progressively reduce reference voltage, until reference voltage reaches and the voltage identification corresponding desired value of encoding; And
When receiving the second speed instruction and voltage identification coding, with controllable rate with reference to voltage-regulation to desired value.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/251,090 US8791676B2 (en) | 2011-09-30 | 2011-09-30 | Reference adjusting power supply for processor and control method thereof |
| US13/251,090 | 2011-09-30 |
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| Publication Number | Publication Date |
|---|---|
| CN102969896A CN102969896A (en) | 2013-03-13 |
| CN102969896B true CN102969896B (en) | 2014-12-03 |
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| CN2012205033328U Expired - Lifetime CN202916785U (en) | 2011-09-30 | 2012-09-27 | Power supply |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
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Also Published As
| Publication number | Publication date |
|---|---|
| US20130086396A1 (en) | 2013-04-04 |
| US8791676B2 (en) | 2014-07-29 |
| TW201319795A (en) | 2013-05-16 |
| CN102969896A (en) | 2013-03-13 |
| CN202916785U (en) | 2013-05-01 |
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