CN102957532B - Digital sampling synchronous controller-based chaotic secure communication system - Google Patents
Digital sampling synchronous controller-based chaotic secure communication system Download PDFInfo
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Abstract
The invention relates to a digital sampling synchronous controller-based chaotic secure communication system, aiming at providing a chaotic secure communication system which is good in security and short in encryption and decryption consuming time, reducing the system error between a transmitting end and a receiving end of the chaotic system, solving the problem of the synchronous performance of the chaotic system, and improving the communication quality and security. The chaotic secure communication system has the technical scheme that the digital sampling synchronous controller-based chaotic secure communication system is characterized in that the system comprises a chaotic driving unit and a transmitting unit arranged at a transmitting end, a receiving unit arranged at a receiving end, a chaotic response synchronous control unit and a decryption unit, wherein the transmitting unit is connected with the receiving unit by an information channel. The chaotic secure communication system is suitable for the technical field of secret communication.
Description
Technical field
The present invention relates to a kind of chaotic secret communication system based on digital sample isochronous controller.Be applicable to private communication technology field.
Background technology
The secret means of one of traditional cryptographic technique to be communicating pair by the rule (secret key) of reservation undertaken information special transformation, secret key simply then ciphertext is easily decoded, and secret key complexity is then deciphered consuming time longer, cannot meet not only safety but also timely communication need.
Chaotic signal have initial value sensitivity, resistance to overturning, aperiodic randomness, continuous wide band frequency spectrum, the feature such as similar noise, using chaos system as key stream generator, make signal transmission have natural disguise.The difference of the method for chaos encryption and other encryption methods is: chaos encryption is a kind of dynamic encryption method, and the computational efficiency of this method is very high, can realize the real-time dynamic encryption of communicating pair.Consider theoretically, decode by the information possibility of chaos encryption almost nil, have very high confidentiality, thus chaology is specially adapted to secure communication.
The secret signalling adopted based on Chaotic Synchronization Theory in current chaotic secret communication research more.Utilize chaos circuit to cover the information of need to be keep secret at transmitting terminal, adopt the mode of Chaotic Synchronous to demodulate security information at receiving terminal, the Synchronization of Chaotic Systems in this process is crucial.Because chaos system is to the extreme sensitivity of initial value, if two identical chaos system initial values have nuance, two complete incoherent states will be formed after the regular hour, cause receive-transmit system asynchronous, the information exported by deciphering and transmitted breath can be completely different, when therefore requiring to utilize chaotic synchronization communication, receiving terminal chaotic signal must with the chaotic signal stringent synchronization of transmitting terminal, this is one of key technology of chaotic secret communication.
With regard to current technology, have following several method that Chaotic Synchronization Theory is applied to secret signalling:
(l) chaotic mask
As shown in Figure 1, chaotic mask communication is the Chaotic secret communication technology studied the earliest, its utilization has the chaotic signal being similar to white Gaussian noise statistical property and covers the useful information that will transmit as a kind of carrier, utilizes the chaotic signal synchronously to go to recover useful information at receiving terminal.Chaotic mask secure communication mode is the simplest Chaotic Synchronous secure fashion, so its realization is also easy.But in order to ensure synchronously and effectively to cover, in the signal that transmitting terminal sends, information signal should be enough little compared with chaotic signal, is usually less than 1/10th of chaotic signal.This synchronizing quality to two chaos systems requires very high, and the minute differences of signal just likely causes the distortion of useful information even to make mistakes.
In theory diagram shown in Fig. 1, transmitting terminal encrypts useful signal by the cryptographic calculation of chaotic signal and useful signal.Here the normally add operation of cryptographic calculation, multiplying or the hybrid operation of the two.Then just in time contrary with cryptographic calculation in the encryption inverse operation of receiving terminal.
(2) chaos shift keying
As shown in Figure 2, chaos shift keying is that the chaos attractor that encoder has different parameters by two or more forms, utilize their chaos attractors under special parameter as the symbol signal of transmitted information, as " 0 " and " l ", a system in them is selected, and sends chaos analog signal on channel; At the receiving terminal of signal, the chaos analog signal that the chaos system of identical number corresponding construction, parameter is received drives, so that the chaos system corresponding to synchronization encoders.Adjustment parameter can make in each symbol time, only has a pair chaos system synchronously, can detect this synchronous system and the former digital information of decodable code.
Chaos shift keying is the large generic key controlled digital communication plan studying more at present, comprise CKS (ChaosShift Keying), the digital modulation modes such as COOK (Chaotic On-Off Keying), DCSK (Differential Chaos ShiftKeying) and FM-DCSK (Frequency Modulation Differential Chaos Shift Keying).
(3) chaotic parameter modulation
As shown in Figure 3, the basic thought of chaotic parameter modulation technology is: utilize the useful signal transmitted to modulate certain parameter of chaos system at transmitting terminal, utilize Chaotic Synchronous signal extraction to go out corresponding chaos system parameter at receiving terminal, and then recover transmitted signal.
Due to this method be thoroughly information to be dissolved into chaos inner, become a part for chaotic signal, institute's confidentiality in this way the most by force, and, owing to being directly send chaotic signal, disguise in this way also very high.Certainly, it is also maximum in several method to the difficulty of the requirement of equipment and realization.
The key technology realizing chaotic secret communication realizes Synchronization of Chaotic Systems.Therefore Chaotic Synchronization Theory to be applied in secure communication better and still have the problem on more theory and technology to need to solve.Mainly contain: one, the net synchronization capability problem of chaos system.In desirable range of channels, mainly carrying out at present the research to chaotic synchronization communication, but to be applied in real system by chaotic synchronization communication, just must consider the impact on Chaotic Synchronous such as distortion of interference that noise produces, transmission channel.Two, the security performance of Chaotic Synchronization Secure and the problem of robustness.Because the secret and safe of robustness synchronous between chaos system and secret signalling is conflicting, therefore in actual applications, the relation how balanced between the two be must faced by a difficult problem.
Summary of the invention
The technical problem to be solved in the present invention is: for above-mentioned Problems existing, there is provided a kind of good confidentiality, encryption and decryption short chaotic secret communication system consuming time, reduce systematic error between chaos system transmitting terminal and receiving terminal, solve the net synchronization capability problem of chaos system, improve communication quality and fail safe.
The technical solution adopted in the present invention is: based on the chaotic secret communication system of digital sample isochronous controller, it is characterized in that: this system comprises the receiving element of the chaos driver element of transmitting terminal and transmitting element and receiving terminal, chaos motion synchronous control unit and decryption unit, be connected by channel between transmitting element with receiving element, wherein:
Chaos driver element comprises chaos circuit I, voltage follower I and switch, chaos circuit I produces chaotic signal, wherein a phase chaotic signal is divided into two-way, one tunnel directly enters switch, the inversion signal that another road obtains this phase chaotic signal after voltage follower I enters switch, now, 2 system clear text signal also input switch, and the chaotic signal that clear text signal is incorporated chaotic signal by switch to be become with ciphertext transports to transmitting element; Meanwhile, another phase chaotic signal of chaos circuit I, as the control reference of chaos motion synchronous control unit, directly transports to transmitting element;
Transmitting element comprises single-chip microcomputer I, interface circuit I, reference voltage I, interface circuit II and reference voltage II, interface circuit I receives the chaotic signal with ciphertext from switch and this signal is sent to single-chip microcomputer I, the chaotic signal of the described control reference as chaos motion synchronous control unit is sent to single-chip microcomputer I by interface circuit II, and interface circuit I and interface circuit II are connected to reference voltage I and reference voltage II respectively;
Receiving element comprises single-chip microcomputer II, interface circuit III, reference voltage III, interface circuit IV and reference voltage IV, the chaotic signal that single-chip microcomputer II sends over for receiving single-chip microcomputer I, chaotic signal with ciphertext is sent into interface circuit III by single-chip microcomputer II, and modulatedemodulate recalls the chaotic signal entered before interface circuit I, send into the add circuit of decryption unit subsequently; Chaotic signal as Synchronization Control reference is sent into interface circuit IV by single-chip microcomputer II simultaneously, and modulatedemodulate recalls the chaotic signal entered before interface circuit II; Interface circuit III and interface circuit IV are connected to reference voltage III and reference voltage IV respectively;
Chaos motion synchronous control unit comprises subtraction circuit, isochronous controller, chaos circuit II and voltage follower II, subtraction circuit, isochronous controller and chaos circuit II form single argument state feedback controller, the chaotic signal as Synchronization Control reference from interface circuit IV subtracts each other in subtraction circuit with the chaotic signal from chaos circuit II corresponding to this chaotic signal, its difference signal is converted into the synchronous control signal of chaos circuit II again through isochronous controller, another output of chaos circuit II then exports and reaches synchronous chaotic signal, this chaotic signal exports the add circuit of decryption unit again to after voltage follower II is anti-phase,
Decryption unit comprises add circuit and zero-order holder, add circuit is by the chaotic signal from interface circuit III and the anti-phase chaotic signal summation from voltage follower II, adder summed result be zero part be the electronegative potential of 2 system clear text signal, exporting through zero-order holder is 0, the non-vanishing part of summed result is the high potential of 2 system clear text signal, and exporting through zero-order holder is 1.
Described chaos circuit I and chaos circuit II mainly adopt operational amplifier LM358 and analog multiplier MC1496 and build with reference to typical Lorenz chaos system Mathematical Modeling, and this model is simplified, subtraction and integral operation are fused together by resistive degeneration, the chaos system Mathematical Modeling after simplification is:
Wherein: x, y, z is the variable of three states, is presented as the signal of X, Y, Z three-phase in circuit; R
1, R
3, R
5, R
7, R
11resistance be 10k Ω; R
4, R
9, R
12resistance be 100k Ω; R
2resistance be 28k Ω; R
8resistance be 300 Ω; R
10resistance be 37.5k Ω; R
6resistance be 333 Ω; C
1, C
2, C
3capacitance be 10nF.
The decoupling capacitor of 100nF is added between the power line of operational amplifier LM358 and ground wire in described chaos circuit I and chaos circuit II.
Described voltage follower I and voltage follower II have included operational amplifier LM358, send into switch after converting the phase signals in X, Y, Z three-phase signal the inversion signal of this phase signals to.
The circuit structure of described interface circuit I ~ IV is identical, all comprises anti-phase adder and anti-phase proportional amplifier, realizes primarily of operational amplifier TL082CP.
Described subtraction circuit is formed primarily of operational amplifier LM358, using come from respectively chaos circuit I and chaos circuit II, subtract each other, as the input of isochronous controller as two chaotic signals of Synchronization Control reference.
Described isochronous controller realizes sample-synchronous by single argument STATE FEEDBACK CONTROL algorithm and controls, isochronous controller is formed primarily of operational amplifier TL082CP, the difference signal of subtraction circuit is converted into the synchronous control signal to chaos circuit II, and the Mathematical Modeling of isochronous controller foundation is:
Wherein y
1for the state variable of chaotic signal Y1; y
2for the state variable of chaotic signal Y2; y
2-y
1represent the tracking error between chaos circuit II and chaos circuit I; U (e) is STATE FEEDBACK CONTROL variable; The capacitance of C is 10nF; K is for regulating gain, and employing pole-assignment calculates the k value in controller.
Described single-chip microcomputer I and single-chip microcomputer II all adopt model to be C8051F120 single-chip microcomputer, and single-chip microcomputer I and single-chip microcomputer II are for the Digital Transmission between transmitting element and receiving element.
Described add circuit is formed primarily of operational amplifier LM358.
The invention has the beneficial effects as follows: the present invention utilizes chaos shift keying technology to be encrypted deciphering to information, improve typical Lorenz chaos system circuit scale, the frequency of chaotic signal is improved, advantageously in communications, improve communication quality and fail safe; The present invention optimizes typical Lorenz chaos system circuit, under guarantee chaos circuit can export the prerequisite of chaotic signal smoothly, reduce electric component quantity, thus reduce systematic error between chaos system transmitting element and receiving element, be more of value to industrial production and engineer applied; The present invention adopts C8051F120 chip microcontroller communication function, and the analogue transmission signal of chaos circuit is converted into digital transmission signal, is more suitable for remote Signal transmissions.The present invention contrasts the oscillogram of plaintext, ciphertext and translation by experiment, can specify the feasibility of this communication schemes, validity and superiority.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of background technology chaotic mask secure communication.
Fig. 2 is the schematic diagram of background technology chaos shift keying secure communication.
Fig. 3 is the schematic diagram of background technology chaotic modulation secure communication.
Fig. 4 is system flow chart of the present invention.
Fig. 5 is the schematic diagram of chaos circuit I of the present invention.
Fig. 6 is the schematic diagram of chaos circuit II of the present invention.
Fig. 7 is the schematic diagram of voltage follower I of the present invention.
Fig. 8 is the schematic diagram of voltage follower II of the present invention.
Fig. 9 is the schematic diagram of interface circuit of the present invention.
Figure 10 is the schematic diagram of single argument state feedback isochronous controller of the present invention.
Figure 11 is the schematic diagram of subtraction circuit of the present invention.
Figure 12 is the schematic diagram of add circuit of the present invention.
Figure 13 is typical Lorenz circuit system schematic diagram.
Figure 14 is the chaos circuit attractor phasor (comprising four amplitude-phase diagrams) after optimizing.
Figure 15 is clear text signal.
Figure 16 is ciphertext signal.
Figure 17 is translation signal.
Embodiment
As shown in Figure 4, the present embodiment is a kind of chaotic secret communication system based on digital sample isochronous controller, and this system is made up of chaos driver element 1, transmitting element 2, channel 3, receiving element 4, chaos motion synchronous control unit 5 and decryption unit 6.Be connected by channel 3 between transmitting element 2 with receiving element 4.
Chaos driver element 1 is made up of primarily of operational amplifier LM358 and analog multiplier MC1496 chaos circuit I 1-1(), voltage follower I 1-2(forms primarily of operational amplifier LM358) and switch 1-3 form, wherein chaos circuit I 1-1 produces chaotic signal X1 and Y1, chaotic signal X1 mono-tunnel directly enters switch 1-3, and another road also enters switch 1-3 obtain the inversion signal of chaotic signal X1 after voltage follower I 1-2 after.The effect of switch is when the clear text signal of 2 systems is in high potential, directly exports chaotic signal X1, and when clear text signal is in electronegative potential, switch exports the inversion signal of chaotic signal X1.
Transmitting element 2 is made up of single-chip microcomputer I 2-5, interface circuit I 2-1, reference voltage I 2-2, interface circuit II 2-3 and reference voltage II 2-4.Clear text signal completes ciphering process through switch becomes ciphertext, enters single-chip microcomputer I 2-5 through interface circuit I 2-1.Chaotic signal Y1, as the control reference of chaos motion synchronous control unit 5, directly enters single-chip microcomputer I 2-5 through interface circuit II 2-3 and sends.In the C8051F120 single-chip microcomputer that the present embodiment adopts, 12 moulds number and number the input and output voltage scope of weighted-voltage D/A converter be 0 ~ 2.48V, the signal voltage range of chaos circuit is ± 3V.Because interface microcontroller voltage does not mate with the signal voltage of chaos circuit, therefore the present embodiment devises interface circuit.First, the peak-to-peak value of interface circuit decay chaotic signal, by the dividing potential drop effect of resistance, decays to original 1/3 by the peak-to-peak value of chaotic signal.Secondly, the chaotic signal after decay is raised zero point, is obtained 1/2 of former input and output voltage scope, i.e. 1.24V by reference voltage dividing potential drop, make it merge mutually with by compressed chaotic signal, obtain meeting high frequency and send the chaotic signal required.Reference voltage in the present embodiment all can between voltage range-2.4V ~+2.4V continuously adjustabe, participate in adjusting signal in secret signalling debug process, make it meet the transmission requirement of single-chip microcomputer.Single-chip microcomputer I 2-5 is by chaotic signal Y1 and incorporate the chaotic signal X1 expressly becoming ciphertext and be sent to receiving element 4.
Receiving element 4 is made up of single-chip microcomputer II 4-1, interface circuit III 4-2, reference voltage III 4-3, interface circuit IV 4-4 and reference voltage IV 4-5.The effect of single-chip microcomputer II 4-1 receives chaotic signal Y1 and incorporates the chaotic signal X1 expressly becoming ciphertext.Chaotic signal X1 enters interface circuit III 4-2, and modulatedemodulate recalls the chaotic signal X1 entered before interface circuit I 2-1, sends into the add circuit 6-1 of decryption unit 6.Chaotic signal Y1 enters interface circuit IV 4-4, and modulatedemodulate recalls the chaotic signal Y1 entered before interface circuit II 2-3, sends into the subtraction circuit 5-1 of chaos motion synchronous control unit 5.
In the present embodiment, the circuit structure of 4 interface circuits is identical, all comprises anti-phase adder and anti-phase proportional amplifier, realizes primarily of operational amplifier TL082CP.4 reference voltages are also identical.
Chaos motion synchronous control unit 5 is made up of primarily of operational amplifier LM358 subtraction circuit 5-1(), isochronous controller 5-2(forms primarily of operational amplifier TL082CP), chaos circuit II 5-3(forms primarily of operational amplifier LM358 and analog multiplier MC1496) and voltage follower II 5-4(form primarily of operational amplifier LM358) form.Chaos circuit II 5-3 is all identical with model with the components and parts of chaos circuit I 1-1, circuit structure and initial value different.According to the characteristic of chaos, two chaos circuits can because of the extremely fine difference of initial value, and through several execution cycle, final body reveals diverse output.That is, if do not add any control measure, chaos circuit I is completely not identical with the output signal of chaos circuit II.The Main Function of chaos motion synchronous control unit 5 is that make chaos circuit II and chaos circuit I reach Complete Synchronization, obtain chaotic signal X2, this is one of most important step in the present embodiment using chaotic signal Y1 as control reference.Chaotic signal X2 exports the inversion signal of X2 after voltage follower II 5-4 is anti-phase.
From the chaotic signal Y1 of interface circuit IV 4-4 with all send into subtraction circuit 5-1 from the chaotic signal Y2 of chaos circuit II 5-3, the difference signal of both acquisitions, difference signal becomes synchronous control signal through isochronous controller 5-2, acts on the Y2 phase control end (interface position is shown in Figure 10) of chaos circuit II 5-3.Isochronous controller 5-2 is that its Mathematical Modeling is by single argument STATE FEEDBACK CONTROL algorithm realization Synchronization Control:
Wherein y
1for the state variable of chaotic signal Y1; y
2for the state variable of chaotic signal Y2; y
2-y
1represent the tracking error between chaos circuit II and chaos circuit I; U (e) is STATE FEEDBACK CONTROL variable; The capacitance of C is 10nF; K is for regulating gain, and employing pole-assignment calculates the k value in controller, and k=3.8 in the present embodiment, is realized by operational amplifier TL082CP.
The control objectives of STATE FEEDBACK CONTROL algorithm makes tracking error be zero, and namely chaotic signal Y1 and chaotic signal Y2 reaches synchronous.Again due to the characteristic of chaos circuit, there is close coupling relation between X, Y, Z three-phase, chaotic signal Y1 and chaotic signal Y2 reaches and chaotic signal X1 and chaotic signal X2 synchronously can be forced to reach synchronous; So, the add circuit 6-1 that synchronous chaotic signal X2 can be admitted to decryption unit 6 is reached.
Decryption unit 6 is made up of primarily of operational amplifier LM358 add circuit 6-1() and zero-order holder 6-2 form.The inversion signal of chaotic signal X1 and chaotic signal X2 is sued for peace by add circuit 6-1.The part overlapped completely in the inversion signal of chaotic signal X1 and chaotic signal X2 represents the high potential in clear text signal; In the inversion signal of chaotic signal X1 and chaotic signal X2, the part of mirror image represents the electronegative potential in clear text signal each other.So, add circuit summed result be zero part be electronegative potential in clear text signal, exporting through zero-order holder is 0; The non-vanishing part of summed result is the high potential in clear text signal, and exporting through zero-order holder is 1.So just decrypt in ciphertext signal expressly in receiving terminal.
The nonlinear ordinary differential equation of the Lorenz Chaotic Systems of the present embodiment reference is
As parameter a=10, b=28, c=8/3, system is in chaos state.Chaos circuit is built according to Lorenz system model, circuit as shown in figure 13, can see that in oscilloscope waveform converts slowly, can find that the signal frequency that system produces is too low by spectrum analysis, if adopt the bandwidth criteria of traditional 3dB, the frequency of chaotic signal can not more than 100Hz, and this brings difficulty to the transmission of chaotic signal.
As follows to typical Lorenz circuit system optimization method in the present embodiment:
First scale conversion is carried out to circuit, make it be more suitable for circuit realiration, and guarantee that the circuit after converting is still chaos circuit.The system that it has been generally acknowledged that produces the frequency of signal and becomes inverse relation with the capacitance in system, for solving the not high problem of chaotic signal frequency, in the present embodiment, the capacitor's capacity of three in integrator is lowered 1000 times.Chaotic signal frequency after conversion promotes to some extent, and the gross energy of high band also improves in the lump.Meanwhile, high-frequency energy is relatively uniform distribution in frequency range, and this causes the energy of each frequency component of signal all smaller (be all less than-13dB, meet communicating requirement).This also embodies the wide spectrum of chaotic signal and lower powered characteristic to a certain extent.
Secondly the present embodiment is the parameter matching between guarantee 2 chaos circuits, select the precision resistance of thousand-island forest park and the error amount CBB electric capacity within ± 0.1nF to build circuit, make relevant parameter error in chaos circuit I and chaos circuit II be less than one of percentage.
Last for ease of industrial production and engineer applied, the present embodiment simplifies chaos circuit further.It is extremely responsive to component parameters that characteristic due to chaos determines chaos circuit.And in typical chaos circuit, employ more resistance, electric capacity and operational amplifier, this coupling for component parameters is very unfavorable, even if use other circuit element of army grade, slight error can be amplified step by step by circuit, causes two chaos systems can not be synchronous very well.So need to simplify circuit, by resistive degeneration, subtraction and integral operation are fused together, reduce the number of element.
Chaos system Mathematical Modeling after the present embodiment simplifies is:
Wherein: x, y, z is the variable of three states, is presented as the signal of X, Y, Z three-phase in circuit; R
1, R
3, R
5, R
7, R
11resistance be 10k Ω; R
4, R
9, R
12resistance be 100k Ω; R
2resistance be 28k Ω; R
8resistance be 300 Ω; R
10resistance be 37.5k Ω; R
6resistance be 333 Ω; C
1, C
2, C
3capacitance be 10nF.
By the emulation experiment of MATLAB, it is relatively dense that the chaos circuit after optimization produces chaos attractor phasor, and as shown in figure 14, this illustrates that the speed producing signal is faster, frequency is higher, is more suitable for communications requirement.
In the present embodiment, the clear text signal of secret signalling emulation experiment, ciphertext signal and translation signal are as shown in Figure 15,16,17.
Claims (8)
1. the chaotic secret communication system based on digital sample isochronous controller, it is characterized in that: this system comprises the receiving element of the chaos driver element of transmitting terminal and transmitting element and receiving terminal, chaos motion synchronous control unit and decryption unit, be connected by channel between transmitting element with receiving element, wherein:
Chaos driver element comprises chaos circuit I, voltage follower I and switch, chaos circuit I produces chaotic signal, wherein a phase chaotic signal is divided into two-way, one tunnel directly enters switch, the inversion signal that another road obtains this phase chaotic signal after voltage follower I enters switch, now, 2 system clear text signal also input switch, and the chaotic signal that clear text signal is incorporated chaotic signal by switch to be become with ciphertext transports to transmitting element; Meanwhile, another phase chaotic signal of chaos circuit I, as the control reference of chaos motion synchronous control unit, directly transports to transmitting element;
Transmitting element comprises single-chip microcomputer I, interface circuit I, reference voltage I, interface circuit II and reference voltage II, interface circuit I receives the chaotic signal with ciphertext from switch and this signal is sent to single-chip microcomputer I, the chaotic signal of the described control reference as chaos motion synchronous control unit is sent to single-chip microcomputer I by interface circuit II, and interface circuit I and interface circuit II are connected to reference voltage I and reference voltage II respectively;
Receiving element comprises single-chip microcomputer II, interface circuit III, reference voltage III, interface circuit IV and reference voltage IV, the chaotic signal that single-chip microcomputer II sends over for receiving single-chip microcomputer I, chaotic signal with ciphertext is sent into interface circuit III by single-chip microcomputer II, and modulatedemodulate recalls the chaotic signal entered before interface circuit I, send into the add circuit of decryption unit subsequently; Chaotic signal as Synchronization Control reference is sent into interface circuit IV by single-chip microcomputer II simultaneously, and modulatedemodulate recalls the chaotic signal entered before interface circuit II; Interface circuit III and interface circuit IV are connected to reference voltage III and reference voltage IV respectively;
Chaos motion synchronous control unit comprises subtraction circuit, isochronous controller, chaos circuit II and voltage follower II, subtraction circuit, isochronous controller and chaos circuit II form single argument state feedback controller, the chaotic signal as Synchronization Control reference from interface circuit IV subtracts each other in subtraction circuit with the chaotic signal from chaos circuit II corresponding to this chaotic signal, its difference signal is converted into the synchronous control signal of chaos circuit II again through isochronous controller, another output of chaos circuit II then exports and reaches synchronous chaotic signal, this chaotic signal exports the add circuit of decryption unit again to after voltage follower II is anti-phase,
Decryption unit comprises add circuit and zero-order holder, add circuit is by the chaotic signal from interface circuit III and the anti-phase chaotic signal summation from voltage follower II, adder summed result be zero part be the electronegative potential of 2 system clear text signal, exporting through zero-order holder is 0, the non-vanishing part of summed result is the high potential of 2 system clear text signal, and exporting through zero-order holder is 1;
Described chaos circuit I and chaos circuit II mainly adopt operational amplifier LM358 and analog multiplier MC1496 and build with reference to typical Lorenz chaos system Mathematical Modeling, and this model is simplified, subtraction and integral operation are fused together by resistive degeneration, the chaos system Mathematical Modeling after simplification is:
Wherein: x, y, z is the variable of three states, is presented as the signal of X, Y, Z three-phase in circuit; R
1, R
3, R
5, R
7, R
11resistance be 10k Ω; R
4, R
9, R
12resistance be 100k Ω; R
2resistance be 28k Ω; R
8resistance be 300 Ω; R
10resistance be 37.5k Ω; R
6resistance be 333 Ω; C
1, C
2, C
3capacitance be 10nF.
2. chaotic secret communication system according to claim 1, is characterized in that: the decoupling capacitor adding 100nF in described chaos circuit I and chaos circuit II between the power line of operational amplifier LM358 and ground wire.
3. chaotic secret communication system according to claim 1, it is characterized in that: described voltage follower I and voltage follower II have included operational amplifier LM358, after converting the phase signals in X, Y, Z three-phase signal the inversion signal of this phase signals to, send into switch.
4. chaotic secret communication system according to claim 1, is characterized in that: the circuit structure of described interface circuit I ~ IV is identical, all comprises anti-phase adder and anti-phase proportional amplifier, realizes primarily of operational amplifier TL082CP.
5. chaotic secret communication system according to claim 1, it is characterized in that: described subtraction circuit is formed primarily of operational amplifier LM358, using come from respectively chaos circuit I and chaos circuit II, subtract each other, as the input of isochronous controller as two chaotic signals of Synchronization Control reference.
6. chaotic secret communication system according to claim 5, it is characterized in that: described isochronous controller realizes sample-synchronous by single argument STATE FEEDBACK CONTROL algorithm and controls, isochronous controller is formed primarily of operational amplifier TL082CP, the difference signal of subtraction circuit is converted into the synchronous control signal to chaos circuit II, and the Mathematical Modeling of isochronous controller foundation is:
Wherein y
1for the state variable of chaotic signal Y1; y
2for the state variable of chaotic signal Y2; y
2-y
1represent the tracking error between chaos circuit II and chaos circuit I; U (e) is STATE FEEDBACK CONTROL variable; The capacitance of C is 10nF; K is for regulating gain, and employing pole-assignment calculates the k value in controller.
7. chaotic secret communication system according to claim 1, is characterized in that: described single-chip microcomputer I and single-chip microcomputer II all adopt model to be C8051F120 single-chip microcomputer, and single-chip microcomputer I and single-chip microcomputer II are for the Digital Transmission between transmitting element and receiving element.
8. chaotic secret communication system according to claim 1, is characterized in that: described add circuit is formed primarily of operational amplifier LM358.
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| CN104125561A (en) * | 2014-07-07 | 2014-10-29 | 东北大学 | Switching type wireless voice secret communication device and method based on Lorenz chaotic circuit |
| CN106341220A (en) * | 2016-08-30 | 2017-01-18 | 王波 | Hyper-chaos secure communication system and method |
| CN114938267A (en) * | 2021-02-05 | 2022-08-23 | 中国人民解放军海军航空大学 | Secret communication method of gain-limited uncertain fractional order chaotic system |
| CN113257260A (en) * | 2021-04-09 | 2021-08-13 | 中国质量认证中心 | Transmission method and terminal equipment for secret communication of mobile phone |
| CN113141250B (en) * | 2021-05-19 | 2022-04-22 | 齐鲁工业大学 | Secret communication synchronous control method and device for chaotic system of sending end and receiving end |
| CN113541920B (en) * | 2021-06-21 | 2023-05-23 | 中国人民解放军陆军炮兵防空兵学院 | Design method of analog chaotic communication secret circuit |
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