CN102955919A - Encipherment protection method of BIOS (basic input output system) chip - Google Patents

Encipherment protection method of BIOS (basic input output system) chip Download PDF

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Publication number
CN102955919A
CN102955919A CN2012104736138A CN201210473613A CN102955919A CN 102955919 A CN102955919 A CN 102955919A CN 2012104736138 A CN2012104736138 A CN 2012104736138A CN 201210473613 A CN201210473613 A CN 201210473613A CN 102955919 A CN102955919 A CN 102955919A
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China
Prior art keywords
bios chip
cpld
pcie
chip
processor
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Pending
Application number
CN2012104736138A
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Chinese (zh)
Inventor
张志强
刘强
金长新
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inspur Group Co Ltd
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Inspur Group Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Inspur Group Co Ltd filed Critical Inspur Group Co Ltd
Priority to CN2012104736138A priority Critical patent/CN102955919A/en
Publication of CN102955919A publication Critical patent/CN102955919A/en
Pending legal-status Critical Current

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Abstract

The invention discloses an encipherment protection method of a BIOS (basic input output system) chip and belongs to the technology in the chip data security field. Connecting channels arranged between a processor and the BIOS chip are connected through a PCIe (peripheral component interface express) interface plate and a CPLD (complex programmable logic device), a signal input end, a signal output end and a PCIe slot are arranged on the PCIe interface plate, a security confidentiality card can be inserted into the PCIe slot, a signal input end and a signal output end are arranged on the CPLD, the processor is respectively connected to the input end of the CPLD and the signal input end of the PCIe interface plate, and the signal output end of the CPLD and the signal output end of the PCIe interface plate are respectively connected to the BIOS chip. The encipherment protection method of the BIOS chip has the characteristics that the structure is simple, the use is convenient, the design is ingenious, the data information security of the chip can be ensured, and the like.

Description

A kind of method to the protection of BIOS chip encryption
 
Technical field
The present invention relates to a kind of chip data security art, specifically a kind of method to the protection of BIOS chip encryption.
Background technology
The BIOS chip is the chip piece on the computer motherboard, is storing BIOS setup program, and BIOS is the abbreviation of English " Basic Input Output System ", and literally rear Chinese is exactly Basic Input or Output System (BIOS).Self-check program and system's self-triggered program after the program of the most important basic input and output of the in store computing machine of BIOS, system's configuration information, the start.Its major function provides the bottom, the most direct hardware setting and control for computing machine.BIOS is a bridge block that connects software program and hardware device, the instant requirement of being responsible for solving hardware.
Safeguard protection to the storage data of BIOS chip on the computer motherboard is extremely important.Present method for security protection mainly is to increase cryptographic algorithm at software to realize.The security that how can better strengthen the BIOS chip is the problem that the existing technical staff need to solve.
Simultaneously the PCIe card mainly is used in expanded function on the mainboard, and PCIe bussing technique and chip speed technology are combined both can strengthen chip security more.
Summary of the invention
Technical assignment of the present invention provide a kind of simple in structure, easy to use, design is ingenious, guarantee a kind of method to the protection of BIOS chip encryption of chip data information security.
Technical assignment of the present invention is realized in the following manner, be connected by PCIe interface board and CPLD with connecting path between the BIOS chip at processor, be provided with signal input part, signal output part and PCIe slot on the PCIe interface board, safe and secret card can insert in the PCIe slot, be provided with signal input part, signal output part on the CPLD, processor is connected respectively to the signal input part of CPLD and the signal input part of PCIe interface board, and the signal output part of the signal output part of CPLD and PCIe interface board all is connected to the BIOS chip;
Described method is:
(1), when there is safe and secret card in the PCIe slot, CPLD detects and has safe and secret card, then open processor to the PCIe interface board to the path between the BIOS chip, simultaneously the disconnection process device through CPLD to the path between the BIOS chip;
(2), when processor is opened to PCIe interface board to the path between the BIOS chip, can operate the storage data of BIOS chip by processor;
(3), when there is not safe and secret card in the PCIe slot, CPLD detects and does not have safe and secret card, then the disconnection process device to the PCIe interface board to the path between the BIOS chip, open simultaneously processor through CPLD to the path between the BIOS chip;
(4), when processor disconnects to the PCIe interface board to the path between the BIOS chip, cannot operate the storage data of BIOS chip by processor.
PCIe interface board model adopts PCIe X16.
A kind of method to the protection of BIOS chip encryption of the present invention has the following advantages: only have when having safe and secret card; just can the storage data of BIOS chip be operated; prevent that effectively the user from arbitrarily wiping, revising content in the BIOS chip; prevented the leakage of information in the BIOS chip; reached information security policy; thereby, have good value for applications.
Description of drawings
The present invention is further described below in conjunction with accompanying drawing.
Accompanying drawing 1 is a kind of structured flowchart of the method to BIOS chip encryption protection.
Embodiment
Explain below with reference to Figure of description and specific embodiment a kind of method to the protection of BIOS chip encryption of the present invention being done.
Embodiment:
A kind of method to the protection of BIOS chip encryption of the present invention, be connected by PCIe interface board and CPLD with connecting path between the BIOS chip at processor, be provided with signal input part, signal output part and PCIe slot on the PCIe interface board, safe and secret card can insert in the PCIe slot, be provided with signal input part, signal output part on the CPLD, processor is connected respectively to the signal input part of CPLD and the signal input part of PCIe interface board, and the signal output part of the signal output part of CPLD and PCIe interface board all is connected to the BIOS chip;
Described method is:
(1), when there is safe and secret card in the PCIe slot, CPLD detects and has safe and secret card, then open processor to the PCIe interface board to the path between the BIOS chip, simultaneously the disconnection process device through CPLD to the path between the BIOS chip;
(2), when processor is opened to PCIe interface board to the path between the BIOS chip, can operate the storage data of BIOS chip by processor;
(3), when there is not safe and secret card in the PCIe slot, CPLD detects and does not have safe and secret card, then the disconnection process device to the PCIe interface board to the path between the BIOS chip, open simultaneously processor through CPLD to the path between the BIOS chip;
(4), when processor disconnects to the PCIe interface board to the path between the BIOS chip, cannot operate the storage data of BIOS chip by processor.
PCIe interface board model adopts PCIe X16.
A kind of method to the protection of BIOS chip encryption of the present invention except the described technical characterictic of instructions, is the known technology of those skilled in the art.

Claims (2)

1. method to BIOS chip encryption protection, it is characterized in that being connected by PCIe interface board and CPLD with connecting path between the BIOS chip at processor, be provided with signal input part, signal output part and PCIe slot on the PCIe interface board, safe and secret card can insert in the PCIe slot, be provided with signal input part, signal output part on the CPLD, processor is connected respectively to the signal input part of CPLD and the signal input part of PCIe interface board, and the signal output part of the signal output part of CPLD and PCIe interface board all is connected to the BIOS chip;
Described method is:
(1), when there is safe and secret card in the PCIe slot, CPLD detects and has safe and secret card, then open processor to the PCIe interface board to the path between the BIOS chip, simultaneously the disconnection process device through CPLD to the path between the BIOS chip;
(2), when processor is opened to PCIe interface board to the path between the BIOS chip, can operate the storage data of BIOS chip by processor;
(3), when there is not safe and secret card in the PCIe slot, CPLD detects and does not have safe and secret card, then the disconnection process device to the PCIe interface board to the path between the BIOS chip, open simultaneously processor through CPLD to the path between the BIOS chip;
(4), when processor disconnects to the PCIe interface board to the path between the BIOS chip, cannot operate the storage data of BIOS chip by processor.
2. a kind of method to the protection of BIOS chip encryption according to claim 1 is characterized in that PCIe interface board model adopts PCIe X16.
CN2012104736138A 2012-11-21 2012-11-21 Encipherment protection method of BIOS (basic input output system) chip Pending CN102955919A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2012104736138A CN102955919A (en) 2012-11-21 2012-11-21 Encipherment protection method of BIOS (basic input output system) chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2012104736138A CN102955919A (en) 2012-11-21 2012-11-21 Encipherment protection method of BIOS (basic input output system) chip

Publications (1)

Publication Number Publication Date
CN102955919A true CN102955919A (en) 2013-03-06

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CN2012104736138A Pending CN102955919A (en) 2012-11-21 2012-11-21 Encipherment protection method of BIOS (basic input output system) chip

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CN (1) CN102955919A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107832086A (en) * 2016-09-14 2018-03-23 华为技术有限公司 Computer equipment, program writing method and program read method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN86104856A (en) * 1986-07-31 1988-02-10 江西冶金学院 A kind of privacy device of computer software
CN101098246A (en) * 2006-06-27 2008-01-02 张恩迪 Internet manager
CN102129529A (en) * 2010-01-15 2011-07-20 北京国信经纬信息安全技术有限公司 Security card
CN102298680A (en) * 2011-08-12 2011-12-28 曙光信息产业(北京)有限公司 Secure startup method for computer
CN102495776A (en) * 2011-12-02 2012-06-13 浪潮集团有限公司 Method for debugging basic input output system (BIOS) of storage controller applicable to cloud storage

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN86104856A (en) * 1986-07-31 1988-02-10 江西冶金学院 A kind of privacy device of computer software
CN101098246A (en) * 2006-06-27 2008-01-02 张恩迪 Internet manager
CN102129529A (en) * 2010-01-15 2011-07-20 北京国信经纬信息安全技术有限公司 Security card
CN102298680A (en) * 2011-08-12 2011-12-28 曙光信息产业(北京)有限公司 Secure startup method for computer
CN102495776A (en) * 2011-12-02 2012-06-13 浪潮集团有限公司 Method for debugging basic input output system (BIOS) of storage controller applicable to cloud storage

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107832086A (en) * 2016-09-14 2018-03-23 华为技术有限公司 Computer equipment, program writing method and program read method
CN107832086B (en) * 2016-09-14 2020-03-20 华为技术有限公司 Computer device, program writing method, and program reading method

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Application publication date: 20130306

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