CN102955685B - Multi-core DSP and system thereof and scheduler - Google Patents
Multi-core DSP and system thereof and scheduler Download PDFInfo
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Abstract
The present invention proposes a kind of multinuclear digital signal processor, the system using this multinuclear digital signal processor and corresponding scheduler.Described multinuclear digital signal processor is characterised by: whole kernel resources of described multinuclear digital signal processor are assigned to multiple subsystem, and wherein, at least one subsystem in the plurality of subsystem is assigned the kernel resources of plural kernel.
Description
Technical field
This patent disclosure relates generally to multinuclear digital signal processor (DSP), more particularly, to one
Plant multinuclear digital signal processor based on subsystem architecture.
Background technology
In order to break through the limit of monokaryon digital signal processor processes ability, recently, multinuclear numeral
Signal processor has obtained the extensive concern of people and has commonly used.At multinuclear digital signal
Reason utensil has the plural kernel that can carry out parallel processing, and it can within the unit interval
The instruction number processed can reach several times of monokaryon digital signal processor accordingly, so with single
Check figure word signal processor is compared its disposal ability and has been obtained qualitative leap.
In the prior art, when using multinuclear digital signal processor, use following two frame
Structure.
Framework 1: make a task run on all kernels of multinuclear digital signal processor.
Framework 2: make a task run on the single kernel of multinuclear digital signal processor.
Fig. 1 shows that the multinuclear digital signal processor using framework 1 is to kernel resources and storage
The use of device resource.As seen from Figure 1, multinuclear digital signal processor includes n kernel, interior
Core 0, kernel 1, kernel 2 ... kernel n-1.Each task (task 0, task 1 and
Task 2) all operate on all kernels.Each kernel is used alone private memory, and
Share to use with other kernels and share memorizer.Using this framework, individual task can use institute
The resource having kernel is run at a terrific speed；And owing to individual task is assigned to all interior
The speciality that core runs, inter-core load remains balance.
But, due to and not all task can the operation of complete parallel, need to arrange task
Terminate border.Further, since some task needs first to run again in all on single kernel
Parallel running on core, needs to arrange the task beginning boundary of other kernels.As shown in Figure 1,
Task 0, task 1, the operation of task 2 are not complete parallels, thus for each task
It is provided with task termination border；Task 1 needs first to run on kernel n-1 again at all kernels
Upper parallel running, thus it is provided with the task beginning boundary of other kernels.
Can be observed intuitively by Fig. 1, the setting of task boundary will result in prolonging of process time
Late, the waste of kernel processes resource is caused.
Meanwhile, all kernels using the multinuclear digital signal processor of framework 1 need to share generation
Code and data, take substantial amounts of shared memory space.Further, due to the access of shared memorizer
Speed is generally slow than private memory, uses the task of the multinuclear digital signal processor of framework 1
Processing speed will be restricted by memory access rate.
Fig. 2 shows that the multinuclear digital signal processor using framework 2 is to kernel resources and storage
The use of device resource.From Figure 2 it can be seen that multinuclear digital signal processor includes n kernel, interior
Core 0, kernel 1, kernel 2 ... kernel n-1.Each task (task 0, task 1, appoint
Business 2 and task 3) only operate on single kernel.Each kernel is used alone private memory,
And share to use with other kernels and share memorizer.
Owing to framework 2 is without arranging task boundary, kernel can be consecutively carried out task and process,
The waste of nuclear cycle in reducing.As shown in Figure 2, kernel 0 operation task 0 continuously and appointing
Business 3, at task run duration, there is not idle periods in kernel 0.Meanwhile, transport when single kernel
During row individual task, it is possible to use private memory stores data, thus improves data and deposit
Take speed and then improve task processing speed, and also the resource of shared memorizer can be saved.
But, framework 2 there is also great drawback.First, framework 2 does not possess framework 1 admittedly
Some inter-core load balancings, need carry out special load measure and use task scheduling to calculate
Method could realize inter-core load balance.Secondly, some task is (particularly in telecommunication system in real time
Property require stronger task) requirement of disposal ability (is generally needed to be processed with the unit interval
Instruction number is measured) cannot be met by single kernel, use the multinuclear numeral letter of framework 2
Number processor cannot process this generic task.In fig. 2, task 1 cannot be accommodated with kernel 1 straight
Illustrate this rough sledding with seeing.
Therefore, use the multinuclear digital signal processor of framework 1 and framework 2 respectively to deposit pros and cons,
And the framework that their pluses and minuses are substantially used by it determines.
It addition, from multinuclear digital signal processor memorizer made for.At existing system
In, only exist all sharing and independent special two ways.All sharing modes refer to, memorizer
Shared by all kernels of multinuclear digital signal processor.Individually dedicated mode refers to, memorizer by
Single kernel takies.This entirety is shared and the occupation mode of independent special alternative is a lack of spirit
Activity.Can access in shared memorizer additionally, code is placed on all kernels all the time.
This causes substantial amounts of shared memory space occupied, and owing to the content of shared memorizer is permissible
The most easily by all kernel modifications, there is great potential safety hazard.
Summary of the invention
It is an object of the invention to, design is a kind of than framework 1 of the prior art and framework 2 more
Multinuclear digital signal processor architecture flexibly, solve in above-mentioned technical problem at least some of asks
Topic.
According to the first aspect of the invention, it is proposed that a kind of multinuclear digital signal processor, it is special
Levy and be: whole kernel resources of described multinuclear digital signal processor are assigned to multiple subsystem
System, wherein, at least one subsystem in the plurality of subsystem is assigned plural
The kernel resources of kernel.
Preferably, at least one subsystem in the plurality of subsystem can be allocated all interior
The kernel resources of core.Furthermore, it is possible to dynamically adjust the kernel resources distribution of described subsystem.
Preferably, described multinuclear digital signal processor uses and shares memorizer and specific store
Device.The storage resource of described shared memorizer can be divided and distribute to the plurality of subsystem
In multi-nuclear system.The storage resource of described private memory can be assigned to the plurality of
One-nucleon system in subsystem and/or multi-nuclear system.
According to the second aspect of the invention, it is also proposed that a kind of use multinuclear digital signal processor
System, including: kernel resources is assigned to the multinuclear digital signal processor of multiple subsystem；
Share memorizer；And private memory.
Preferably, the storage resource of described shared memorizer can be divided and distribute to described many
Multi-nuclear system in individual subsystem.The storage resource of described private memory can be assigned to
One-nucleon system in the plurality of subsystem and/or multi-nuclear system.Described private memory can
Being at the private part defined in described shared memorizer.
According to the third aspect of the invention we, it is proposed that a kind of for multinuclear digital signal processor
The kernel resources scheduler that is scheduling, including maximum resource needs estimation unit, be used for
The maximum kernel resources that estimation task is required in the process of implementation；Kernel load measuring unit, uses
It is in use state in measurement kernel resources and is in idle condition；Subsystem selects unit,
Survey for the result estimated based on maximum resource needs estimation unit and kernel load measuring unit
The result of amount, according to predetermined policy, selects to have the ability perform this task and be in idle condition
Subsystem；And allocation unit, for selecting the subsystem selected by unit to divide subsystem
It is used in the described task of execution.
Preferably, described scheduler also includes: the real-time estimation unit of resource requirement, in real time
The kernel resources that estimation task is required in the process of implementation；And subsystem kernel resources adjusts single
Unit, for the kernel resources demand estimated according to the real-time estimation unit of resource requirement, adjusts son
The kernel resources distribution of system.Described predetermined policy can include following at least one: task put down
All wait shortest time；High-priority task preferentially performs；Inter-core load balances；And kernel
Resource utilization maximizes.
The multinuclear digital signal processor based on subsystem architecture that the present invention proposes overcomes existing
There is the defect of the multinuclear digital signal processor using framework 1 and framework 2 in technology.
Accompanying drawing explanation
By the preferred embodiments of the present invention are described below in conjunction with the accompanying drawings, by making, the present invention's is above-mentioned
And other objects, features and advantages are clearer, wherein:
Fig. 1 shows the multinuclear digital signal processor pair using framework 1 according to prior art
Kernel resources and the use of memory resource；
Fig. 2 shows the multinuclear digital signal processor pair using framework 2 according to prior art
Kernel resources and the use of memory resource；
Fig. 3 shows according to the first embodiment of the present invention, many based on subsystem architecture
The schematic diagram of the kernel resources distribution of check figure word signal processor；
Fig. 4 show according to a first embodiment of the present invention, multinuclear digital signal processor exists
The schematic diagram of subsystem service condition during operation；
Fig. 5 show according to the second embodiment of the present invention, many based on subsystem architecture
The schematic diagram of the kernel resources distribution of check figure word signal processor；
Fig. 6 show according to a second embodiment of the present invention, multinuclear digital signal processor exists
The schematic diagram of subsystem service condition during operation；
Fig. 7 shows and is using multi-nuclear system to perform what kernel resources demand changed over
The schematic diagram of the situation that kernel resources wastes is caused during task；
Fig. 8 shows the kernel resources distribution of subsystem and moves with the kernel resources amount of required by task
The schematic diagram that state adjusts；
Fig. 9 shows the son of multinuclear digital signal processor according to a first embodiment of the present invention
The schematic diagram of the mapping relations of system and memory resource；
Figure 10 shows employing multinuclear digital signal processor according to embodiments of the present invention
The schematic block diagram of calculating system；And
Figure 11 shows the block diagram of the concrete configuration of the scheduler shown in Figure 10.
Detailed description of the invention
With reference to the accompanying drawings to a preferred embodiment of the present invention will be described in detail, in the process of description
In to eliminate be unnecessary details and function for the present invention, to prevent the present invention's
Understand to cause and obscure.
Each embodiment of the present invention is described below as a example by 6 check figure word signal processors.But,
One of ordinary skill in the art are not it will be appreciated that the realization of the present invention relies at multinuclear digital signal
The particular number of reason device kernel.On the contrary, the multinuclear digital signal processor of arbitrary kernel quantity is all
It is suitable for use with the principle of the present invention.
Fig. 3 show according to a first embodiment of the present invention, multinuclear based on subsystem architecture
The schematic diagram of the kernel resources distribution of digital signal processor.As it is shown on figure 3, multinuclear numeral letter
Number processor includes 6 kernels, kernel 0, kernel 1, kernel 2 ... kernel 5.These are 6 years old
The resource of individual kernel is assigned to 8 subsystems, subsystem 0, subsystem 1, subsystem 2,
Subsystem 3 ... subsystem 7.Each task is run on single subsystem.
Specifically, on the one hand, each kernel of multinuclear digital signal processor is (kernel 0, interior
Core 1, kernel 2 ... kernel 5) kernel resources be respectively allocated to subsystem 1, subsystem
System 2, subsystem 3, subsystem 4, subsystem 5 and subsystem 7；On the other hand, many check figures
The kernel 0 of word signal processor and the kernel resources of kernel 1 are assigned to subsystem 0, thus
Subsystem 0 is suitable to process the task that the higher needs of resource requirement are completed by 2 kernels；Kernel
2, the kernel resources of kernel 3 and kernel 4 is assigned to subsystem 6, thus subsystem 6 is suitable to
Process the task that the higher needs of resource requirement are completed by 3 kernels.Use the above-mentioned method of salary distribution,
Owing to single kernel may be assigned to plural subsystem, (such as, kernel 0 both can quilt
Distribution can be assigned to again subsystem 0 to subsystem 1), in the reality of multinuclear digital signal processor
Border run duration, corresponding to multiple subsystems of same kernel (such as, corresponding to kernel 0
Subsystem 0 and subsystem 1) can not exist simultaneously.
Therefore, be suitable to owing to being specifically designed for the task design that cannot be completed by a kernel
The subsystem of its resource requirement, and not make individual task operate on all kernels or make single
Task only operates on single kernel, uses at multinuclear digital signal based on subsystem architecture
Reason device uses more flexible compared with the multinuclear digital signal processor using framework 1, and
Can process again compared with the multinuclear digital signal processor using framework 2 cannot be by single kernel
Completing of task.
Although it should be appreciated that being presented above multinuclear digital signal processing core resource
A kind of concrete method of salary distribution, but there is also it apparently for one of ordinary skill in the art
His method of salary distribution.It is true that the resource of multinuclear digital signal processor based on subsystem architecture
Distribution only need to meet following condition: distributes at least one subsystem in the multiple subsystems formed
There is the kernel resources of plural kernel.As a example by Fig. 3, subsystem 0 has kernel 0
With the kernel resources of kernel 1, subsystem 6 has the kernel resources of kernel 3 to kernel 5.
Fig. 4 show according to a first embodiment of the present invention, multinuclear digital signal processor exists
The schematic diagram of subsystem service condition during operation, wherein, horizontal axis representing time.Such as Fig. 4 institute
Show, during period t0 to t2, use subsystem 0 to perform task 0；After moment t2,
Subsystem 1 and subsystem 2 is used to perform task 1 and 2 respectively；During period t0 to t1,
Subsystem 3, subsystem 4 and subsystem 5 is used to perform task 3, task 4 and task 5 respectively；
After time tl, subsystem 6 is used to perform task 6；From moment t0, use subsystem
7 perform task 7.
In view of multinuclear digital signal processor actually used in often need to perform such as ISR
(interrupt service routine, Interrupt Service Routine), Message Processing and debugging routine etc.
Need the public function that all kernels participate in, it is preferable that the use shown in Fig. 5 can be defined
The subsystem of all kernels in multinuclear digital signal processor.
Fig. 5 show according to a second embodiment of the present invention, many check figures based on subsystem architecture
The schematic diagram of the kernel resources distribution of word signal processor, wherein, multinuclear digital signal processor
The kernel resources method of salary distribution essentially identical with the method for salary distribution shown in Fig. 3, the most all in
Nuclear resource is also assigned to a new subsystem 8, and subsystem 8 is designed to carry out needing institute
There is the public function that kernel participates in.
Fig. 6 show according to a second embodiment of the present invention, multinuclear digital signal processor fortune
The schematic diagram of subsystem service condition during row, wherein, horizontal axis representing time.Fig. 6 and Fig. 4
Difference be, from moment T, use subsystem 8 perform task 8.
In addition, it is contemplated that the kernel resources of required by task may often be such that and changes over, some is appointed
Originally business needs the resource of multiple kernel to perform, but through slump in demand after a while, very
To the resource only needing single kernel.If performing this task with above-mentioned multi-nuclear system, it will
Cause the serious waste of kernel resources.Fig. 7 shows this situation.As it is shown in fig. 7, task
0 and the kernel resources demand of task 6 change over, perform with above-mentioned multi-nuclear system
During this task, the kernel resources distributed for subsystem 0 and subsystem 6 is not fully used.
In order to improve the utilization rate of kernel resources further, as further improving, Ke Yigen
According to the kernel resources amount of required by task, the kernel resources distribution of dynamic adaptation system.Concrete
Adjustment mode will be described in detail in after a while.Fig. 8 shows the kernel resources distribution of subsystem
The schematic diagram dynamically adjusted with the kernel resources amount of required by task.As shown in Figure 8, task 0 He
The kernel resources demand of task 6 changes over, operation task 0 and the subsystem of task 6
The kernel resources distribution of 0 and 6 occurs to change accordingly the most in time, thus subsystem 2, subsystem
Task in system 3 and subsystem 4 is run the longer time, the service efficiency of kernel resources
Higher.
In order to solve multinuclear digital signal processor pair in described in background technology, prior art
The some problem using existence of memory resource.The invention allows for according to above-mentioned distribution side
Mapping relations between the subsystem of formula formation and memory resource.Usually, it is stipulated that be necessary for making
Distribute with the subsystem of multi-core resource and share memory resource, and be not only to use monokaryon resource
Memory resource is shared in subsystem distribution.This regulation is mainly based upon considered below: multinuclear subsystem
System needs to share memory resource and buffers to carry out intercore communication and the input/output as task
District, one-nucleon system is made without intercore communication.But, above-mentioned regulation is not restricted
, consider based on other, it is also possible to above-mentioned regulation is supplemented.For example, it is contemplated that to multinuclear
Subsystem also needs to carry out communication in core, it is sometimes desirable to the table of storage key and/or certain buffering
District, it is also possible to distribute private memory resource for multi-nuclear system.Certainly, multi-nuclear system is also
Can only use shared memorizer.
Fig. 9 shows the son of multinuclear digital signal processor according to a first embodiment of the present invention
The schematic diagram of the mapping relations of system and memory resource.As it is shown in figure 9, multinuclear digital signal
The storage resource of processor includes sharing memorizer and private memory resource, wherein, shares and deposits
Reservoir can be shared by plural kernel, and private memory is that each kernel is special.Tool
Body ground, in fig .9, shared memorizer is divided into two parts, and is respectively allocated to needs
Carrying out dinucleon system 0 and 3 nuclear sub-system 6 of intercore communication, non-sub-system 0 distributes specially
With memory resource, but sub-system 6 is assigned with relevant to kernel 2, kernel 3 and kernel 4
The private memory resource of connection.To one-nucleon system 1, subsystem 2, subsystem 3, subsystem
4, subsystem 5 and subsystem 7 are assigned with private memory resource.Further, it is also possible to special
Memory resource distributes the memory resource used by storehouse for each kernel.
Owing to shared memorizer is carried out by multinuclear digital signal processor based on subsystem architecture
Divide and distribute to the most different subsystems, between subsystem, cannot revise code each other, thus
The occupation mode to shared memory resource with the multinuclear digital signal processor using framework 1
Compare safety higher.Additionally, due to the multinuclear digital signal processor of above-mentioned framework specifies not
Share memory resource for only using the subsystem of monokaryon resource to distribute, can save and share storage
Resource, and access speed can be improved, and then improve task processing speed.
The physics private memory being associated with each kernel above can be on-chip memory,
Such as L1/L2 cache.On-chip memory has the access speed being exceedingly fast all the time, but it holds
Measure less, it is impossible to meet some task needs to memory capacity.For meeting storage capacity requirement,
Private memory is additionally included in the private part defined in shared memorizer.
It can be to share on chip to deposit that the physics more than can shared by multiple kernels shares memorizer
Memorizer on reservoir and some plate, as DDR (Double Data Rate, double-speed) stores
Device.On plate, memory span is very big, can meet the storage capacity requirement of any task.As above
Described, also can define private part thereon, special as multinuclear digital signal processor is deposited
Reservoir.
The polycaryon processor of the present invention and to the mapping relations of memory resource except can gram
Take the defect that the prior art described in background technology exists, also make the program of individual task set
Meter personnel only need to be absorbed in single subsystem rather than whole multi-core DSP when the program of design,
Reduce the difficulty of programming.
Owing to have employed the framework being different from prior art, according to the multinuclear digital signal of the present invention
The method for scheduling task of processor is correspondingly different with prior art.Hereinafter, will be situated between in detail
The dispatching method of the multinuclear digital signal processor based on subsystem architecture continued according to the present invention.
Figure 10 shows employing multinuclear digital signal processor according to embodiments of the present invention
The schematic block diagram of calculating system 1000.As shown in Figure 10, calculating system 1000 includes task team
Row 1010, scheduler 1020 and kernel resources 1030, wherein, scheduling is responsible for by scheduler 1020
Suitable kernel resources 1030 is to process the task in task queue.As seen from Figure 10, with existing
The difference having technology maximum is, uses multinuclear Digital Signal Processing according to embodiments of the present invention
The calculating system 1000 of device scheduler 1020 scheduling least unit be subsystem rather than
Kernel.As a example by 6 core processors of 8 subsystems according to a first embodiment of the present invention, Figure 10
In kernel resources 1030 part include 8 subsystems can being scheduled for: subsystem 0～subsystem
System 7.For clarity sake, according to kernel resources number (the i.e. subsystem distributed for subsystem
Disposal ability grade), subsystem 0～subsystem 7 are aligned to 3 row, the son in the 1st row
System 1, subsystem 2, subsystem 3, subsystem 4, subsystem 5 and subsystem 7 are monokaryon
Subsystem, the subsystem 0 in the 2nd row is dinucleon system, and the subsystem 6 in the 3rd row is
3 nuclear sub-system.
Figure 11 further illustrates the concrete configuration of the scheduler 1020 shown in Figure 10.Such as figure
Shown in 11, scheduler 1020 should at least include: maximum resource needs estimation unit 1110, uses
In the maximum kernel resources estimating that task is required in the process of implementation；Kernel load measuring unit
1120, it is used for measuring kernel resources and is in use state and is in idle condition；Subsystem
Select unit 1130, for based on maximum resource needs estimation unit 1110 estimate result with
And the result that kernel load measuring unit 1120 is measured, according to predetermined policy, select to have the ability to hold
This task of row and be in the subsystem of idle condition；And allocation unit 1140, for by son
Subsystem distribution selected by system selection core 1130 is used for performing this task.Employing has this
Configuration scheduler can to according to a first embodiment of the present invention and the second embodiment, based on son
The kernel resources of the multinuclear digital signal processor of system architecture is scheduling.
Multinuclear digital signal processor according to a first embodiment of the present invention shown in Fig. 4 is running
Time the schematic diagram of subsystem service condition can regard the scheduling result of scheduler as.Can by Fig. 4
Seeing, from the point of view of kernel resources utilization rate, this scheduling result is optimal.However, it is contemplated that
Other factors (as the shortest in the task average latency, high-priority task preferentially performs, internuclear
Load balance etc.), subsystem selects unit 1130 can use different predetermined policies, for
The subsystem that same task choosing is different, and then produce different scheduling result.
The generation process of the scheduling result of Fig. 4 is as follows.Assume at moment t0, task 0 to task
7 to be sequentially arranged in task queue medium pending.Wherein, task 0, task 3, task 4,
Task 5 and task 7 have high priority, and task 1, task 2 and task 6 are taken second place.Scheduling
Maximum resource needs estimation unit 1110 in device estimates the maximum kernel money of each required by task
Source, learns that task 0 needs the kernel resources of 2 kernels, task 1 to task 5 and task 7
Being respectively necessary for the kernel resources of 1 kernel, task 6 needs the kernel resources of 3 kernels.
Kernel load measuring unit 1120 is measured kernel resources and is in use state and is in
Idle condition, learns that whole kernel is in idle condition.Subsystem selects unit 1130 based on
Result and kernel load measuring unit 1120 that large resource needs estimate unit 1110 is estimated are surveyed
The result of amount, according to first carrying out the strategy of the high task of priority, selects subsystem 0 to perform to appoint
Business 0, subsystem 3 to subsystem 5 performs task 3 to task 5 respectively, and subsystem 7 performs to appoint
Business 7.
To moment t1, task 3 to task 5 completes, and occurs the kernel resources of free time once again, this
Time task queue in waiting task be task 1, task 2 and task 6.Kernel load measure
Unit 1120 is measured and is learnt that kernel 2 to kernel 4 is in idle condition.Subsystem selects unit
1130 result estimated based on maximum resource needs estimation unit 1110 and kernel load measures
The result that unit 1120 is measured, according to the strategy of maximization kernel resources utilization rate, selects subsystem
System 6 execution task 6.
To moment t2, task 0 completes, and occurs the kernel resources of free time, now task team once again
Waiting task in row is task 1 and task 2.Kernel load measuring unit 1120 is measured
Know that kernel 0 and kernel 1 are in idle condition.Subsystem selects unit 1130 based on maximum resource
The knot that the result of needs estimate unit 1110 estimation and kernel load measuring unit 1120 are measured
Really, subsystem 1 and subsystem 2 is selected to perform task 1 and task 2 respectively.
In order to realize as above, dynamically adjust subsystem according to the kernel resources amount of required by task
The further improvement of the kernel resources distribution of system.Scheduler shown in Figure 11 can also include:
The real-time estimation unit of resource requirement 1150, needed for estimation task in real time is in the process of implementation
Kernel resources；And subsystem kernel resources adjustment unit 1160, for real according to resource requirement
Time estimation unit estimate kernel resources demand, adaptation system kernel resources distribution.From
And, it is possible to achieve as in Fig. 8, the resource distribution of subsystem 0 adjusts.Specifically, resource needs
Time realistic, estimation unit 1150 estimates task 0 in real time at moment t2 ' and only needs the interior of 1 kernel
Nuclear resource.Subsystem kernel resources adjustment unit 1160 is according to this estimated result, by subsystem 0
Kernel resources distribution be adjusted to only use kernel 0 kernel resources.Thus, kernel 1 interior
Nuclear resource becomes idle, and can be used for performing other tasks.
Preferably, scheduler also includes: task execution time estimation unit 1160, is used for estimating
Time needed for tasks carrying；And the real-time estimation unit of resource requirement 1150 can estimate subsystem
The idle period of each kernel in system.It is thus possible to realize as in Fig. 8, the resource of subsystem 6 is divided
Auxiliary tone is whole.Specifically, task execution time estimation unit 1160 estimates task 3 and task
The execution required time of 4 is respectively t0 to t1 " and t0 to t1 ', and resource requirement estimates in real time
It is t1 that unit 1150 estimates the idle period of kernel 2 in subsystem 6 "-t1, the sky of kernel 3
Idle section is t1 '-t1.Thus, the kernel resources distribution of subsystem 6 can adjust in the following manner:
At period t1 to t1 ', only use the kernel resources of kernel 4；At period t1 ' to t1 ", only make
With kernel 3 and the kernel resources of kernel 4；At moment t1 " after, use kernel 3 to kernel 5
Kernel resources.Thus, the utilization rate of the kernel resources of kernel 2 to kernel 4 can reach
Bigization.
In the above description, for each step, list multiple example, although inventor
Indicate example associated with each other as much as possible, but this does not imply that these examples inevitable according to
There is corresponding relation in corresponding label.As long as not existing between the given condition of selected example
Contradiction, can be in different steps, and the example selecting label not corresponding is constituted accordingly
Technical scheme, such technical scheme also should be regarded as being comprised in the scope of the present invention.
It should be noted that, in the above description, the most in an illustrative manner, it is shown that this
Bright technical scheme, but it is not intended that the invention be limited to above-mentioned steps and cellular construction.?
When possible, as required step and cellular construction can be adjusted and accept or reject.Cause
This, some step and unit not implement element necessary to the overall invention thought of the present invention.
Therefore, technical characteristic essential to the invention is limited solely by the overall invention being capable of the present invention
The minimum requirements of thought, and do not limited by above instantiation.
So far already in connection with preferred embodiment, invention has been described.It should be understood that ability
Field technique personnel without departing from the spirit and scope of the present invention, can carry out various its
Its change, replace and add.Therefore, the scope of the present invention is not limited to above-mentioned particular implementation
Example, and should be defined by the appended claims.
Claims (11)
1. a multinuclear digital signal processor, comprises N number of kernel；It is characterized in that: described N number of kernel is allocated
The most individual subsystem, wherein, the kernel resources of n kernel is assigned in the plurality of subsystem at least
One subsystem, N > n >=2；The most each task is run on single subsystem.
Multinuclear digital signal processor the most according to claim 1, wherein, in the plurality of subsystem at least
One subsystem is assigned the kernel resources of all kernels.
Multinuclear digital signal processor the most according to claim 1 and 2, wherein, at described multinuclear digital signal
The kernel resources of reason device carries out scheduling of resource in units of subsystem.
Multinuclear digital signal processor the most according to claim 1 and 2, wherein, dynamically adjusts described subsystem
Kernel resources distribution.
Multinuclear digital signal processor the most according to claim 1 and 2, wherein, at described multinuclear digital signal
Reason device uses shares memorizer and private memory.
Multinuclear digital signal processor the most according to claim 5, wherein, the storage money of described shared memorizer
The multi-nuclear system that source is divided and distributes to the plurality of subsystem.
Multinuclear digital signal processor the most according to claim 5, wherein, the storage money of described private memory
One-nucleon system that source is assigned in the plurality of subsystem and/or multi-nuclear system.
8. use a system for multinuclear digital signal processor, including:
Multinuclear digital signal processor, comprises N number of kernel；Described N number of kernel is assigned to multiple subsystem,
Wherein, the kernel resources of n kernel is assigned at least one subsystem in the plurality of subsystem, N > n
≥2；
Share memorizer；And
Private memory；
The most each task is run on single subsystem.
System the most according to claim 8, wherein, the storage resource of described shared memorizer is divided and distributes
Multi-nuclear system to the plurality of subsystem.
The most according to claim 8 or claim 9, system, wherein, the storage resource of described private memory is assigned to
One-nucleon system in the plurality of subsystem and/or multi-nuclear system.
11. systems according to claim 10, wherein, described private memory is described at least partially
Share the private part defined in memorizer.
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| US9858115B2 (en) | 2013-10-30 | 2018-01-02 | Mediatek Inc. | Task scheduling method for dispatching tasks based on computing power of different processor cores in heterogeneous multi-core processor system and related non-transitory computer readable medium |
| CN108351783A (en) * | 2015-10-29 | 2018-07-31 | 华为技术有限公司 | The method and apparatus that task is handled in multinuclear digital information processing system |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101788920A (en) * | 2010-02-05 | 2010-07-28 | 北京航空航天大学 | CPU virtualization method based on processor partitioning technology |
| CN101916209A (en) * | 2010-08-06 | 2010-12-15 | 华东交通大学 | Cluster task resource allocation method for multi-core processor |
| CN101937370A (en) * | 2010-08-16 | 2011-01-05 | 中国科学技术大学 | Method and device supporting system-level resource distribution and task scheduling on FCMP (Flexible-core Chip Microprocessor) |
-
2011
- 2011-08-17 CN CN201110235610.6A patent/CN102955685B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101788920A (en) * | 2010-02-05 | 2010-07-28 | 北京航空航天大学 | CPU virtualization method based on processor partitioning technology |
| CN101916209A (en) * | 2010-08-06 | 2010-12-15 | 华东交通大学 | Cluster task resource allocation method for multi-core processor |
| CN101937370A (en) * | 2010-08-16 | 2011-01-05 | 中国科学技术大学 | Method and device supporting system-level resource distribution and task scheduling on FCMP (Flexible-core Chip Microprocessor) |
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