CN102932581B - Image processing circuit and image processing method - Google Patents
Image processing circuit and image processing method Download PDFInfo
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- CN102932581B CN102932581B CN201110225703.0A CN201110225703A CN102932581B CN 102932581 B CN102932581 B CN 102932581B CN 201110225703 A CN201110225703 A CN 201110225703A CN 102932581 B CN102932581 B CN 102932581B
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Abstract
A kind of image processing circuit and image processing method.Image processing circuit comprises block matching unit, multiplexer, moderator and motion compensation circuit.Block matching unit according to the reference block of the current block of current picture and reference picture calculate high frequency absolute error and and low frequency absolute error and.Moderator according to arbitration rules control multiplexer optionally export high frequency absolute error and or low frequency absolute error and, arbitration rules are relevant to the scene characteristics of current picture.The high frequency absolute error that motion compensation circuit exports according to multiplexer and or low frequency absolute error and carry out motion compensation.
Description
Technical field
The present invention relates to a kind of image processing circuit and image processing method, and in particular to a kind of can according to high frequency absolute error and or low frequency absolute error and carry out image processing circuit and the image processing method of motion compensation.
Background technology
Please refer to Fig. 1, Fig. 1 illustrates the schematic diagram into mobile estimation and motion compensating device.Mobile estimation and motion compensation (MotionEstimateandMotionCompensation, MEMC) device 1 comprise mobile estimation engine 11 and motion compensation circuit 12.Mobile estimation engine 11 carries out mobile estimating according to current picture and reference picture, makes motion compensation circuit go out to compensate picture according to the interpolation of mobile estimating result.
Mobile estimation engine 11 comprises block matching unit (BlockMatchingUnit) 111.Current picture can be cut into equal-sized block by block matching unit (BlockMatchingUnit) 111, and each block has corresponding region of search in reference picture.The low frequency absolute error that block matching unit 111 can calculate current block and reference block with to find out the block the most similar to oneself in region of search.
Referring to Fig. 1, Fig. 2, Fig. 3 and Fig. 4, Fig. 2 illustrates the schematic diagram into reference picture, and Fig. 3 is the schematic diagram of current picture, and Fig. 4 illustrates the schematic diagram into interpolation image.But, when broadcasting pictures occur flicker scene time, block matching unit 111 namely cannot according to low frequency absolute error with find out the block the most similar to oneself.For example, the regional area 21 of Fig. 2 and the regional area 31 of Fig. 3 are such as car light.Regional area 21 is complete dark, and regional area 31 is entirely bright.Because regional area 31 is excessive with the pixel difference value of regional area 21, therefore block matching unit 111 namely cannot according to low frequency absolute error with find out the block the most similar to oneself.Thus, motion compensation circuit 12 can cause motion compensation circuit 12 interpolation to go out interpolation image as Fig. 4 illustrates because the block comparison of block matching unit 111 is incorrect.Wherein regional area 41 corresponds to regional area 31 and regional area 21.And regional area 41 can cause shape to produce distortion because block comparison is incorrect.
Summary of the invention
The present invention relates to a kind of image processing circuit and image processing method, can be that flicker or object move and correctly find out the block the most similar to oneself correctly to carry out motion compensation according to regional area.
According to the present invention, a kind of image processing circuit is proposed.Image processing circuit comprises block matching unit (BlockMatchingUnit), multiplexer, moderator and motion compensation circuit.Block matching unit according to the reference block of the current block of current picture and reference picture calculate high frequency absolute error and (SumofAbsoluteDifference, SAD) and low frequency absolute error and.Moderator according to arbitration rules control multiplexer optionally export high frequency absolute error and or low frequency absolute error and, arbitration rules are relevant to the scene characteristics of current picture.The high frequency absolute error that motion compensation circuit exports according to multiplexer and or low frequency absolute error and carry out motion compensation.
According to the present invention, a kind of image processing method is proposed.Image processing method comprises: according to the reference block of the current block of current picture and reference picture calculate high frequency absolute error and (SumofAbsoluteDifference, SAD) and low frequency absolute error and; According to arbitration rules optionally export high frequency absolute error and or low frequency absolute error and, arbitration rules are relevant to the scene characteristics of current picture; And according to high frequency absolute error and or low frequency absolute error and carry out motion compensation.
In order to have better understanding to above-mentioned and other aspect of the present invention, preferred embodiment cited below particularly, and coordinating accompanying drawing, being described in detail below:
Accompanying drawing explanation
Fig. 1 illustrates the schematic diagram into mobile estimation and motion compensating device.
Fig. 2 illustrates the schematic diagram into reference picture.
Fig. 3 is the schematic diagram of current picture.
Fig. 4 illustrates the schematic diagram into interpolation image.
Fig. 5 illustrates the schematic diagram into a kind of image processing circuit according to the first embodiment.
Fig. 6 illustrates the flow chart into the image processing method according to the first embodiment.
[main element symbol description]
10：
1: mobile estimation and motion compensating device
5: image processing circuit
11,51: mobile estimation engine
12,52: motion compensation circuit
21,31,41: regional area
53: multiplexer
54: moderator
61 ~ 63: step
511,111: block matching unit
20：
Embodiment
First embodiment
Illustrate the schematic diagram into a kind of image processing circuit according to the first embodiment referring to Fig. 5 and Fig. 6, Fig. 5, Fig. 6 illustrates the flow chart into the image processing method according to the first embodiment.Image processing circuit 5 comprises mobile estimation engine 51, motion compensation circuit 52, multiplexer 53 and moderator 54, and mobile estimation engine 51 also comprises block matching unit (BlockMatchingUnit) 511.Image processing method can be applied to image processing circuit 5 and comprise the steps:
First as shown at step 61, block matching unit 511 exports high frequency absolute error and (SumofAbsoluteDifference, SAD) AC_SAD and low frequency absolute error and DC_SAD according to the reference block of the current block of current picture and reference picture.Block matching unit 511 is according to the pixel value of current block
with the pixel value of reference block
calculate low frequency absolute error and DC_SAD.Low frequency absolute error and
the displacement that (x, y) is current block and reference block, and a block has N × N number of pixel.
High frequency absolute error and two kinds of account forms can be had.The first account form by block matching unit 511 according to low frequency absolute error and DC_SAD and direct current difference value DC
diffcalculate high frequency absolute error and AC_SAD.High frequency absolute error and AC_SAD=|DC_SAD-DC
diff|.The second account form is by the pixel value of block matching unit 511 according to current block
the average pixel value DC of current block
avg1, reference block pixel value
and the average pixel value DC of reference block
avg2calculate high frequency absolute error and AC_SAD.High frequency absolute error and
Then, as shown in step 62, moderator 54 controls multiplexer 53 according to arbitration rules and optionally exports high frequency absolute error and AC_SAD or low frequency absolute error and DC_SAD, and arbitration rules are relevant to the scene characteristics of current picture.Then as shown at step 63, the high frequency absolute error that exports according to multiplexer 53 of motion compensation circuit 52 and AC_SAD or low frequency absolute error and DC_SAD carry out motion compensation.
When regional area is for flicker (flash), motion compensation circuit 52 correctly can carry out motion compensation according to high frequency absolute error and AC_SAD.On the contrary, when regional area be object move time, motion compensation circuit 52 correctly can carry out motion compensation according to low frequency absolute error and DC_SAD.Thus, move no matter regional area is flicker or object, mobile image processing circuit 5 correctly can carry out motion compensation.
Aforementioned current picture also comprises the several adjacent block adjacent with current block, and aforementioned arbitration rules such as comprise adjacent block arbitration rules.If adjacent block arbitration rules are multiplexer 53, corresponding adjacent block exports high frequency absolute error and AC_SAD, then the corresponding block at present of multiplexer 53 exports high frequency absolute error and AC_SAD, if multiplexer 53 corresponding adjacent block output low frequency absolute error and DC_SAD, then multiplexer 53 is to should block output low frequency absolute error and DC_SAD at present.
Second embodiment
Second embodiment and the first embodiment main difference part are that the arbitration rules of the second embodiment comprise difference arbitration rules.If difference arbitration rules are difference arbitration rules when the difference of high frequency absolute error and AC_SAD and low frequency absolute error and DC_SAD is greater than difference threshold value, the corresponding block at present of multiplexer 53 exports high frequency absolute error and AC_SAD.This is because when regional area is for flicker, high frequency absolute error and AC_SAD are very little, and low frequency absolute error and DC_SAD are very large, so motion compensation circuit 52 correctly can carry out motion compensation according to high frequency absolute error and AC_SAD.
On the contrary, if when the difference that difference arbitration rules are high frequency absolute error and AC_SAD and low frequency absolute error and DC_SAD is not more than difference threshold value, then multiplexer 53 corresponding block output low frequency absolute error and DC_SAD at present.
This is because when regional area be object move time, high frequency absolute error and AC_SAD are very little, and low frequency absolute error and DC_SAD are also very little, so motion compensation circuit 52 correctly can carry out motion compensation according to low frequency absolute error and DC_SAD.
3rd embodiment
3rd embodiment and the first embodiment main difference part are that the arbitration rules of the 3rd embodiment also comprise difference arbitration rules.Moderator 51 controls multiplexer 53 according to adjacent block arbitration rules, adjacent block weighted value, difference arbitration rules and difference weighted value and optionally exports high frequency absolute error and AC_SAD or low frequency absolute error and DC_SAD.In other words, moderator 51 can control multiplexer 53 according to the combination of multiple arbitration rules and optionally export high frequency absolute error and AC_SAD or low frequency absolute error and DC_SAD, correctly carries out motion compensation for motion compensation circuit 52.
In sum, although the present invention is with preferred embodiment openly as above, so itself and be not used to limit the present invention.Those skilled in the art without departing from the spirit and scope of the present invention, when being used for a variety of modifications and variations.Therefore, protection scope of the present invention is when being as the criterion depending on the appended claims person of defining.
Claims (10)
1. an image processing circuit, comprising:
One block matching unit (BlockMatchingUnit), according to a current block of a current picture and a reference block of a reference picture calculate a high frequency absolute error and (SumofAbsoluteDifference, SAD) and a low frequency absolute error and;
One multiplexer;
One moderator, according to arbitration rules control this multiplexer optionally export this high frequency absolute error and or this low frequency absolute error and, these arbitration rules are relevant to the scene characteristics of this current picture; And
One motion compensation circuit, this high frequency absolute error exported according to this multiplexer and or this low frequency absolute error and carry out a motion compensation, wherein
These arbitration rules comprise difference arbitration rules, these difference arbitration rules be if these difference arbitration rules this high frequency absolute error and with this low frequency absolute error and difference be greater than a difference threshold value time, this multiplexer to should at present block export this high frequency absolute error and, if this high frequency absolute error and with this low frequency absolute error and difference be not more than this difference threshold value time, then this multiplexer to should at present block export this low frequency absolute error and.
2. image processing circuit as claimed in claim 1, wherein this current picture also comprises the adjacent multiple adjacent block of current block with this, these arbitration rules also comprise adjacent block arbitration rules, if these adjacent block arbitration rules for this multiplexer these adjacent block corresponding export this high frequency absolute error and, then this multiplexer to should at present block export this high frequency absolute error and, if this multiplexer these adjacent block corresponding export this low frequency absolute error and, then this multiplexer to should at present block export this low frequency absolute error and, wherein
This moderator according to these adjacent block arbitration rules, an adjacent block weighted value, these difference arbitration rules and a difference weighted value control this multiplexer optionally export this high frequency absolute error and or this low frequency absolute error and.
3. image processing circuit as claimed in claim 1, wherein this block matching unit according to this low frequency absolute error of calculated for pixel values of the pixel value of this current block and this reference block with.
4. image processing circuit as claimed in claim 1, wherein this block matching unit according to this low frequency absolute error and and a direct current difference value calculate this high frequency absolute error and.
5. image processing circuit as claimed in claim 1, wherein this block matching unit according to the average pixel value of the pixel value of this current block, the average pixel value of this current block, the pixel value of this reference block and this reference block calculate this high frequency absolute error and.
6. an image processing method, comprising:
According to a current block of a current picture and a reference block of a reference picture calculate a high frequency absolute error and (SumofAbsoluteDifference, SAD) and a low frequency absolute error and;
According to arbitration rules optionally export this high frequency absolute error and or this low frequency absolute error and, these arbitration rules are relevant to the scene characteristics of this current picture; And
According to this high frequency absolute error and or this low frequency absolute error and carry out a motion compensation, wherein
These arbitration rules comprise difference arbitration rules, these difference arbitration rules be if these difference arbitration rules this high frequency absolute error and with this low frequency absolute error and difference be greater than a difference threshold value time, to should at present block export this high frequency absolute error and, if this high frequency absolute error and with this low frequency absolute error and difference be not more than this difference threshold value time, then to should at present block export this low frequency absolute error and.
7. image processing method as claimed in claim 6, wherein this current picture also comprises the adjacent multiple adjacent block of current block with this, these arbitration rules also comprise adjacent block arbitration rules, if these adjacent block arbitration rules for these adjacent block corresponding export this high frequency absolute error and, then to should at present block export this high frequency absolute error and, if these adjacent block corresponding export this low frequency absolute error and, then to should at present block export this low frequency absolute error with, wherein
According to these arbitration rules optionally export this high frequency absolute error and or this low frequency absolute error and step be according to these adjacent block arbitration rules, an adjacent block weighted value, these difference arbitration rules and a difference weighted value optionally export this high frequency absolute error and or this low frequency absolute error and.
8. image processing method as claimed in claim 6, wherein this calculation procedure according to this low frequency absolute error of calculated for pixel values of the pixel value of this current block and this reference block with.
9. image processing method as claimed in claim 6, wherein this calculation procedure according to this low frequency absolute error and and a direct current difference value calculate this high frequency absolute error and.
10. image processing method as claimed in claim 6, wherein this calculation procedure according to the average pixel value of the pixel value of this current block, the average pixel value of this current block, the pixel value of this reference block and this reference block calculate this high frequency absolute error and.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101025827A (en) * | 2006-02-21 | 2007-08-29 | 华晶科技股份有限公司 | Dynamic image processing method |
| CN101309407A (en) * | 2007-05-14 | 2008-11-19 | 奇景光电股份有限公司 | Movement estimating method |
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| CN101222604B (en) * | 2007-04-04 | 2010-06-09 | 晨星半导体股份有限公司 | Operation mobile estimation value and method for estimating mobile vector of image |
| US20090244388A1 (en) * | 2008-03-27 | 2009-10-01 | Siou-Shen Lin | Motion estimation method and related apparatus for determining target motion vector according to motion of neighboring image blocks |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101025827A (en) * | 2006-02-21 | 2007-08-29 | 华晶科技股份有限公司 | Dynamic image processing method |
| CN101309407A (en) * | 2007-05-14 | 2008-11-19 | 奇景光电股份有限公司 | Movement estimating method |
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