CN102931980A - Digital phase-locking loop based on resonance filtering - Google Patents

Digital phase-locking loop based on resonance filtering Download PDF

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CN102931980A
CN102931980A CN2012104311867A CN201210431186A CN102931980A CN 102931980 A CN102931980 A CN 102931980A CN 2012104311867 A CN2012104311867 A CN 2012104311867A CN 201210431186 A CN201210431186 A CN 201210431186A CN 102931980 A CN102931980 A CN 102931980A
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phase
locked loop
resonance
adder
integrator
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CN102931980B (en
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李阳春
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ZHEJIANG HRV ELECTRIC CO Ltd
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ZHEJIANG RIFENG ELECTRICAL CO Ltd
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Abstract

本发明公开了一种基于谐振滤波的数字锁相环，包括：鉴相器、数字滤波器、全波积分器和正序积分器；数字滤波器包括加法器、减法器、积分控制器、比例控制器和谐振器。本发明数字锁相环相对于基于单同步坐标的数字锁相环，能在三相信号不平衡时有效跟踪出其正序分量；相对于基于双同步坐标的数字锁相环，该锁相环的运算量较小，更适合在实时控制系统中使用。

Figure 201210431186

The invention discloses a digital phase-locked loop based on resonance filtering, comprising: a phase detector, a digital filter, a full-wave integrator and a positive sequence integrator; the digital filter includes an adder, a subtractor, an integral controller, a proportional control devices and resonators. Compared with the digital phase-locked loop based on single synchronous coordinates, the digital phase-locked loop of the present invention can effectively track out its positive sequence component when the three-phase signal is unbalanced; compared with the digital phase-locked loop based on double synchronous coordinates, the phase-locked loop The amount of calculation is small, and it is more suitable for use in real-time control systems.

Figure 201210431186

Description

A kind of digital phase-locked loop based on resonator, filter
Technical field
The invention belongs to the digital lock-in technique field, be specifically related to a kind of digital phase-locked loop based on resonator, filter.
Background technology
Phase-locked loop is a kind of frequency and phase locked technology of utilizing feedback control principle to realize, and its effect is to make the output of the module input signal outside with it keep synchronous on the phase place.When the frequency of input signal or phase generate changed, phase-locked loop can detect this variation, and by voltage controlled oscillator regulation output frequency, until both re-synchronizations.PHASE-LOCKED LOOP PLL TECHNIQUE is used widely in fields such as communication, navigation, Broadcast and TV, Digital Signal Processing.
Phase-locked loop can be divided into analog phase-locked look and digital phase-locked loop, and the advantage of digital phase-locked loop is many comparatively speaking, and stable performance, error are little.As shown in Figure 1, a feedback loop being formed by phase discriminator, loop filter, voltage controlled oscillator and frequency divider of the digital phase-locked loop module of prior art.Phase discriminator is for detection of the phase difference of the feedback signal that goes out the output of reference clock and frequency divider; Loop filter is generally low pass filter, and its effect is the aignal averating that contains ripple with phase discriminator output; Voltage controlled oscillator is a kind of variable-frequency oscillator, and according to the direct current signal control frequency of oscillation of input, the signal part that it provides is as output, and another part outputs to phase discriminator again and carries out the phase bit comparison with the reference clock input by behind the frequency divider frequency division.Constant for holding frequency, require phase difference not change, if phase difference changes, then the voltage of the voltage output end of phase-locked loop changes, and FEEDBACK CONTROL voltage controlled oscillator again is until phase difference recovers, can realize the N frequency multiplication of output signal, reach phase-locked purpose.At present, digital phase-locked loop mainly is divided into based on the digital phase-locked loop of single synchronous coordinate system with based on digital phase-locked loop two classes of two Synchronous Reference Frame Transforms.
Based on the digital phase-locked loop of single synchronous coordinate system, this phase-locked loop is based on the positive sequence component of following the tracks of line voltage and the detection algorithm that proposes, and when the line voltage balance, this phase-locked loop is detection of grid voltage-phase, frequency fast and effeciently.As shown in Figure 2, the principle of this phase-locked loop is: three-phase input voltage obtains u after single dq coordinate transform dAnd u q, for u qClosed-loop control adopt the PI controller to eliminate deviation.Work as u q, can realize that output phase and electric network voltage phase are synchronous at=0 o'clock.Owing to adopt closed-loop control, can obtain good phase-locked performance.This algorithm can be obtained good effect under the condition of three-phase voltage balance, but when imbalance of three-phase voltage, the Phase Tracking effect is relatively poor.
Based on the digital phase-locked loop of two Synchronous Reference Frame Transforms, this phase-locked loop is based on the positive sequence component of following the tracks of line voltage and the detection algorithm that proposes, line voltage balance whether no matter, and this algorithm can both fast detecting goes out phase place, the frequency of line voltage positive sequence component.As shown in Figure 3, the operation principle of this phase-locked loop is: the dq that three-phase voltage signal is carried out respectively under positive sequence, two reference axis of negative phase-sequence changes, and utilize the transformation result under the negative phase-sequence reference axis to eliminate two harmonics that produce when the positive-sequence coordinate axle is changed, thereby suppressed the impact of negative sequence component on phase-locked result.The amount of calculation of this algorithm is quite large, in the system of in real time control of needs, affects the real-time of system's control.
Summary of the invention
For the existing above-mentioned technological deficiency of prior art, the invention provides a kind of digital phase-locked loop based on resonator, filter, when imbalance of three-phase voltage, can effectively follow the tracks of out the phase place of its positive sequence phase place and positive-negative sequence component sum, and operand is less.
A kind of digital phase-locked loop based on resonator, filter comprises: phase discriminator, digital filter, full-wave integrator and positive sequence integrator; Wherein:
Described phase discriminator is used for according to the feedback phase of full-wave integrator output three-phase voltage being carried out dq conversion (synchronously rotating reference frame conversion), obtains d axle component and q axle component;
Described digital filter is used for described q axle component is carried out bandpass filtering, obtains all-wave controlled quentity controlled variable and positive sequence controlled quentity controlled variable;
Described full-wave integrator is used for described all-wave controlled quentity controlled variable is carried out integration, produces feedback phase;
Described positive sequence integrator is used for described positive sequence controlled quentity controlled variable is carried out integration, output positive sequence phase place.
The transfer function of described full-wave integrator and positive sequence integrator is 1/s, and s is laplace operator.
Described digital filter comprises: two adders, a subtracter, an integral controller, a proportional controller and resonators; Wherein: the subtrahend end of subtracter links to each other with phase discriminator and receives q axle component, the minuend termination of subtracter is received given reference component, the output of subtracter and the input of integral controller, the input of the input resonator of proportional controller links to each other, the output of integral controller links to each other with the first input end of adder J1 and the first input end of adder J2, the output of proportional controller links to each other with the second input of adder J1 and the second input of adder J2, the output of resonator links to each other with the 3rd input of adder J1, the four-input terminal of adder J1 and the 3rd input of adder J2 all receive given phase increment, the output of adder J1 links to each other with full-wave integrator and exports the all-wave controlled quentity controlled variable, and the output of adder J2 links to each other with the positive sequence integrator and exports the positive sequence controlled quentity controlled variable.
The transfer function of described resonator is as follows:
K R × 2 ω c s s 2 + 2 ω c s + ω o 2
Wherein, K RBe resonance coefficient, ω oBe resonance frequency, ω cBe resonant bandwidth, s is laplace operator.
The transfer function of described integral controller is K I/ s, K IBe integral coefficient, s is laplace operator.
The transfer function of described proportional controller is K P, K PBe proportionality coefficient.
When imbalance of three-phase voltage, line voltage can be decomposed into positive sequence component, negative sequence component and zero-sequence component.By the principle of coordinate transform as can be known, three-phase imbalance voltage carried out the dq conversion after, zero-sequence component vanishing (it can not impact the work of phase-locked loop), positive sequence component will become direct current signal, negative sequence component will become two frequency multiplication signals.Traditional integral element that adopts based on the digital phase-locked loop of single synchronous coordinate system can't be carried out the indifference tracking to two frequency multiplication signals, therefore there is deviation in the Phase Tracking of unbalance voltage.
The present invention has increased a resonance link on the basis based on single synchronous coordinate system digital phase-locked loop, its resonance frequency just is set to two frequencys multiplication (100Hz), thereby has realized the indifference of two frequency multiplication signals is followed the tracks of, and reaches accurately phase-locked purpose.
So digital phase-locked loop of the present invention with respect to the digital phase-locked loop based on single synchronous coordinate, can effectively be followed the tracks of out its positive sequence component when three-phase signal is uneven; With respect to the digital phase-locked loop based on two synchronous coordinates, the operand of this phase-locked loop is less, is more suitable for using in real-time control system.
Description of drawings
Fig. 1 is the structural representation of conventional digital phase-locked loop.
Fig. 2 is the structural principle schematic diagram based on the digital phase-locked loop of single synchronous coordinate system.
Fig. 3 is the structural principle schematic diagram based on the digital phase-locked loop of two synchronous coordinate systems.
Fig. 4 is the structural principle schematic diagram of digital phase-locked loop of the present invention.
Fig. 5 is for adopting the Phase Tracking oscillogram based on the phase-locked loop of single synchronous coordinate.
Fig. 6 is for adopting the Phase Tracking oscillogram of phase-locked loop of the present invention.
Embodiment
In order more specifically to describe the present invention, below in conjunction with the drawings and the specific embodiments technical scheme of the present invention and relative theory thereof are elaborated.
As shown in Figure 4, a kind of digital phase-locked loop based on resonator, filter comprises: phase discriminator, digital filter, full-wave integrator and positive sequence integrator; Wherein:
The feedback phase θ ' that phase discriminator is used for exporting according to full-wave integrator is to three-phase voltage u a～u cCarry out the dq conversion, obtain d axle component u dWith q axle component u q
Three-phase voltage signal u a～u cCan be expressed as following form:
Wherein: With
Figure BDA00002343573700043
Be respectively positive sequence and negative phase-sequence fundamental signal peak value;
Figure BDA00002343573700044
With Be respectively the starting phase angle of positive sequence and negative phase-sequence fundamental signal.
Can be with three-phase voltage signal u according to following conversion formula a～u cConvert the α axle component u under the α β coordinate system to αWith beta-axis component u β:
Figure BDA00002343573700046
And then according to feedback phase θ ' by following conversion formula, with α axle component u αWith beta-axis component u βConvert the d axle component u under the dq coordinate system to dWith q axle component u q:
u d u q = cos θ ′ sin θ ′ - sin θ ′ cos θ ′ u α u β
Figure BDA00002343573700048
Because our target is to make the θ ' should be approaching as far as possible So can be with the following formula arrangement:
Figure BDA000023435737000410
Wherein:
Figure BDA00002343573700051
u qOutput as phase discriminator.
As can be seen from the above equation, this output u qWith larger two harmonics.
Digital filter is used for q axle component u qCarry out bandpass filtering, obtain all-wave controlled quentity controlled variable and positive sequence controlled quentity controlled variable; Because the output of phase discriminator contains the component of two a large amount of frequencys multiplication, this two harmonic is to be produced by the negative sequence component in the input signal; The existence of this two harmonic has produced certain interference to the positive sequence component of following the tracks of input signal.
So present embodiment utilizes respectively integration, resonance algorithm that DC component and two harmonics are controlled respectively filtering in digital filter.Digital filter comprises two adder J1～J2, a subtracter Z, an integral controller, a proportional controller and a resonator; Wherein: the subtrahend end of subtracter Z links to each other with phase discriminator and receives q axle component u qThe minuend termination of subtracter Z is received given reference component (reference component is 0), the output of subtracter Z and the input of integral controller, the input of the input resonator of proportional controller links to each other, the output of integral controller links to each other with the first input end of adder J1 and the first input end of adder J2, the output of proportional controller links to each other with the second input of adder J1 and the second input of adder J2, the output of resonator links to each other with the 3rd input of adder J1, and the four-input terminal of adder J1 and the 3rd input of adder J2 all receive given phase increment ω f(when sample frequency is 12KHz, phase increment ω f=1.5 °), the output of adder J1 links to each other with full-wave integrator and exports the all-wave controlled quentity controlled variable, and the output of adder J2 links to each other with the positive sequence integrator and exports the positive sequence controlled quentity controlled variable.
The transfer function of resonator is as follows:
K R × 2 ω c s s 2 + 2 ω c s + ω o 2
Wherein, K RBe resonance coefficient, ω oBe resonance frequency, ω cBe resonant bandwidth, s is laplace operator; In the present embodiment, K R=1, ω o=100Hz, ω c=30Hz.
The transfer function of integral controller is K I/ s, K IBe integral coefficient; In the present embodiment, K I=0.3.
The transfer function of proportional controller is K P, K PBe proportionality coefficient; In the present embodiment, K P=1.5.
Full-wave integrator is used for the all-wave controlled quentity controlled variable is carried out integration, produces feedback phase θ '; Its waveform is consistent with the positive-negative sequence component sum of input waveform.
The positive sequence integrator is used for the positive sequence controlled quentity controlled variable is carried out integration, output positive sequence phase theta; Its waveform is consistent with the positive sequence component of input waveform.
In the present embodiment, the transfer function of full-wave integrator and positive sequence integrator is 1/s.
Below follow the tracks of waveform by actual phase present embodiment and the phase-locked loop of tradition based on single synchronous coordinate compared, and it is as follows to input identical three-phase voltage signal:
Figure BDA00002343573700061
Employing is based on the phase-locked loop of single synchronous coordinate, and the tracking waveform of its phase place as shown in Figure 5; Adopt the phase-locked loop of present embodiment, the tracking waveform of its phase place as shown in Figure 6; Can find out by two figure contrasts, the tracking error of the digital phase-locked loop of present embodiment is about 6 degree, and owing to can only follow the tracks of positive sequence component based on the digital phase-locked loop of single synchronous coordinate system, therefore its tracking error mean value will level off to 60 degree, its error amplitude is about 40 degree, and the tracking accuracy of the digital phase-locked loop of present embodiment that hence one can see that is higher than the digital phase-locked loop based on single synchronous coordinate system far away.
When imbalance of three-phase voltage, line voltage can be decomposed into positive sequence component, negative sequence component and zero-sequence component.By the principle of coordinate transform as can be known, three-phase imbalance voltage carried out the dq conversion after, zero-sequence component vanishing (it can not impact the work of phase-locked loop), positive sequence component will become direct current signal, negative sequence component will become two frequency multiplication signals.Traditional integral element that adopts based on the digital phase-locked loop of single synchronous coordinate system can't be carried out the indifference tracking to two frequency multiplication signals, therefore there is deviation in the Phase Tracking of unbalance voltage.
Present embodiment has increased a resonance link on the basis based on single synchronous coordinate system digital phase-locked loop, its resonance frequency just is set to two frequencys multiplication (100Hz), thereby has realized the indifference of two frequency multiplication signals is followed the tracks of, and reaches accurately phase-locked purpose.
So the present embodiment digital phase-locked loop with respect to the digital phase-locked loop based on single synchronous coordinate, can effectively be followed the tracks of out its positive sequence component when three-phase signal is uneven; With respect to the digital phase-locked loop based on two synchronous coordinates, the operand of this phase-locked loop is less, is more suitable for using in real-time control system.
The description of present embodiment is can understand and apply the invention for ease of those skilled in the art.The person skilled in the art obviously can easily make various modifications to these embodiment, and needn't pass through performing creative labour being applied in the General Principle of this explanation among other embodiment.Therefore, the invention is not restricted to the embodiment here, those skilled in the art should be within protection scope of the present invention for improvement and modification that the present invention makes according to announcement of the present invention.

Claims (9)

1.一种基于谐振滤波的数字锁相环，其特征在于，包括：鉴相器、数字滤波器、全波积分器和正序积分器；其中：1. A digital phase-locked loop based on resonance filtering, is characterized in that, comprises: phase detector, digital filter, full-wave integrator and positive sequence integrator; Wherein: 所述的鉴相器用于根据全波积分器输出的反馈相位对三相电压进行dq变换，得到d轴分量和q轴分量；The phase detector is used to perform dq transformation on the three-phase voltage according to the feedback phase output by the full-wave integrator to obtain a d-axis component and a q-axis component; 所述的数字滤波器用于对所述的q轴分量进行带通滤波，得到全波控制量和正序控制量；The digital filter is used to perform band-pass filtering on the q-axis component to obtain a full-wave control quantity and a positive-sequence control quantity; 所述的全波积分器用于对所述的全波控制量进行积分，产生反馈相位；The full-wave integrator is used to integrate the full-wave control quantity to generate a feedback phase; 所述的正序积分器用于对所述的正序控制量进行积分，输出正序相位。The positive sequence integrator is used to integrate the positive sequence control quantity and output the positive sequence phase. 2.根据权利要求1所述的基于谐振滤波的数字锁相环，其特征在于：所述的全波积分器和正序积分器的传递函数均为1/s，s为拉氏算子。2. The digital phase-locked loop based on resonance filtering according to claim 1, characterized in that: the transfer functions of the full-wave integrator and the positive sequence integrator are 1/s, and s is a Lagrangian operator. 3.根据权利要求1所述的基于谐振滤波的数字锁相环，其特征在于：所述的数字滤波器包括：两个加法器、一减法器、一积分控制器、一比例控制器和一谐振器；其中：减法器的减数端与鉴相器相连接收q轴分量，减法器的被减数端接收给定的参考分量，减法器的输出端与积分控制器的输入端、比例控制器的输入端和谐振器的输入端相连，积分控制器的输出端与加法器J1的第一输入端和加法器J2的第一输入端相连，比例控制器的输出端与加法器J1的第二输入端和加法器J2的第二输入端相连，谐振器的输出端与加法器J1的第三输入端相连，加法器J1的第四输入端和加法器J2的第三输入端均接收给定的相位增量，加法器J1的输出端与全波积分器相连且输出全波控制量，加法器J2的输出端与正序积分器相连且输出正序控制量。3. the digital phase-locked loop based on resonance filter according to claim 1, is characterized in that: described digital filter comprises: two adders, a subtractor, an integral controller, a proportional controller and a Resonator; wherein: the subtrahend end of the subtractor is connected to the phase detector to receive the q-axis component, the minuend end of the subtractor receives a given reference component, the output end of the subtractor is connected to the input end of the integral controller, and the proportional control The input end of the resonator is connected with the input end of the resonator, the output end of the integral controller is connected with the first input end of the adder J1 and the first input end of the adder J2, and the output end of the proportional controller is connected with the first input end of the adder J1. The two input ends are connected with the second input end of the adder J2, the output end of the resonator is connected with the third input end of the adder J1, the fourth input end of the adder J1 and the third input end of the adder J2 are all received to The output terminal of the adder J1 is connected with the full-wave integrator and outputs the full-wave control quantity, and the output terminal of the adder J2 is connected with the positive-sequence integrator and outputs the positive-sequence control quantity. 4.根据权利要求3所述的基于谐振滤波的数字锁相环，其特征在于：所述的谐振器的传递函数如下：4. the digital phase-locked loop based on resonance filter according to claim 3, is characterized in that: the transfer function of described resonator is as follows: KK RR ×× 22 ωω cc sthe s sthe s 22 ++ 22 ωω cc sthe s ++ ωω oo 22 其中，KR为谐振系数，ωo为谐振频率，ωc为谐振带宽，s为拉氏算子。Among them, K R is the resonance coefficient, ω o is the resonance frequency, ω c is the resonance bandwidth, and s is the Laplace operator. 5.根据权利要求3所述的基于谐振滤波的数字锁相环，其特征在于：所述的积分控制器的传递函数为KI/s，KI为积分系数，s为拉氏算子。5. The digital phase-locked loop based on resonance filtering according to claim 3, characterized in that: the transfer function of the integral controller is K I /s, K I is an integral coefficient, and s is a Lagrangian operator. 6.根据权利要求3所述的基于谐振滤波的数字锁相环，其特征在于：所述的比例控制器的传递函数为KP，KP为比例系数。6. The digital phase-locked loop based on resonance filtering according to claim 3, characterized in that: the transfer function of the proportional controller is K P , and K P is a proportional coefficient. 7.根据权利要求4所述的基于谐振滤波的数字锁相环，其特征在于：所述的谐振系数取1，所述的谐振频率取100Hz，所述的谐振带宽取30Hz。7 . The digital phase-locked loop based on resonance filtering according to claim 4 , wherein the resonance coefficient is 1, the resonance frequency is 100 Hz, and the resonance bandwidth is 30 Hz. 8.根据权利要求5所述的基于谐振滤波的数字锁相环，其特征在于：所述的积分系数取0.3。8. The digital phase-locked loop based on resonance filtering according to claim 5, characterized in that: the integral coefficient is 0.3. 9.根据权利要求6所述的基于谐振滤波的数字锁相环，其特征在于：所述的比例系数取1.5。9. The digital phase-locked loop based on resonance filtering according to claim 6, characterized in that: the proportional coefficient is 1.5.
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CN113810047A (en) * 2021-11-17 2021-12-17 浙江日风电气股份有限公司 Signal phase locking method and system
CN113810047B (en) * 2021-11-17 2022-03-01 浙江日风电气股份有限公司 Signal phase locking method and system
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