CN102916778B - A kind of airborne equipment signal processing method and system - Google Patents
A kind of airborne equipment signal processing method and system Download PDFInfo
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Abstract
The present invention relates to air communications technical field, the invention discloses a kind of airborne equipment signal processing method, it specifically comprises following steps: when sending signal: adopt interface chip to receive external input signal, flag bit according to input signal judges signal type, and signal is inputted central processing computer, central processing computer selects corresponding central processing unit subregion to process input signal, signal after process sends to FPGA to carry out corresponding coding, carries out message transmission after having encoded; When Received signal strength: FPGA receives external signal, and select corresponding translator to carry out decoding according to the flag bit of external signal, the processor subregion inputing to central processing computer after decoding completes corresponding processes external signal, process the rear type according to signal and carried out showing or passing through ARINC? 429 interface chips export.The invention also discloses the system of above-mentioned processing method.Make the function completing multiple system in a system, reduce hardware cost.
Description
Technical field
The present invention relates to airborne equipment signal processing technology field, particularly relate to a kind of airborne equipment signal processing method and system.
Background technology
In order to ensure flight safety, aircraft needs receive or send multiple signal in the process of navigation.Such as, receive in CAS and send warning information, answering machine generates answer signal according to the identity of aircraft and positional information, is periodically automatically sent by additional data needed for the position of aircraft and the aircraft of other keys.In prior art, all adopt different systems to complete above-mentioned various function, as CAS mostly is ACAS or TCAS, in these two systems, airborne equipment needs the signal that reception periphery aircraft sends, and calculates the situation around aircraft accordingly.Answering machine (Transponder:XPDR) needs that the information such as answering machine coding and pressure altitude are weaved into transponder pulse and beams back.Additional data needed for the position of aircraft and the aircraft of other keys is periodically sent automatically and then adopts Automatic dependent surveillance broadcast system to realize.
ACAS(AirborneCollisionAvoidanceSystem) airborne collision avoidance system is called, TCAS(TrafficAlertandCollisionAvoidanceSystem) air traffic alarm and CAS is called, the former title is defined by European navigation safety office (EUROCONTROL), the latter is defined by US Federal Aviation Administration (FAA), and the system implication of two kinds of titles, constitute and function are all consistent.Receive the signal that periphery aircraft sends, the situation around display aircraft, and provide phonic warning when needed, help driver with suitable maneuver mode escape from danger simultaneously, help avoid the generation of catastrophic failure.CAS is based on the operation principle of navigation management secondary radar, by interrogator transmitter, region, four, front, rear, left and right is carried out to aerial target aircraft and carry out scanning inquiry, near the aircraft (target machine) of answering machine (S mode/ATCRBS answering machine) is housed, will response be made.Airborne equipment receives after answer signal, calculate relative distance, highly, orientation, experience time and rising or falling speed, when there is potential conflict, providing warning message to driver and disposing suggestion, thus avoiding the generation with other plane collision danger of spatial domain.
Answering machine (Transponder, XPDR, the compound word that English is launched-responded are abbreviated as XPDR often) is a kind of air traffic control secondary radar system acceptance transmitter, and it can be replied the inquiry of Mode A, C and Mode S.XPDR carries out response one group acknowledge information according to the ground radar received or aerospace plane inquiry message type.The response message obtained from XPDR can aloft show traffic control system corresponding aircraft identity (code), highly, positional information.The S mode Data-Link of XPDR may be used for two frame equipment ACAS interplanes and carries out transmission ACAS relevant information.
ADS-B(ADS-B:AutomaticDependentSurveillance-Broadcast) Automatic dependent surveillance broadcast is called, be widely used as the aerial anti-collision technology of another kind, ADS-B with air-ground/absolutely empty Data-Link of advanced person for means of communication, the information produced with the navigation system of advanced person and other airborne equipments is for data source, and needed for the four-dimensional position of aircraft of on-board navigator and navigation system being derived and the aircraft of other keys, additional data periodically sends automatically.It is a kind of end-to-end addressing formula bi-directional data chain, provides the aircraft of ADS information and wishes to receive between ADS ground station according to mutually arranging work.ADS-B technology by externally sending the state parameter of self, and receives the broadcast message of other aircrafts, reaches the mutual perception of interplane, and then realizes understanding periphery spatial domain traffic comprehensively, in detail, ensures Flight Safety.
ACAS operating frequency, for launching 1030MHZ, receives 1090MHZ; XPDR operating frequency launches 1090MHZ, receives 1030MHZ; ADS-B operating frequency is 1090MHZ, comprises ADS-BIN and ADS-BOUT, and it also can realize ADS-BIN by ACAS receiver and receive, and realizes ADS-BOUT broadcast by XPDR.
Airborne ACAS, XPDR and ADS-B system information process composition frame chart is separated in prior art as shown in Figure 1.ACAS, XPDR and ADS-B's is ARINC429 with external interface information type as can be seen from Figure 1, and transmitting-receiving message information coding and decoding are all adopt fpga chip to complete; Each functional software is all operate on the CPU of similar PowerPC or ARM, and three systems take a set of information process unit separately.In prior art, airborne ACAS, XPDR and ADS-B system occupies a set of information process unit separately, respective interface message process, the transmitting-receiving coding of message information, decoding process and functional software process are used for, cause the waste of software and hardware resources like this, and cause that system weight is heavy, volume is large, power consumption is high, cost is high.
Summary of the invention
The object of the invention is to need to take separately for the multiple mobile system of prior art the technical problem that a set of signal processing unit causes hardware resource waste, disclose a kind of airborne equipment signal processing method and system.
Object of the present invention is realized by following technical proposals:
A kind of airborne equipment signal processing method, it specifically comprises following steps:
When sending signal: adopt ARINC429 interface chip to receive the input signal of outside ARINC429 bus, flag bit according to input signal judges signal type, and signal is inputted central processing computer, central processing computer selects corresponding central processing unit subregion to process input signal according to signal type, signal after process sends to FPGA to carry out corresponding coding, carries out message transmission after having encoded;
When Received signal strength: FPGA receives external signal, and select corresponding translator to carry out decoding according to the flag bit of external signal, the processor subregion inputing to central processing computer after decoding completes corresponding processes external signal, has processed the rear type according to signal and has carried out showing or being exported by ARINC429 interface chip.
Further, above-mentioned signal type comprises ACAS, XPDR and ADS-B signal, central processing unit comprises three subregions, be respectively ACAS subregion, XPDR subregion and ADS-B subregion, FPGA comprises the coding and decoding program of corresponding three types signal, three subregions alignment processing ACAS, XPDR and ADS-B signal respectively of above-mentioned central processing unit, the coding and decoding program of three kinds of signals coding and decoding three kinds of signals respectively in FPGA.
Further, above-mentioned central processing computer comprises central processing unit, storage chip, clock and reset circuit, network interface and serial ports, and described storage chip, clock and reset circuit, network interface and serial ports and central processing unit carry out two-way communication.
Further, above-mentioned central processing unit also comprises I/O communication function software district, and described I/O communication function software district is used for the control of central processing unit and external device communication.
Further, in the subregion of above-mentioned each central processing unit, comprise partition resource manager, according to type and the strategy configuration of subregion, priority preemption scheduling is carried out to the task of subregion inside.Improve the efficiency of central processing unit process.
The invention also discloses a kind of airborne equipment signal processing system, described system specifically comprises: signal transmitting module and signal receiving module;
Described signal transmitting module adopts ARINC429 interface chip to receive the input signal of outside ARINC429 bus, flag bit according to input signal judges signal type, and signal is inputted central processing computer, central processing computer selects corresponding central processing unit subregion to process input signal according to signal type, signal after process sends to FPGA to carry out corresponding coding, carries out message transmission after having encoded;
Described signal receiving module adopts FPGA to receive external signal, and select corresponding translator to carry out decoding according to the flag bit of external signal, the processor subregion inputing to central processing computer after decoding completes corresponding processes external signal, has processed the rear type according to signal and has carried out showing or being exported by ARINC429 interface chip.
Further, above-mentioned signal type comprises ACAS, XPDR and ADS-B signal, central processing unit comprises three subregions, be respectively ACAS subregion, XPDR subregion and ADS-B subregion, FPGA comprises the coding and decoding program of corresponding three types signal, three subregions alignment processing ACAS, XPDR and ADS-B signal respectively of above-mentioned central processing unit, the coding and decoding program of three kinds of signals coding and decoding three kinds of signals respectively in FPGA.
Further, above-mentioned central processing computer comprises central processing unit, storage chip, clock and reset circuit, network interface and serial ports, and described storage chip, clock and reset circuit, network interface and serial ports and central processing unit carry out two-way communication.
Further, above-mentioned central processing unit also comprises I/O communication function software district, and described I/O communication function software district is used for the control of central processing unit and external device communication.
Further, in the subregion of above-mentioned each central processing unit, comprise partition resource manager, according to type and the strategy configuration of subregion, priority preemption scheduling is carried out to the task of subregion inside.Improve the efficiency of central processing unit process.
Beneficial effect of the present invention: distribute different regions and complete different functions in same central processing unit, simultaneously at built-in three different coding, the translators of same FPGA, only need a central processing unit, FPGA just can realize the function completed with first three cover hardware, not only effectively reduce the weight of system, volume, power consumption and cost, and meet the development trend of avlomcs system integration modularization (IMA), improve the reliability and stability of system; Meanwhile, this method for designing is easily implemented in engineering, can monitor promotion and application on anticollision gear at the novel airborne of China's development in future.
Accompanying drawing explanation
Fig. 1 is separated airborne ACAS, XPDR and ADS-B system information process composition frame chart in prior art.
Fig. 2 is ACAS, XPDR and ADS-B information processing Integrated design composition frame chart of the present invention.
Fig. 3 is ACAS, XPDR and ADS-B functional software of the present invention Integrated design software architecture figure on central processing unit.
Fig. 4 is that ACAS, XPDR and ADS-B of the present invention receive and dispatch message coding, decoding Integrated design block diagram in FPGA.
Embodiment
Below in conjunction with Figure of description, describe the specific embodiment of the present invention in detail.
The invention discloses a kind of airborne equipment signal processing method, it specifically comprises following steps:
When sending signal: adopt ARINC429 interface chip to receive the input signal of outside ARINC429 bus, flag bit according to input signal judges signal type, and signal is inputted central processing computer, central processing computer selects corresponding central processing unit subregion to process input signal according to signal type, signal after process sends to FPGA to carry out corresponding coding, carries out message transmission after having encoded;
When Received signal strength: FPGA receives external signal, and select corresponding translator to carry out decoding according to the flag bit of external signal, the processor subregion inputing to central processing computer after decoding completes corresponding processes external signal, has processed the rear type according to signal and has carried out showing or being exported by ARINC429 interface chip.
Adopt said method, in same central processing unit, distribute different regions complete different functions, simultaneously at built-in three different coding, the translators of same FPGA, only need a central processing unit, FPGA just can realize the function completed with first three cover hardware, not only effectively reduce the weight of system, volume, power consumption and cost, and meet the development trend of avlomcs system integration modularization (IMA), improve the reliability and stability of system; Meanwhile, this method for designing is easily implemented in engineering, can monitor promotion and application on anticollision gear at the novel airborne of China's development in future.And in concrete each independent system, as the processing mode of CPU that adopts in ACAS and the coding and decoding mode of FPGA belong to standard mode of the prior art, do not repeat them here the function of its operation principle and realization.
Further, above-mentioned signal type comprises ACAS, XPDR and ADS-B signal, central processing unit comprises three subregions, be respectively ACAS subregion, XPDR subregion and ADS-B subregion, FPGA comprises the coding and decoding program of corresponding three types signal, three subregions alignment processing ACAS, XPDR and ADS-B signal respectively of above-mentioned central processing unit, the coding and decoding program of three kinds of signals coding and decoding three kinds of signals respectively in FPGA.Realized the signal transacting of three systems by a set of hardware system, significantly reduce cost.
Further, above-mentioned central processing computer comprises central processing unit, storage chip, clock and reset circuit, network interface and serial ports, and described storage chip, clock and reset circuit, network interface and serial ports and central processing unit carry out two-way communication.By the data that storage chip storage central processing unit needs data to be processed and process to complete, clock and reset circuit control the processing time of each subregion of central processing unit, and network interface and serial ports are used for communicating with other external equipments.Adopt above-mentioned clock and reset circuit to the timesharing multidomain treat-ment of processor subregion, realize the process that same central processing unit completes multi-signal better.
Further, above-mentioned central processing unit also comprises I/O communication function software district, and described I/O communication function software district is used for the control of central processing unit and external device communication.By increasing the subregion of an I/O communication function software, be used for realizing the unified management of central processing unit and peripheral communication, which passage is such as selected to communicate, that subregion is selected to process, select which coding and decoding program to carry out work, and then improve the reliability of system cloud gray model.Central processing unit can adopt the operating system meeting ARINCAE653 standard, it realizes the Integrated design of multiple functional software by the pattern of subregion, subregion is the execution environment of functional task, is an execution container, is also the thread of safety-critical kernel.And in each subregion, there is a partition resource manager similar to operation system function, according to type and the strategy configuration of subregion, can priority preemption scheduling be carried out to the task of subregion inside.ACAS, XPDR and ADS-B functional software adopts and meets ARINC653 standard operation system and carry out the software architecture of Integrated design as shown in Figure 3 on CPU.In figure 3, ACAS, XPDR and ADS-B functional software all occupies a subregion, separate operation between them, its functional software method for designing with occupy alone a CPU and run identical.Meanwhile, increase an I/O communication function software partition when this CPU Integrated Simulation designs, be used for realizing the unified management of CPU and peripheral communication, and then improve the reliability of system cloud gray model.
Further, in the subregion of described each central processing unit, comprise partition resource manager, according to type and the strategy configuration of subregion, priority preemption scheduling is carried out to the task of subregion inside.Improve the efficiency of central processing unit process.
Coding and decoding Integrated design: coding, the decoding of former ACAS, XPDR and ADS-B system transmitting-receiving message all occupy a FPGA and designs, after adopting method of the present invention, three realizes its respective transmitting-receiving message coding, decoding process in a FPGA.ACAS, XPDR and ADS-B system transmitting-receiving message coding, in FPGA, Integrated design block diagram is as shown in Figure 4 in decoding process.In the diagram, coding work comprises A, C, S mode challenge and reply Signal coding and ADS-BOUT information coding; Work decoding comprises A, C, the decoding of S mode answer signal, the interrupted oscillation signal interpretation of S mode answering machine and ADS-BIN and expands interrupted oscillation signal interpretation.
Interface communication designs: former ACAS, XPDR and ADS-B system has and outside ARINC429 interface communication, and it is substantially identical with PERCOM peripheral communication content.After adopting the present invention, complete the communication with outside by an ARINC429 interface chip.The Control on Communication such as channel selecting, traffic rate, parity check for ARINC429 interface chip can be controlled by CPU online programming.
The invention also discloses a kind of airborne equipment signal processing system, it specifically comprises: signal transmitting module and signal receiving module;
Described signal transmitting module adopts ARINC429 interface chip to receive the input signal of outside ARINC429 bus, flag bit according to input signal judges signal type, and signal is inputted central processing computer, central processing computer selects corresponding central processing unit subregion to process input signal according to signal type, signal after process sends to FPGA to carry out corresponding coding, carries out message transmission after having encoded;
Described signal receiving module adopts FPGA to receive external signal, and select corresponding translator to carry out decoding according to the flag bit of external signal, the processor subregion inputing to central processing computer after decoding completes corresponding processes external signal, has processed the rear type according to signal and has carried out showing or being exported by ARINC429 interface chip.
Adopt said system, in same central processing unit, distribute different regions complete different functions, simultaneously at built-in three different coding, the translators of same FPGA, only need a central processing unit, FPGA just can realize the function completed with first three cover hardware, not only effectively reduce the weight of system, volume, power consumption and cost, and meet the development trend of avlomcs system integration modularization (IMA), improve the reliability and stability of system; Meanwhile, this system is easily implemented in engineering, can monitor promotion and application on anticollision gear at the novel airborne of China's development in future.And in concrete each independent system, as the processing mode of CPU that adopts in ACAS and the coding and decoding mode of FPGA belong to standard mode of the prior art, do not repeat them here the function of its operation principle and realization.
Further, above-mentioned signal type comprises ACAS, XPDR and ADS-B signal, central processing unit comprises three subregions, be respectively ACAS subregion, XPDR subregion and ADS-B subregion, FPGA comprises the coding and decoding program of corresponding three types signal, three subregions alignment processing ACAS, XPDR and ADS-B signal respectively of above-mentioned central processing unit, the coding and decoding program of three kinds of signals coding and decoding three kinds of signals respectively in FPGA.Realized the signal transacting of three systems by a set of hardware system, significantly reduce cost.
Further, above-mentioned central processing computer comprises central processing unit, storage chip, clock and reset circuit, network interface and serial ports, and described storage chip, clock and reset circuit, network interface and serial ports and central processing unit carry out two-way communication.By the data that storage chip storage central processing unit needs data to be processed and process to complete, clock and reset circuit control the processing time of each subregion of central processing unit, and network interface and serial ports are used for communicating with other external equipments.Adopt above-mentioned clock and reset circuit to the timesharing multidomain treat-ment of processor subregion, realize the process that same central processing unit completes multi-signal better.
Further, above-mentioned central processing unit also comprises I/O communication function software district, and described I/O communication function software district is used for the control of central processing unit and external device communication.By increasing the subregion of an I/O communication function software, be used for realizing the unified management of central processing unit and peripheral communication, which passage is such as selected to communicate, that subregion is selected to process, select which coding and decoding program to carry out work, and then improve the reliability of system cloud gray model.Central processing unit can adopt the operating system meeting ARINCAE653 standard, it realizes the Integrated design of multiple functional software by the pattern of subregion, subregion is the execution environment of functional task, is an execution container, is also the thread of safety-critical kernel.And in each subregion, there is a partition resource manager similar to operation system function, according to type and the strategy configuration of subregion, can priority preemption scheduling be carried out to the task of subregion inside.ACAS, XPDR and ADS-B functional software adopts and meets ARINC653 standard operation system and carry out the software architecture of Integrated design as shown in Figure 3 on CPU.In figure 3, ACAS, XPDR and ADS-B functional software all occupies a subregion, separate operation between them, its functional software method for designing with occupy alone a CPU and run identical.Meanwhile, increase an I/O communication function software partition when this CPU Integrated Simulation designs, be used for realizing the unified management of CPU and peripheral communication, and then improve the reliability of system cloud gray model.
Further, in the subregion of described each central processing unit, comprise partition resource manager, according to type and the strategy configuration of subregion, priority preemption scheduling is carried out to the task of subregion inside.Improve the efficiency of central processing unit process.
Coding and decoding Integrated design: coding, the decoding of former ACAS, XPDR and ADS-B system transmitting-receiving message all occupy a FPGA and designs, after adopting system of the present invention, three realizes its respective transmitting-receiving message coding, decoding process in a FPGA.ACAS, XPDR and ADS-B system transmitting-receiving message coding, in FPGA, Integrated design block diagram is as shown in Figure 4 in decoding process.In the diagram, coding work comprises A, C, S mode challenge and reply Signal coding and ADS-BOUT information coding; Work decoding comprises A, C, the decoding of S mode answer signal, the interrupted oscillation signal interpretation of S mode answering machine and ADS-BIN and expands interrupted oscillation signal interpretation.
Interface communication designs: former ACAS, XPDR and ADS-B system has and outside ARINC429 interface communication, and it is substantially identical with PERCOM peripheral communication content.After adopting the present invention, complete the communication with outside by an ARINC429 interface chip.The Control on Communication such as channel selecting, traffic rate, parity check for ARINC429 interface chip can be controlled by CPU online programming.
Coefficient given in the above embodiments and parameter; be available to those skilled in the art to realize or use of the present invention; the present invention does not limit and only gets aforementioned disclosed numerical value; without departing from the present invention in the case of the inventive idea; those skilled in the art can make various modifications or adjustment to above-described embodiment; thus protection scope of the present invention not limit by above-described embodiment, and should be the maximum magnitude meeting the inventive features that claims are mentioned.
Claims (7)
1. an airborne equipment signal processing method, it specifically comprises following steps:
When sending signal: adopt ARINC429 interface chip to receive the input signal of outside ARINC429 bus, flag bit according to input signal judges signal type, and signal is inputted central processing computer, central processing computer selects corresponding central processing unit subregion to process input signal according to signal type, signal after process sends to FPGA to carry out corresponding coding, carries out message transmission after having encoded;
When Received signal strength: FPGA receives external signal, and select corresponding translator to carry out decoding according to the flag bit of external signal, the processor subregion inputing to central processing computer after decoding completes corresponding processes external signal, has processed the rear type according to signal and has carried out showing or being exported by ARINC429 interface chip;
Comprise partition resource manager in the subregion of each central processing unit, according to type and the strategy configuration of subregion, priority preemption scheduling is carried out to the task of subregion inside; Described signal type comprises ACAS, XPDR and ADS-B signal, central processing unit comprises three subregions, be respectively ACAS subregion, XPDR subregion and ADS-B subregion, FPGA comprises the coding and decoding program of corresponding three types signal, three subregions alignment processing ACAS, XPDR and ADS-B signal respectively of above-mentioned central processing unit, the coding and decoding program of three kinds of signals coding and decoding three kinds of signals respectively in FPGA.
2. airborne equipment signal processing method as claimed in claim 1, it is characterized in that described central processing computer comprises central processing unit, storage chip, clock and reset circuit, network interface and serial ports, described storage chip, clock and reset circuit, network interface and serial ports and central processing unit carry out two-way communication.
3. airborne equipment signal processing method as claimed in claim 2, is characterized in that described central processing unit also comprises I/O communication function software district, and described I/O communication function software district is used for the control of central processing unit and external device communication.
4. an airborne equipment signal processing system, is characterized in that described system specifically comprises: signal transmitting module and signal receiving module;
Described signal transmitting module adopts ARINC429 interface chip to receive the input signal of outside ARINC429 bus, flag bit according to input signal judges signal type, and signal is inputted central processing computer, central processing computer selects corresponding central processing unit subregion to process input signal according to signal type, signal after process sends to FPGA to carry out corresponding coding, carries out message transmission after having encoded;
Described signal receiving module adopts FPGA to receive external signal, and select corresponding translator to carry out decoding according to the flag bit of external signal, the processor subregion inputing to central processing computer after decoding completes corresponding processes external signal, has processed the rear type according to signal and has carried out showing or being exported by ARINC429 interface chip; Described signal type comprises ACAS, XPDR and ADS-B signal, central processing unit comprises three subregions, be respectively ACAS subregion, XPDR subregion and ADS-B subregion, FPGA comprises the coding and decoding program of corresponding three types signal, three subregions alignment processing ACAS, XPDR and ADS-B signal respectively of above-mentioned central processing unit, the coding and decoding program of three kinds of signals coding and decoding three kinds of signals respectively in FPGA.
5. airborne equipment signal processing system as claimed in claim 4, it is characterized in that described central processing computer comprises central processing unit, storage chip, clock and reset circuit, network interface and serial ports, described storage chip, clock and reset circuit, network interface and serial ports and central processing unit carry out two-way communication.
6. airborne equipment signal processing system as claimed in claim 5, is characterized in that described central processing unit also comprises I/O communication function software district, and described I/O communication function software district is used for the control of central processing unit and external device communication.
7. airborne equipment signal processing system as claimed in claim 6, comprises partition resource manager in the subregion that it is characterized in that each central processing unit, according to type and the strategy configuration of subregion, carries out priority preemption scheduling to the task of subregion inside.
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| CN104267395A (en) * | 2014-09-29 | 2015-01-07 | 陕西宝成航空仪表有限责任公司 | Method for achieving C-mode low-voice calling of traffic collision avoidance system |
| CN104730497B (en) * | 2015-03-26 | 2017-02-01 | 四川九洲空管科技有限责任公司 | Implementation method for limiting electromagnetic interference caused by system interrogation |
| CN105070108B (en) * | 2015-07-16 | 2017-07-07 | 四川九洲空管科技有限责任公司 | Airborne collision avoidance system, ACAS transmitting-receiving main frames receive loop self-checking system and method |
| CN105070106B (en) * | 2015-07-16 | 2017-08-25 | 四川九洲空管科技有限责任公司 | Airborne collision avoidance system, ACAS transmitting-receiving main frame self-checking systems and method |
| CN105553609B (en) * | 2015-12-09 | 2019-03-05 | 中国民用航空飞行学院 | A kind of information processing method and equipment of airborne equipment |
| CN106773945A (en) * | 2016-12-12 | 2017-05-31 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of framework of airborne standard interface processing module |
| CN107809643B (en) * | 2017-11-13 | 2020-11-20 | 苏州浪潮智能科技有限公司 | Image decoding method, device and medium |
| CN109636134B (en) * | 2018-11-21 | 2023-06-13 | 中国航空无线电电子研究所 | Resource management architecture for distributed avionics system |
| CN110703184A (en) * | 2019-10-22 | 2020-01-17 | 四川九洲空管科技有限责任公司 | Full-digital Doppler very-high-frequency omnidirectional beacon system |
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