CN102904715A - Parallel pseudorandom bit generator based on coupling chaotic mapping system - Google Patents

Parallel pseudorandom bit generator based on coupling chaotic mapping system Download PDF

Info

Publication number
CN102904715A
CN102904715A CN2012103648411A CN201210364841A CN102904715A CN 102904715 A CN102904715 A CN 102904715A CN 2012103648411 A CN2012103648411 A CN 2012103648411A CN 201210364841 A CN201210364841 A CN 201210364841A CN 102904715 A CN102904715 A CN 102904715A
Authority
CN
China
Prior art keywords
mapping system
chaotic mapping
output
coupled
initial value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2012103648411A
Other languages
Chinese (zh)
Other versions
CN102904715B (en
Inventor
王世红
梁仁夫
周琥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing University of Posts and Telecommunications
Original Assignee
Beijing University of Posts and Telecommunications
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing University of Posts and Telecommunications filed Critical Beijing University of Posts and Telecommunications
Priority to CN201210364841.1A priority Critical patent/CN102904715B/en
Publication of CN102904715A publication Critical patent/CN102904715A/en
Application granted granted Critical
Publication of CN102904715B publication Critical patent/CN102904715B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Complex Calculations (AREA)

Abstract

The invention aims at designing a pseudorandom bit generator which is efficient and can be used for hardware implementation and parallel operation and particularly relates to a parallel pseudorandom bit generator based on a coupling chaotic mapping system. According to the parallel pseudorandom bit generator, by means of an initialization module, initial values (also called seeds) of a random bit generator are subjected to nonlinear transformation expansion to generate initial values of the coupling chaotic mapping system; the initial values of the coupling chaotic mapping system, which are generated by expanding, are input into the coupling chaotic mapping system, and multi-path chaotic sequences are parallelly output by means of actions of the coupling chaotic mapping system; and the output chaotic sequences are processed by an output module, and pseudorandom bit sequences which meet an NIST SP800-22 revise testing standard are parallelly output.

Description

Parallel Pseudo-random bit generator based on coupled chaotic mapping system
Technical field
The present invention relates to field of information security technology, be based on the parallel Pseudo-random bit generator of coupled chaotic mapping system.
Technical background
Pseudo random number has a wide range of applications in Monte Carlo Calculation, text encryption, image encryption and video-encryption and the key in cipher protocol, initializing variable, so the research of randomizer has consequence in Statistical Physics and modern password.The sequence that pseudorandom number generator produces requires to have large as far as possible cycle and good randomness.
Because chaotic orbit is to initial value and sensitiveness of parameters, and the pseudo-randomness of chaotic signal, in recent years, many researcher's application of chaos dynamics make up pseudorandom number generator.From existing achievement in research, a more competitive class is take the chaos pseudo random number generator of space-time coupling chaotic mapping grid as the basis.Compare with low-dimensional system, Spatiotemporal Chaotic Systems has a plurality of positive Liapunov exponents, has increased complexity and the cycle of system.Therefore chaotic computing is based on real number field, and the design of existing randomizer based on chaos is applicable to software operating environment mostly, is used for moving to that to exist the operation cost on the hardware platform high, the shortcoming that operational efficiency is low.
The present invention is special completely newly, based on the parallel Pseudo-random bit generator of chaos coupling mapping, its main feature is to adopt the one dimension coupled chaotic mapping system, by selecting effective parameter, guaranteed the space-time chaos complexity of system, also not only make the sequence of output have good statistical property, and be applicable to hardware platform by limited, easily shifting function; Can be used for simultaneously the parallel output random bit sequence.
Summary of the invention
The objective of the invention is design can be used for the hardware realization, is applicable to parallel work-flow, high efficiency Pseudo-random bit generator.Based on the parallel Pseudo-random bit generator of coupled chaotic mapping system, its process feature is following treatment step:
A1) by initialization module, the initial value of Pseudo-random bit generator (being also referred to as seed) is produced the initial value of coupled chaotic mapping system by the nonlinear transformation expansion;
A2) the initial value input coupled chaotic mapping system of the coupled chaotic mapping system of expansion generation, through the effect of coupled chaotic mapping system, parallel output multichannel chaos sequence;
A3) the processing of the chaos sequence of output by output module, parallel output satisfies the random bit sequence of testing standard.
In A1, the initial value of 64 bits is extended to the 32N bit by nonlinear transformation, produces N initial value x of coupled chaotic mapping system 0(i), i=1,2 ..., N, N is the number of coupling mapping, N 〉=4, each x 0(i) all be to belong to [0,2 32) integer on the interval; If the initial value that all equates is arranged, i.e. x 0(i)=x 0(1), i=2,3 ..., N, the initial value of output is changed to x 0(i)=x 0(1)+and 10000 * i, i=2,3 ..., N, wherein symbol+be mould 2 32Addition.
In A2, the initial value input coupled chaotic mapping system of the coupled chaotic mapping system of expansion generation among the A1, described coupled chaotic mapping system satisfies
x n+1(i)=(1-ε 12)f(x n(i))+ε 1f(x n(i+1))+ε 2f(x n(i-1)),i=1,2,...,N,
N=0 wherein, 1,2 ... be the discrete time step number; I is coupling mapping position coordinate, and N is the length of coupled map lattices; Adopt periodic boundary condition x n(0)=x n(N), x n(N+1)=x n(1); F (x)=ax mod 2 32The displacement mapping, a ∈ (1,2]; ε 1And ε 2Be stiffness of coupling, satisfy ε 1>0, ε 2>0, and ε 1≠ ε 2, 1-ε 12>0;
And described coupled chaotic mapping system requires parameter a, ε 1And ε 2Selection so that coupled system is Spatiotemporal Chaotic Systems, simultaneously in order to make complicated multiplying be converted into simple shifting function, getting parameter is following form
a = 1 + Σ i = 1 a i 2 - i , a 1∈{0,1},
ϵ 1 = Σ i = 1 b i 2 - i , b 1∈{0,1},
ϵ 2 = Σ i = 1 c i 2 - i , c 1∈{0,1},
And described coupled chaotic mapping system requires discrete time n greater than just beginning the parallel output chaos time sequence at 100 o'clock.
In A3, the chaos time sequence value of A2 output is converted into 32 bits
Figure BSA00000783561300033
Wherein
Figure BSA00000783561300034
The lower partial bit position of output sensitiveness
Figure BSA00000783561300035
J 〉=17, the bit sequence of output adopt NIST SP800-22 revised edition as testing standard, guarantee that each sequence has good statistical property, and are separate between the different sequences.
The present invention has following technique effect:
1. the randomizer based on Time Chaotic Dynamical Systems generally is only applicable to software operating environment, and the present invention is by selecting parameter a, ε 1And ε 2, make the random bit generator based on Time Chaotic Dynamical Systems can conveniently be used for the hardware realization with less cost.
2. this Pseudo-random bit generator can the parallel output bit sequence.
Description of drawings
Fig. 1 is structural representation of the present invention.
Fig. 2 is embodiment of the invention f (x)=2x mod 2 32Displacement map operation schematic diagram.
Fig. 3 is the embodiment of the invention
Figure BSA00000783561300036
Displacement map operation schematic diagram.
Fig. 4 is the schematic diagram of the coupling chaotic mapping of the embodiment of the invention.
Fig. 5 is the output module schematic diagram of the embodiment of the invention.
Embodiment
Further describe technical scheme of the present invention below in conjunction with accompanying drawing and example: A1) by initialization module, the initial value of Pseudo-random bit generator (being also referred to as seed) expansion is produced the initial value of coupled chaotic mapping system; A2) the initial value input coupled chaotic mapping system of the coupled chaotic mapping system of expansion generation, through the effect of coupled chaotic mapping system, parallel output multichannel chaos sequence; A3) the processing of the chaos sequence of output by output module, parallel output satisfies the random bit sequence of testing standard.
In A1, initialization module is that the initial value of 64 bits is extended to the 32N bit by nonlinear transformation, produces N initial value x of coupled chaotic mapping system 0(i), N is the number of coupling mapping, N 〉=4, each x 0(i) all be to belong to [0,2 32) integer on the interval.If all initial value all equates, i.e. x 0(i)=x 0(1), i=2,3 ..., N, then the initial value of output is x 0(i)=x 0(1)+and 10000 * i, i=2,3 ..., N.
Above-mentioned nonlinear transformation can adopt hash function method, for example SHA-1.The initial value of 64 bits is carried out the SHA-1 hash transformation as information, obtain the hashed value of 160 bits, the expansion of 160 bits is whenever got 32 bit values as the initializaing variable x of a mapping of coupled chaotic mapping system corresponding to the coupling mapped system of N=5 0(i), i=1,2,3,4,5.If the coupling mapped system of N>5 then continues 160 bit values of output are carried out the SHA-1 hash transformation as new information, whenever get the hashed value continuation of 32 bits output as the initializaing variable x of the remaining mapping of coupled chaotic mapping system 0(i), i=6,7,8,9,10.By that analogy, if the coupling mapped system of N>10 then continues 160 bit values of output are carried out the SHA-1 hash transformation as new information, whenever get the hashed value of 32 bits output as the initializaing variable x of coupled chaotic mapping system 0(i), i=11,12... is until obtain all initializaing variable x of the coupled chaotic mapping system of needs 0(i), i=1,2 ..., N.
Above-mentioned nonlinear transformation also can be in the following way: at first the initial value with 64 bits is defined as w (1) || w (2) || ... || w (7) || w (8), each w (i) is [0,2 8) integer, i=1,2 ..., 8.Definition w (i+8)=S (w (i)+w (i+4)+i), i=1,2 ..., 4N-8.Symbol+be mould 2 wherein 8Addition, S be 8 bits to the non-linear S box conversion of 8 bits, can select the S box conversion of AES.The w that makes up in order 48 bits forms the integer of 32 bits, such as x 0(1)=and w (1) || w (2) || w (3) || w (4), x 0(2)=and w (5) || w (6) || w (7) || w (8) ..., x 0(N)=and w (4N-3) || w (4N-2) || w (4N-1) || w (4N).
In A2, the initial value input coupled chaotic mapping system of the coupled chaotic mapping system of expansion generation, through the effect of coupled chaotic mapping system, parallel output multichannel chaos sequence.Described coupled chaotic mapping system satisfies:
x n+1(i)=(1-ε 12)f(x n(i))+ε 1f(x n(i+1))+ε 2f(x n(i-1)),i=1,2,...,N
Wherein f (x)=ax mod 2 is shone upon in displacement 32, a ∈ (1,2]; ε 1And ε 2Be stiffness of coupling, satisfy ε 1>0, ε 2>0, and ε 1≠ ε 2, 1-ε 12>0.Described coupled chaotic mapping system requires parameter a, ε 1And ε 2Selection so that coupled system is Spatiotemporal Chaotic Systems, and require discrete time n greater than just beginning the parallel output chaos time sequence at 100 o'clock.
Fig. 2 is displacement mapping f (the x)=ax mod 2 of the embodiment of the invention 32Operation chart.If get a=2, then f (x)=2x mod2 is shone upon in displacement 32Be converted into f (x)=(x<<<1) mod2 32, wherein x<<<1 represents to move to left 1 bit manipulation.
Fig. 3 is the embodiment of the invention
Figure BSA00000783561300051
Displacement map operation schematic diagram.
Figure BSA00000783561300052
Can be decomposed into
Figure BSA00000783561300053
Then displacement mapping
Figure BSA00000783561300054
Be converted into f (x)=x+ (x>>>1)+(x>>>2) mod 2 32, wherein x>>>1 and x>>>2 represent respectively to move to right 1 and 2 bit manipulations that move to right.
Fig. 4 is the schematic diagram of the coupling chaotic mapping of the embodiment of the invention.If get
Figure BSA00000783561300056
Then parameter can be decomposed into ϵ 1 = 3 32 = 2 - 4 + 2 - 5 , ε 2=2 -5 1 - ϵ 1 - ϵ 2 = 7 8 = 2 - 1 + 2 - 2 + 2 - 3 , The coupling mapped system further is expressed as:
x n+1(i)=(1-ε 12)f(x n(i))+ε 1f(x n(i+1))+ε 2f(x n(i-1))
=(1-ε 12)X n(i)+ε 1X n(i+1)+ε 2X n(i-1)
=(X n(i)>>>1)+(X n(i)>>>2)+(X n(i)>>>3)
+(X n(i+1)>>>4)+(X n(i+1)>>>5)+(X n(i-1)>>>5).
Among Fig. 2, the 3 and 4 shown embodiment, having guaranteed that the multiplying of displacement mapping and coupling chaotic mapping is converted into shifting function, being conducive to the design of hardware operation.Under above-mentioned parameter, system is Spatiotemporal Chaotic Systems simultaneously.Require the running time just can the parallel output chaos time sequence greater than 100 o'clock, the initial value that has guaranteed input be fully mixed and is spread.
Fig. 5 is the output module schematic diagram of the embodiment of the invention.In order to guarantee that sequence has preferably statistical property, select 32 bit x N+1(i) the low partial bit of the sensitivity in is namely selected as output (
Figure BSA00000783561300062
) in 16 low bits
Figure BSA00000783561300063
Adopt the statistical method of NIST SP800-22 revised edition to detect, testing result shows N sequence of parallel output
Figure BSA00000783561300064
(i=1,2 ..., N) all having good statistical property, adjacent sequence has good cross-correlation statistical property, i.e. sequence simultaneously
Figure BSA00000783561300065
Also be satisfied with the detection of NIST SP800-22 revised edition, i=1 wherein, 2 ..., N-1.

Claims (7)

1. based on the parallel Pseudo-random bit generator of coupled chaotic mapping system, its process feature is following treatment step:
A1) by initialization module, the initial value of the initial value of Pseudo-random bit generator (being also referred to as seed) by nonlinear transformation expansion and generation coupled chaotic mapping system;
A2) the initial value input coupled chaotic mapping system of the coupled chaotic mapping system of expansion generation, through the effect of coupled chaotic mapping system, parallel output multichannel chaos sequence;
A3) the processing of the chaos sequence of output by output module, parallel output satisfies the PRBS pseudo-random bit sequence of testing standard.
2. the parallel Pseudo-random bit generator based on coupled chaotic mapping system according to claim 1, it is characterized in that described steps A 1 is extended to the 32N bit to the initial value of 64 bits by nonlinear transformation, produce N initial value x of coupled chaotic mapping system 0(i), i=1,2 ..., N, N is the number of coupling mapping, N 〉=4, each x 0(i) all be to belong to [0,2 32) integer on the interval; If the initial value that all equates is arranged, i.e. x 0(i)=x 0(1), i=2,3 ..., N, the initial value of output is changed to x 0(i)=x 0(1)+and 10000 * i, i=2,3 ..., N.
3. described according to claim 2, nonlinear transformation can be in the following way: at first the initial value with 64 bits is defined as w (1) || w (2) || ... ‖ w (7) || w (8), each w (i) is [0,2 8) integer, i=1,2 ..., 8.Definition w (i+8)=S (w (i)+w (i+4)+i), i=1,2 ..., 4N-8.Symbol+be mould 2 wherein 8Addition, S be 8 bits to the non-linear S box conversion of 8 bits, can select the S box conversion of AES; Make up in order the integer that 4 w form 32 bits, such as x 0(1)=and w (1) || w (2) || w (3) || w (4), x 0(2)=and w (5) || w (6) || w (7) || w (8) ..., x 0(N)=and w (4N-3) || w (4N-2) || w (4N-1) || w (4N).
4. the parallel Pseudo-random bit generator based on coupled chaotic mapping system according to claim 1, it is characterized in that described steps A 2 the initial value input coupled chaotic mapping system of the coupled chaotic mapping system of expansion generation, described coupled chaotic mapping system satisfies
x n+1(i)=(1-ε 12)f(x n(i))+ε 1f(x n(i+1))+ε 2f(x n(i-1)),i=1,2,...,N,
N=0 wherein, 1,2 ... be the discrete time step number; I is coupling mapping position coordinate, and N is the length of coupled map lattices; Adopt periodic boundary condition x n(0)=x n(N), x n(N+1)=x n(1); F (x)=ax mod2 32The displacement mapping, a ∈ (1,2]; ε 1And ε 2Be stiffness of coupling, satisfy ε 1>0, ε 2>0, and ε 1≠ ε 2, 1-ε 12>0.
5. coupled chaotic mapping system according to claim 3 requires parameter a, ε 1And ε 2Selection so that coupled system is Spatiotemporal Chaotic Systems, and satisfy following form:
Figure FSA00000783561200021
a 1∈ { 0,1};
Figure FSA00000783561200022
b 1∈ { 0,1}; c 1∈ { 0,1}.
6. coupled chaotic mapping system according to claim 3 requires discrete time n greater than just beginning the parallel output chaos time sequence at 100 o'clock.
7. the parallel Pseudo-random bit generator based on coupled chaotic mapping system according to claim 1 is characterized in that in the described steps A 3, and the chaos time sequence value of A2 output is converted into 32 bits
Figure FSA00000783561200024
(
Figure FSA00000783561200025
), the lower partial bit position of output sensitiveness
Figure FSA00000783561200026
J 〉=17, the bit sequence of output adopt NIST SP800-22 revised edition as testing standard, guarantee that each sequence has good statistical property, and are separate between the different sequences.
CN201210364841.1A 2012-09-27 2012-09-27 Based on the parallel Pseudo-random bit generator of coupled chaotic mapping system Expired - Fee Related CN102904715B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210364841.1A CN102904715B (en) 2012-09-27 2012-09-27 Based on the parallel Pseudo-random bit generator of coupled chaotic mapping system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210364841.1A CN102904715B (en) 2012-09-27 2012-09-27 Based on the parallel Pseudo-random bit generator of coupled chaotic mapping system

Publications (2)

Publication Number Publication Date
CN102904715A true CN102904715A (en) 2013-01-30
CN102904715B CN102904715B (en) 2015-08-26

Family

ID=47576769

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210364841.1A Expired - Fee Related CN102904715B (en) 2012-09-27 2012-09-27 Based on the parallel Pseudo-random bit generator of coupled chaotic mapping system

Country Status (1)

Country Link
CN (1) CN102904715B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103580849A (en) * 2013-10-25 2014-02-12 西安理工大学 Spatiotemporal chaos secret communication method
CN106291616A (en) * 2016-07-29 2017-01-04 武汉大学 Space-time chaos vector pseudo-noise code generator offset carrier modulator approach and system
CN110958106A (en) * 2019-11-29 2020-04-03 珠海大横琴科技发展有限公司 Parallel hybrid chaotic system under precision limited mode

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060291649A1 (en) * 2005-06-22 2006-12-28 Crandall Richard E Chaos generator for accumulation of stream entropy
US20080183785A1 (en) * 2007-01-29 2008-07-31 Oded Katz Differential Approach to Current-Mode Chaos Based Random Number Generator
CN101252416A (en) * 2008-03-24 2008-08-27 清华大学 Space-time chaos double coupling drive system and code error detecting and handling method
CN101702117A (en) * 2009-11-09 2010-05-05 东南大学 Method for generating random pseudorandom sequence based on discrete progressive determinacy
CN101902332A (en) * 2010-07-16 2010-12-01 北京邮电大学 Hashing method with secrete key based on coupled chaotic mapping system

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060291649A1 (en) * 2005-06-22 2006-12-28 Crandall Richard E Chaos generator for accumulation of stream entropy
US20080183785A1 (en) * 2007-01-29 2008-07-31 Oded Katz Differential Approach to Current-Mode Chaos Based Random Number Generator
CN101252416A (en) * 2008-03-24 2008-08-27 清华大学 Space-time chaos double coupling drive system and code error detecting and handling method
CN101702117A (en) * 2009-11-09 2010-05-05 东南大学 Method for generating random pseudorandom sequence based on discrete progressive determinacy
CN101902332A (en) * 2010-07-16 2010-12-01 北京邮电大学 Hashing method with secrete key based on coupled chaotic mapping system

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
张靓: "混沌伪随机序列发生器设计及应用", 《中国优秀硕士学位论文全文数据库 信息科技辑》 *
邱劲、王平、肖迪、廖晓峰: "基于混沌映射的伪随机序列发生器", 《计算机科学》 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103580849A (en) * 2013-10-25 2014-02-12 西安理工大学 Spatiotemporal chaos secret communication method
CN106291616A (en) * 2016-07-29 2017-01-04 武汉大学 Space-time chaos vector pseudo-noise code generator offset carrier modulator approach and system
CN106291616B (en) * 2016-07-29 2018-11-23 武汉大学 Space-time chaos vector pseudo-noise code generator offset carrier modulator approach and system
CN110958106A (en) * 2019-11-29 2020-04-03 珠海大横琴科技发展有限公司 Parallel hybrid chaotic system under precision limited mode

Also Published As

Publication number Publication date
CN102904715B (en) 2015-08-26

Similar Documents

Publication Publication Date Title
Tutueva et al. Adaptive chaotic maps and their application to pseudo-random numbers generation
Hua et al. Dynamic parameter-control chaotic system
Murillo-Escobar et al. A novel pseudorandom number generator based on pseudorandomly enhanced logistic map
Liu et al. Delay-introducing method to improve the dynamical degradation of a digital chaotic map
Wang et al. Chaotic encryption algorithm based on alternant of stream cipher and block cipher
Wu et al. Discrete wheel-switching chaotic system and applications
Cang et al. Pseudo-random number generator based on a generalized conservative Sprott-A system
Merah et al. A pseudo random number generator based on the chaotic system of Chua’s circuit, and its real time FPGA implementation
Hua et al. Image encryption using 2D Logistic-Sine chaotic map
Hu et al. A true random number generator based on mouse movement and chaotic cryptography
Liu et al. A new pseudorandom number generator based on a complex number chaotic equation
CN110058842B (en) Structure-variable pseudo-random number generation method and device
Volos Chaotic random bit generator realized with a microcontroller
CN102684871A (en) Quick parallel generating method for multidimensional pseudo-random sequence with uniform distribution characteristics
Yang et al. A cubic map chaos criterion theorem with applications in generalized synchronization based pseudorandom number generator and image encryption
Song et al. Multi-image reorganization encryption based on SLF cascade chaos and bit scrambling
Zhou et al. A new conservative chaotic system and its application in image encryption
CN102904715A (en) Parallel pseudorandom bit generator based on coupling chaotic mapping system
CN106201435B (en) Pseudo-random number generation method based on cell neural network
Xu et al. A Strong Key Expansion Algorithm Based on Nondegenerate 2D Chaotic Map Over GF (2 n)
CN103701591A (en) Sequence password realization method and key stream generating method and device
Disina et al. All-or-Nothing Key Derivation Function Based on Quasigroup String Transformation
Palacios-Luengas et al. Digital noise produced by a non discretized tent chaotic map
Wang et al. Pseudo-random number generator based on asymptotic deterministic randomness
Huang et al. Performance of finite precision on discrete Chaotic map based on a feedback shift register

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150826

Termination date: 20160927