CN102904686A - Construction method of QC-LDPC (Quasi-Cyclic Low-Density Parity-Check) codes for code modulation and code modulation method - Google Patents

Abstract

The invention discloses a construction method of QC-LDPC (Quasi-Cyclic Low-Density Parity-Check) codes for code modulation, and a code modulation method. The construction method comprises the following steps of: constructing a mother code offset address matrix E of the QC-LDPC codes, and setting a submatrix order to be b; constructing offset address matrixes of the QC-LDPC codes with different code rates on the basis of the matrix E and by virtue of line division and merger properties of a unit shift matrix; and generating the QC-LDPC codes with the different code rates according to the offset address matrixes of the QC-LDPC codes with the different code rates and the submatrix order b. The code modulation method adopts the construction method to generate the QC-LDPC codes and then performs coding and modulation on information bits. According to the technical scheme provided by the invention, the code modulation method fully utilizes line merge codes and excellent properties of part of the line merge codes, can effectively improve the flexibility, expandability and multi-service applicability of a code modulation system on the premise of obtaining the excellent properties, and can ensure a relatively low hardware implementation complexity.

Description

The building method and the code modulating method that are used for code modulated QC-LDPC code

Technical field

The present invention relates to digital channel coding techniques field, particularly a kind of building method and a kind of code modulating method for code modulated QC-LDPC code.

Background technology

Low-density checksum (Low Density Parity Check, LDPC) code is that the class that proposed in 1962 by RobertG.Gallager is based on the Special Linear block code of sparse check matrix.It is described by check matrix H usually, and the change kernel of H is the code word space of LDPC code, and its main feature is that H has sparse property.The LDPC code not only has the superperformance of approaching shannon limit, and decoding complexity is lower, and handling capacity is high, flexible structure, be the study hotspot of field of channel coding in recent years, be widely used at present the fields such as deep space communication, optical fiber communication, ground and digital multimedia broadcast (dmb) via satellite.The LDPC code become the 4th generation mobile radio system and the strong competitor of new-generation digital television broadcast transmissions system channel coding scheme, and adopted by a plurality of Communication and Broadcast standards based on the channel coding schemes of LDPC code, such as IEEE802.16e, IEEE802.3an, DVB-T2 and DVB-S2, and digital TV ground multimedia broadcasting transmission standard (DTMB) etc.

LDPC(N, K) code has the check matrix H of the capable N of N-K row=[h _Mn] _{(N-K) * N}, wherein, N is code word size (abbreviation code length), K is information bit length, M=(N-K) generally is called check digit length, corresponding code check R=K/N.The H matrix is comprised of element 0 or 1, and its every delegation represents a check equations, is called check-node in Tanner figure, N-K altogether; Each row represents an information bit, is called variable node in Tanner figure, N altogether; Nonzero element in the H matrix represents the annexation between the variable node of check-node that it is expert at and column, is called the limit in Tanner figure.

Expression is connected to the set of whole variable nodes of check-node m, namely

Expression is connected to the set of the complete verification node of variable node n, namely

Accurate circulation (Quasi-Cyclic, QC) the LDPC code is an important subclass of LDPC code, its check matrix and generator matrix all have accurate circulation form, referring to the definition of people in document " Quasi-cyclic low-density parity-check codes from circulant permutation matrices " such as Marc P.C.Fossorier.The check matrix of QC-LDPC code is by M _c* N _cIndividual sub-matrix forms, wherein, and M _c=(N-K)/and b, N _c=N/b, b are the exponent numbers of submatrix.QC-LDPC code check matrix structure is as follows:

Wherein, A _{I, j}The square formation of b * b, 1≤i≤M, 1≤j≤N, b are called the submatrix exponent number, these square formations or single-place shift matrix, or full null matrix.Wherein, the characteristics of shift matrix are, its each provisional capital is the ring shift right position of its lastrow, and the first row is the ring shift right position of last column.The single-place shift matrix is a kind of shift matrix, is obtained by the unit matrix displacement, only has a nonzero element in its a row or column.For the single-place shift matrix A _{I, j}, define its displacement exponent e _{I, j}If, e _{I, j}=a, 1≤a≤b then represents A _{I, j}The a of the 1st row classifies 1 as, and all the other classify 0 as, and all the other each row all are one of ring shift rights of lastrow; If e _{I, j}=0, then represent A _{I, j}It is full null matrix.

For example, e _{I, j}=a=4, b=5 then represents A _{I, j}The 4th of the 1st row classifies 1 as, and all the other classify 0 as, and all the other each row all are one of ring shift rights of lastrow, and its structure is as follows:

$A_{i,j}=\left[\begin{array}{ccccc}0& 0& 0& 1& 0\\ 0& 0& 0& 0& 1\\ 1& 0& 0& 0& 0\\ 0& 1& 0& 0& 0\\ 0& 0& 1& 0& 0\end{array}\right]$

The offset address matrix E of definition QC-LDPC code is M _cRow N _cColumn matrix, it is expressed as follows:

$E={\[e_{i,j}\]}_{M_C\×N_C}$

By above-mentioned explanation as can be known, after b determined, the E matrix namely can be used as the reduced representation form of H matrix; At this moment, the E matrix is unique corresponding with the H matrix, and the H matrix is undertaken obtaining after the accurate circulation submatrix expansion by the E matrix.

The channel coding schemes of compatible various code rate (abbreviation multi code Rate of Chinese character) has very strong using value in the real systems such as digital broadcasting and mobile communication.The channel coding schemes of compatible multiple code length (being called for short many code lengths) is mainly derived from the demand that transmission system is supported the multiple business pattern.Long code generally is applied to broadcasting and satellite communication; And the professional General Requirements such as mobile communication, power line communication (Power Line Communication, PLC) adopt short code.(the The Consultative Committee for Space Data Systems of consultative committee for space data system, CCSDS) for LDPC code, the LDPC code of DVB-T2 and the Turbo code of LTE V8.1 motion of deep space communication, all be the channel coding schemes that adopts many code lengths multi code Rate of Chinese character.

The structure of traditional multi code Rate of Chinese character (or many code lengths) LDPC code is to construct respectively different H matrixes according to the requirement of different code checks (or code length) mostly, then encodes respectively or decode operation.Because the H matrix of each code check (or code length) is relatively independent or difference is larger, when hardware is realized the coding of multi code Rate of Chinese character (or many code lengths) unification and decode system, often be difficult to carry out effective global optimization, so that the hardware implementation complexity is higher.

The row combine code is defined in document " Multiple-Rate Low-Density Parity-Check Codes with Constant Block-length " by people such as Andres I.Vila Casado.The partial row combine code has expanded traditional capable combine code, and it is defined in document " ANew Design Method of Multi-Rate Quasi-Cyclic LDPC Codes " by people such as Zhichu Lin.For row combine code and partial row combine code, the decoder function module of different code checks can through multiplexing after the simple combination, form the decoder of multi code Rate of Chinese character unification.So, based on the multi code Rate of Chinese character LDPC code plan of row combine code and partial row combine code, can under the prerequisite that obtains premium properties, guarantee simultaneously relatively low hardware implementation complexity.For convenience of description, at first to making an explanation to give a definition:

1, can merge: check-node i, j can merge, and referring to does not have variable node to be connected to simultaneously check-node i and check-node j among the Tanner figure, be yet

Otherwise, then can not merge.

2, row merges: check-node i, and j merges, and refers to i, j satisfies can merge condition, and verification node i among the Tanner figure, and j merges into a new node k, whole variable nodes that whole variable nodes that origin node i connects are connected with origin node j all are connected to this new node k.Also namely,

Similarly, L check-node i ₁, i ₂..., i _LThe definition that can merge, row merges can be obtained by above-mentioned definition recursion.

3, line splitting: check-node k is split into two nodes, refers to that check-node k is split into two new check-node k among the Tanner figure ₁And k ₂, whole variable nodes that origin node k connects are divided into two parts, a part and new node k ₁Connect another part and new node k ₂Connect.Also namely,

Line splitting and row merge each other inverse process.Line splitting has certain flexibility, because the limit of origin node k can be selected and new node k after division neatly ₁Connect, perhaps with new node k ₂Connect.

4, partial row merges: check-node k partial row is incorporated into check-node i, j, and referring to check-node k line splitting is two new node k ₁And k ₂, k wherein ₁With the capable merging of check-node i, k ₂With the capable merging of check-node j, and they all satisfy and can merge condition.

Similarly, check-node k partial row is incorporated into i ₁, i ₂..., i _LThe definition of node can be obtained by above-mentioned definition recursion.

By the above as can be known, row merges the method that the matrix multirow is merged into delegation that defined, and line splitting has defined the method that matrix delegation is decomposed into multirow, and partial row merges and then to be defined as matrix delegation and to be split into multirow, the method that merges with multirow again.

For explaining conveniently, row merging, line splitting and partial row merge, and are referred to as row merging division or line splitting and merge.

If can make up many code lengths of multi code Rate of Chinese character QC-LDPC code based on same female code check matrix, just can take full advantage of the good characteristic of capable combine code and partial row combine code, can in the flexibility, extensibility and the multi-service applicability that obtain Effective Raise code modulation system under the prerequisite of premium properties, guarantee simultaneously relatively low hardware implementation complexity.

Summary of the invention

(1) technical problem to be solved

The object of the present invention is to provide a kind of building method for code modulated QC-LDPC code and a kind of code modulating method, be difficult to carry out effective integrated optimization, problem that the hardware implementation complexity is high with the construction process that solves many code lengths of multi code Rate of Chinese character LDPC code in the prior art.

(2) technical scheme

In order to solve the problems of the technologies described above, the present invention proposes a kind of building method for code modulated QC-LDPC code, described building method may further comprise the steps:

S101, make up female code offset address matrix E of QC-LDPC code, and to set the submatrix exponent number be b, wherein,

Described matrix E is the matrix of the capable 12M row of 12M, and M is positive integer, the displacement exponent e of described matrix E _{I, j}Satisfy 0≤e _{I, j}≤ b;

S102, add non-zero displacement index at described matrix E and obtain matrix E ', the displacement exponent e of described matrix E ' ' _{I, j}Satisfy 0≤e ' _{I, j}≤ b,

Obtain matrix E at described matrix E ' interpolation non-zero displacement index ", described matrix E " displacement exponent e " _{I, j}Satisfy 0≤e " _{I, j}≤ b,

At described matrix E " add non-zero displacement index obtain matrix E " ', described matrix E " ' displacement exponent e " ' _{I, j}Satisfy 0≤e " ' _{I, j}≤ b;

S103, calculate the offset address matrix E that code check is 1/2 QC-LDPC code ^(1/2), wherein, described matrix E ^(1/2)The displacement index

Computing formula be: $e_{i,j}^{(1/2)}=e_{i,j}+e_{i+6M,j},$ 1≤i≤6M，1≤j≤12M；

S104, calculate the offset address matrix E that code check is 2/3 QC-LDPC code ^(2/3), wherein, described matrix E ^(2/3)The displacement index Computing formula be:

$e_{i,j}^{(2/3)}=e_{i,j}^{\′}+e_{i+4M,j}^{\′}+e_{i+8M,j^{,\′}}^{\′}$ 1≤i≤4M，1≤j≤12M；

S105, calculate the offset address matrix E that code check is 3/4 QC-LDPC code ^(3/4), wherein, described matrix E ^(3/4)The displacement index

Computing formula be:

$e_{i,j}^{(3/4)}=e_{i,j}^{\′\′}+e_{i+3M,j}^{\′\′}+e_{i+6M,j}^{\′\′}+e_{i+9M,j^{,}}^{\′\′}$ 1≤i≤3M，1≤j≤12M；

S106, calculate the offset address matrix E that code check is 5/6 QC-LDPC code ^(5/6), wherein, described matrix E ^(5/6)The displacement index

Computing formula be:

$e_{i,j}^{(5/6)}=e_{i,j}^{\′\′\′}+e_{i+2M,j}^{\′\′\′}+e_{i+4M,j}^{\′\′\′}+e_{i+6M,j}^{\′\′\′}+e_{i+8M,j}^{\′\′\′}+e_{i+10M,j}^{\′\′\′},$

1≤i≤2M，1≤j≤12M；

S107, according to described matrix E ^(1/2)With described submatrix exponent number b, generate code check and be 1/2, code length is the QC-LDPC code of 12M*b,

According to described matrix E ^(2/3)With described submatrix exponent number b, generate code check and be 2/3, code length is the QC-LDPC code of 12M*b,

According to described matrix E ^(3/4)With described submatrix exponent number b, generate code check and be 3/4, code length is the QC-LDPC code of 12M*b,

According to described matrix E ^(5/6)With described submatrix exponent number b, generate code check and be 5/6, code length is the QC-LDPC code of 12M*b.

Optionally, further comprise step after the step S107:

S108, the numerical value of described submatrix exponent number b is revised as b ', wherein, described submatrix exponent number b ' satisfies

b′≥e _i,j，e′ _i，j，e″ _i，j，e″′ _i，j， $e_{i,j}^{(1/2)},e_{i,j}^{(2/3)},e_{i,j}^{(3/4)},e_{i,j}^{(5/6)};$

S109, according to described matrix E ^(1/2)With described submatrix exponent number b ', generate code check and be 1/2, code length is the QC-LDPC code of 12M*b ',

According to described matrix E ^(2/3)With described submatrix exponent number b ', generate code check and be 2/3, code length is the QC-LDPC code of 12M*b ',

According to described matrix E ^(3/4)With described submatrix exponent number b ', generate code check and be 3/4, code length is the QC-LDPC code of 12M*b ',

According to described matrix E ^(5/6)With described submatrix exponent number b ', generate code check and be 5/6, code length is the QC-LDPC code of 12M*b '.

Based on the building method of above-mentioned QC-LDPC code, the present invention has proposed a kind of code modulating method simultaneously, and described code modulating method may further comprise the steps:

S201, the described building method for code modulated QC-LDPC code of employing obtain the QC-LDPC code;

S202, utilize described QC-LDPC code, information bit waiting for transmission is encoded, obtain coded-bit;

S203, described coded-bit is carried out bit mapping, obtain the constellation bit vectors;

S204, described constellation bit vectors is carried out constellation mapping, obtain constellation symbol;

S205, described constellation symbol is sent to the subsequent treatment unit.

Optionally, the code length of described QC-LDPC code is 61440 or 15360.

Optionally, step S203 specifically comprises:

S203-1, described coded-bit is carried out Bit Interleave, obtain interleaving bits;

S203-2, described interleaving bits is carried out bit permutation, the bit vectors after obtaining replacing, and the bit vectors after the described displacement split, obtain described constellation bit vectors,

Wherein, described bit permutation refers to that all bits that will be mapped in one or more constellation symbol carry out order adjustment.

Optionally, step S204 specifically comprises:

Described constellation bit vectors is carried out APSK constellation mapping or the qam constellation mapping that M is ordered, obtains described constellation symbol,

Wherein, the value of described M is 4,16,64 or 256.

Optionally, step S205 further comprises:

Described constellation symbol carried out coordinate interweaves and symbol interleaving, then send to described subsequent treatment unit.

(3) beneficial effect

The technical scheme that the present invention proposes has following advantage: based on many code lengths of same female code offset address matrix (female code check matrix) structure multi code Rate of Chinese character QC-LDPC code, take full advantage of the good characteristic of capable combine code and partial row combine code, can in the flexibility, extensibility and the multi-service applicability that obtain Effective Raise code modulation system under the prerequisite of premium properties, guarantee simultaneously relatively low hardware implementation complexity.

In addition, the technical scheme of the present invention's proposition is also applicable for the LDPC code of common LDPC code or non-single-place shift matrix composition.

Description of drawings

Fig. 1 is the implementation procedure schematic diagram of the building method that is used for code modulated QC-LDPC code that proposes of the present invention.

Fig. 2 is the implementation procedure schematic diagram of the code modulating method that proposes of the present invention.

Embodiment

Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.

Single-place shift matrix A for a kind of QC-LDPC code _{I, j}, define its displacement exponent e _{I, j}If, e _{I, j}=a, 1≤a≤b, b are parameter submatrix exponent number, then represent A _{I, j}The a of the 1st row classifies 1 as, and all the other classify 0 as, and all the other each row all are one of ring shift rights of lastrow; If e _{I, j}=0, then represent A _{I, j}It is full null matrix.

For example, e _{I, j}=a=4, b=5 then represents A _{I, j}The 4th of the 1st row classifies 1 as, and all the other classify 0 as, and all the other each row all are one of ring shift rights of lastrow, and its structure is as follows:

$A_{i,j}=\left[\begin{array}{ccccc}0& 0& 0& 1& 0\\ 0& 0& 0& 0& 1\\ 1& 0& 0& 0& 0\\ 0& 1& 0& 0& 0\\ 0& 0& 1& 0& 0\end{array}\right]$

Based on the character of single-place shift matrix, for taking full advantage of the characteristic of capable combine code and department's row combine code, the present invention proposes a kind of building method for code modulated QC-LDPC code.

As shown in Figure 1, described building method may further comprise the steps:

S101, make up female code offset address matrix E of QC-LDPC code, and to set the submatrix exponent number be b, wherein,

Described matrix E is the matrix of the capable 12M row of 12M, and M is positive integer, the displacement exponent e of described matrix E _{I, j}Satisfy 0≤e _{I, j}≤ b;

S102, add non-zero displacement index at described matrix E and obtain matrix E ', the displacement exponent e of described matrix E ' ' _{I, j}Satisfy 0≤e ' _{I, j}≤ b,

Obtain matrix E at described matrix E ' interpolation non-zero displacement index ", described matrix E " displacement exponent e " _{I, j}Satisfy 0≤e " _{I, j}≤ b,

At described matrix E " add non-zero displacement index obtain matrix E " ', described matrix E " ' displacement exponent e " ' _{I, j}Satisfy 0≤e " ' _{I, j}≤ b;

S103, calculate the offset address matrix E that code check is 1/2 QC-LDPC code ^(1/2), wherein, described matrix E ^(1/2)The displacement index

Computing formula be:

$e_{i,j}^{(1/2)}=e_{i,j}+e_{i+6M,j},$ 1≤i≤6M，1≤j≤12M；

S104, calculate the offset address matrix E that code check is 2/3 QC-LDPC code ^(2/3), wherein, described matrix E ^(2/3)The displacement index

Computing formula be:

$e_{i,j}^{(2/3)}=e_{i,j}^{\′}+e_{i+4M,j}^{\′}+e_{i+8M,j}^{\′},$ 1≤i≤4M，1≤j≤12M；

S105, calculate the offset address matrix E that code check is 3/4 QC-LDPC code ^(3/4), wherein, described matrix E ^(3/4)The displacement index

Computing formula be:

$e_{i,j}^{(3/4)}=e_{i,j}^{\′\′}+e_{i+3M,j}^{\′\′}+e_{i+6M,j}^{\′\′}+e_{i+9M,j^{,}}^{\′\′}$ 1≤i≤3M，1≤j≤12M；

S106, calculate the offset address matrix E that code check is 5/6 QC-LDPC code ^(5/6), wherein, described matrix E ^(5/6)The displacement index

Computing formula be:

$e_{i,j}^{(5/6)}=e_{i,j}^{\′\′\′}+e_{i+2M,j}^{\′\′\′}+e_{i+4M,j}^{\′\′\′}+e_{i+6M,j}^{\′\′\′}+e_{i+8M,j}^{\′\′\′}+e_{i+10M,j}^{\′\′\′},$

1≤i≤2M，1≤j≤12M；

S107, according to described matrix E ^(1/2)With described submatrix exponent number b, generate code check and be 1/2, code length is the QC-LDPC code of 12M*b,

According to described matrix E ^(2/3)With described submatrix exponent number b, generate code check and be 2/3, code length is the QC-LDPC code of 12M*b,

According to described matrix E ^(3/4)With described submatrix exponent number b, generate code check and be 3/4, code length is the QC-LDPC code of 12M*b,

According to described matrix E ^(5/6)With described submatrix exponent number b, generate code check and be 5/6, code length is the QC-LDPC code of 12M*b.

Optionally, further comprise step after the step S107:

S108, the numerical value of described submatrix exponent number b is revised as b ', wherein, described submatrix exponent number b ' satisfies

b′≥e _i,j，e′ _i，j，e″ _i，j，e″′ _i，j， $e_{i,j}^{(1/2)},e_{i,j}^{(2/3)},e_{i,j}^{(3/4)},e_{i,j}^{(5/6)};$

S109, according to described matrix E ^(1/2)With described submatrix exponent number b ', generate code check and be 1/2, code length is the QC-LDPC code of 12M*b ',

According to described matrix E ^(2/3)With described submatrix exponent number b ', generate code check and be 2/3, code length is the QC-LDPC code of 12M*b ',

According to described matrix E ^(3/4)With described submatrix exponent number b ', generate code check and be 3/4, code length is the QC-LDPC code of 12M*b ',

According to described matrix E ^(5/6)With described submatrix exponent number b ', generate code check and be 5/6, code length is the QC-LDPC code of 12M*b '.

Utilize above-mentioned building method, can obtain a kind of multi code Rate of Chinese character QC-LDPC code, comprise the FEC forward error correction coding of 4 kinds of code checks:

1, code check is (12M*b, 6M*b) code of 1/2, and the offset address matrix is designated as:

$E^{(1/2)}={\left[e_{i,j}^{(1/2)}\right]}_{6M\×12M};$

2, code check is (12M*b, 8M*b) code of 2/3, and the offset address matrix is designated as:

$E^{(2/3)}={\left[e_{i,j}^{(2/3)}\right]}_{4M\×12M};$

3, code check is (12M*b, 9M*b) code of 3/4, and the offset address matrix is designated as:

$E^{(3/4)}={\left[e_{i,j}^{(3/4)}\right]}_{3M\×12M};$

4, code check is (12M*b, 10M*b) code of 5/6, and the offset address matrix is designated as:

$E^{(5/6)}={\left[e_{i,j}^{(5/6)}\right]}_{2M\×12M};$

Wherein, M is positive integer, and b is the submatrix exponent number, and different code check displacement indexes are all more than or equal to 0 and less than or equal to b.

The offset address matrix construction step of above-mentioned different code check QC-LDPC codes is as follows:

S101, the capable 12M column matrix of note 12M:

E=[e _i,j] _12M×12M；

S102, the capable 12M column matrix of note 12M:

E′=[e′ _i，j] _12M×12M，

E″=[e″ _i，j] _12M×12M，

E″′=[e" _i,j] _12M×12M，

Wherein, E ' obtains E by adding non-zero displacement index on the E basis " obtain by adding non-zero displacement index E ' basis on, the interpolation non-zero index that is shifted obtains on E " ' by the E " basis,

And e _{I, j}, e ' _{I, j}, e " _{I, j}, e " ' _{I, j}All more than or equal to 0, less than or equal to b;

S103, code check are (12M*b, 6M*b) code of 1/2, and the capable 12M line skew of its 6M address matrix is designated as:

$E^{(1/2)}={\left[e_{i,j}^{(1/2)}\right]}_{6M\×12M},$

E ^(1/2)By E=[ei, j] 12M * 12M calculates, wherein,

$e_{i,j}^{(1/2)}=e_{i,j}+e_{i+6M,j},$ 1≤i≤6M，1≤j≤12M；

S 104, code check are (12M*b, 8M*b) code of 2/3, and the capable 12M line skew of its 4M address matrix is designated as:

$E^{(2/3)}={\left[e_{i,j}^{(2/3)}\right]}_{4M\×12M},$

E ^(2/3)By E '=[e ' _{I, j}] _{12M * 12M}Calculate, wherein,

$e_{i,j}^{(2/3)}=e_{i,j}^{\′}+e_{i+4M,j}^{\′}+e_{i+8M,j}^{\′},$ 1≤i≤4M，1≤j≤12M，

That is, (12M*b, 6M*b) code with the pass of (12M*b, 8M*b) code is, removes the non-zero displacement index of new interpolation, and the i of E (1/2), i+2M, i+4M passed through after line splitting merges, and obtained E ^(2/3)I, i+2M is capable, 1≤i≤2M;

S105, code check are (12M*b, 9M*b) code of 3/4, and the capable 12M line skew of its 3M address matrix is designated as:

$E^{(3/4)}={\left[e_{i,j}^{(3/4)}\right]}_{3M\×12M},$

E ^(3/4) by E "=[e " _{I, j}] _{12M * 12M}Calculate, wherein,

$e_{i,j}^{(3/4)}=e_{i,j}^{\′\′}+e_{i+3M,j}^{\′\′}+e_{i+6M,j}^{\′\′}+e_{i+9M,j}^{\′\′},$ 1≤i≤3M，1≤j≤12M，

That is, (12M*b, the 6M*b) of 1/2 code check code is to remove the non-zero displacement index of new interpolation, E with the pass of (12M*b, 9M*b) code of 3/4 code check ^(1/2)I, i+3M passes through after space merges, and obtains E ^(3/4)I capable, 1≤i≤3M;

S106, code check are (12M*b, 10M*b) code of 5/6, and the capable 12M line skew of its 2M address matrix is designated as:

$E^{(5/6)}={\left[e_{i,j}^{(5/6)}\right]}_{2M\×12m},$

E ^(5/6)By E " '=[e " ' _{I, j}] _{12M * 12M}Calculate, wherein,

$e_{i,j}^{(5/6)}=e_{i,j}^{\′\′\′}+e_{i+2M,j}^{\′\′\′}+e_{i+4M,j}^{\′\′\′}+e_{i+6M,j}^{\′\′\′}+e_{i+8M,j}^{\′\′\′}+e_{i+10M,j}^{\′\′\′},$ 1≤i≤2M，1≤j≤12M，

That is, (12M*b, the 8M*b) of 2/3 code check code is to remove the non-zero displacement index of new interpolation, E with the pass of (12M*b, 10M*b) code of 5/6 code check ^(2/3)I, i+2M passes through after space merges, and obtains E ^(5/6)I capable, 1≤i≤2M;

S107, by the offset address matrix E of 4 kinds of code checks ^(1/2), E ^(2/3), E ^(3/4), E ^(5/6)With submatrix exponent number b, the QC-LDPC code that to obtain these 4 kinds of code check code lengths be 12M*b.

In order to expand the range of application of above-mentioned QC-LDPC code, take full advantage of the quasi-cyclic of check matrix, under identical offset address matrix condition, can by changing submatrix exponent number b to realize many code lengths scheme, be applicable to other multiple business.For this reason, the building method of the present invention's proposition is further comprising the steps:

S108, the submatrix exponent number is revised as b ', wherein, b ' must be more than or equal to different code checks displacement indexes;

S 109, by the offset address matrix E of above-mentioned 4 kinds of code checks ^(1/2), E ^(2/3), E ^(3/4), E ^(5/6)With new submatrix exponent number b ', the QC-LDPC code that to obtain these new 4 kinds of code check code lengths be 12M*b '.

Repeating step S108 and S109 can obtain the QC-LDPC code character of 4 kinds of multiple code lengths of code-rate-compatible, and wherein, the offset address matrix of above-mentioned multiple code length QC-LDPC code is E ^(1/2), E ^(2/3), E ^(3/4), E ^(5/6), the offset address matrix of above-mentioned 4 kinds of code checks can compatible multiple code length.

At present more about the decoding algorithm of LDPC, use the confidence spread algorithm (Belief Propagation Algorithm, BP) that is based on more widely the soft information of log-likelihood ratio (Logarithm Likelihood Ratio, LLR).The BP algorithm mainly replaces iteration by two decoding calculation step and forms, i.e. operation of horizontal (Horizontal Process, HP) and vertical computing (Vertical Process, VP).Operation of horizontal is by HPU(Horizontal Process Unit, horizontal arithmetic unit) carry out, vertical computing is by VPU(Vertical Process Unit, vertical arithmetic element) carry out.For the multi code Rate of Chinese character QC-LDPC code that the present invention constructs, the HPU of different code check decoders can through multiplexing after the simple combination, consist of multi code Rate of Chinese character unification HPU; The VPU of different code check decoders can be fully multiplexing, consists of multi code Rate of Chinese character unification VPU.HPU/VPU can form the decoder that obtains the multi code Rate of Chinese character unification by the multi code Rate of Chinese character unification.So the multi code Rate of Chinese character QC-LDPC code structural scheme based on the present invention proposes can guarantee relatively low hardware implementation complexity simultaneously under the prerequisite that obtains premium properties.

Below by specific embodiment, the building method of the QC-LDPC code that the present invention is proposed carries out detailed explanation.

Embodiment 1:

Many code lengths of multi code Rate of Chinese character QC-LDPC code that the present embodiment constructs comprises the FEC forward error correction coding of 2 kinds of code lengths of 4 kinds of code checks:

1, code check is 1/2 1/2-b128 code (15360,7680) and 1/2-b512 code (61440,30720), and these two codes have identical offset address matrix, are designated as:

$E^{(1/2)}={\left[e_{i,j}^{(1/2)}\right]}_{60\×120},$

Difference is the former parameter b=128, latter's parameter b=512;

2, code check is 2/3 2/3-b128 code (15360,10240) and 2/3-b512 code (61440,40960), and these two codes have identical offset address matrix, are designated as:

$E^{(2/3)}={\left[e_{i,j}^{(2/3)}\right]}_{40\×120},$

Difference is the former parameter b=128, latter's parameter b=512;

3, code check is 3/4 3/4-b128 code (15360,11520) and 3/4-b512 code (61440,46080), and these two codes have identical offset address matrix, are designated as:

$E^{(3/4)}={\left[e_{i,j}^{(3/4)}\right]}_{30\×120},$

Difference is the former parameter b=128, latter's parameter b=512;

4, code check is 5/6 5/6-b128 code (15360,12800) and 5/6-b512 code (61440,51200), and these two codes have identical offset address matrix, are designated as:

$E^{(5/6)}={\left[e_{i,j}^{(5/6)}\right]}_{20\×120},$

Difference is the former parameter b=128, latter's parameter b=512.

The parameter of above-mentioned many code lengths of multi code Rate of Chinese character QC-LDPC code is as shown in table 1:

The multiple code length QC-LDPC code parameters of table 1 various code rate

The construction step of the offset address matrix of 2 kinds of code length QC-LDPC of 4 kinds of code checks code in the present embodiment is described below:

S101, note matrix E=[e _{I, j}] _{120 * 120}Be 120 row, 120 column matrix, the displacement index of matrix E is provided by appendix;

S102, note matrix E '=[e ' _{I, j}] _{120 * 120}Be 120 row, 120 column matrix, wherein:

$e_{i,j}^{\′}=\left\{\begin{array}{c}17,(i,j)=\left(\mathrm{104,71}\right)\\ 38,(i,j)=\left(\mathrm{113,72}\right)\\ 95,(i,j)=\left(\mathrm{80,73}\right)\\ 11,(i,j)=\left(\mathrm{117,74}\right)\\ 102,(i,j)=\left(\mathrm{111,75}\right)\\ 85,(i,j)=\left(\mathrm{5,76}\right)\\ 120,(i,j)=\left(\mathrm{99,77}\right)\\ 84,(i,j)=\left(\mathrm{61,78}\right),\\ 119,(i,j)=\left(\mathrm{118,79}\right)\\ 127,(i,j)=\left(\mathrm{68,80}\right)\\ 73,(i,j)=\left(\mathrm{76,81}\right)\\ 69,(i,j)=\left(\mathrm{17,82}\right)\\ 72,(i,j)=\left(\mathrm{7,83}\right)\\ 32,(i,j)=\left(\mathrm{75,84}\right)\\ e_{i,j},\mathrm{else}\end{array}\right.1\≤i\≤\mathrm{120,1}\≤j\≤120,$

Note matrix E "=[e " _{I, j}] _{120 * 120}Be 120 row, 120 column matrix, wherein:

$e_{i,j}^{\′\′}=\left\{\begin{array}{c}122,(i,j)=\left(\mathrm{23,85}\right)\\ 64,(i,j)=\left(\mathrm{33,86}\right)\\ 55,(i,j)=\left(\mathrm{37,87}\right)\\ 26,(i,j)=\left(\mathrm{33,88}\right)\\ 114,(i,j)=\left(\mathrm{11,89}\right),\\ 92,(i,j)=\left(\mathrm{15,90}\right)\\ 117,(i,j)=\left(\mathrm{19,91}\right)\\ 14,(i,j)=\left(\mathrm{42,92}\right)\\ e_{i,j}^{\′},\mathrm{else}\end{array}\right.1\≤i\≤\mathrm{120,1}\≤j\≤120,$

Note matrix E " '=[e " ' _{I, j}] _{120 * 120}Be 120 row, 120 column matrix, wherein:

$e_{i,j}^{\′\′\′}=\left\{\begin{array}{c}59,(i,j)=\left(\mathrm{54,93}\right)\\ 107,(i,j)=\left(\mathrm{32,94}\right)\\ 45,(i,j)=\left(\mathrm{39,95}\right)\\ 110,(i,j)=\left(\mathrm{9,96}\right)\\ 19,(i,j)=\left(\mathrm{6,97}\right)\\ 41,(i,j)=\left(\mathrm{50,98}\right)\\ 45,(i,j)=\left(\mathrm{47,99}\right)\\ 52,(i,j)=\left(\mathrm{52,100}\right)\\ 96,(i,j)=\left(\mathrm{43,101}\right)\\ 55,(i,j)=\left(\mathrm{50,102}\right)\\ 109,(i,j)=\left(\mathrm{16,103}\right)\\ e_{i,j}^{\′\′}\mathrm{,else}\end{array}\right.,1\≤i\≤\mathrm{120,1}\≤j\≤120;$

S103, code check are 1/2 1/2-b128 code (15360,7680) and 1/2-b512 code (61440,30720), and their offset address matrix is designated as:

$E^{(1/2)}={\left[e_{I,j}^{(1/2)}\right]}_{60\×120},$

E ( ^1/2)Be 60 row, 120 column matrix, wherein,

$e_{i,j}^{(1/2)}=e_{i,j}+e_{i+60,j},$ 1≤i≤60，1≤j≤120；

S104, code check are 2/3 2/3-b128 code (15360,10240) and 2/3-b512 code (61440,40960), and their offset address matrix is designated as:

$E^{(2/3)}={\left[e_{i,j}^{(2/3)}\right]}_{40\×120},$

E ^(2/3)Be 40 row, 120 column matrix, wherein,

$e_{i,j}^{(2/3)}=e_{i,j}^{\′}+e_{i+40,j}^{\′}+e_{i+80,j}^{\′},$ 1≤i≤40，1≤j≤120；

S105, code check are 3/4 3/4-b128 code (15360,11520) and 3/4-b512 code (61440,46080), and their offset address matrix is designated as:

$E^{(3/4)}={\left[e_{i,j}^{(3/4)}\right]}_{30\×120},$

E ^(3/4)Be 30 row, 120 column matrix, wherein,

$e_{i,j}^{(3/4)}=e_{i,j}^{\′\′}+e_{i+30,j}^{\′\′}+e_{i+60.j}^{\′\′}+e_{i+90,j}^{\′\′},$ 1≤i≤30，1≤j≤120；

S106, code check are 5/6 5/6-b128 code (15360,12800) and 5/6-b512 code (61440,51200), and their offset address matrix is designated as:

$E^{(5/6)}={\left[e_{i,j}^{(5/6)}\right]}_{20\×120},$

E ^(5/6)Be 20 row, 120 column matrix, wherein,

$e_{i,j}^{(5/6)}=e_{i,j}^{\′\′\′}+e_{i+20,j}^{\′\′\′}+e_{i+40,j}^{\′\′\′}+e_{i+60,j}^{\′\′\′}+e_{i+80,j}^{\′\′\′}+e_{i+100,j}^{\′\′\′},$ 1≤i≤20，1≤j≤120。

Embodiment 2:

The present embodiment slightly makes improvements the displacement index of b=128 short code among the embodiment 1:

S1, in embodiment 1, the offset address matrix of resulting 4 kinds of code checks is:

Code check is 1/2 $E^{(1/2)}={\left[e_{i,j}^{(1/2)}\right]}_{60\×120},$

Code check is 2/3 E $=_{(2/3)}{\left[e_{i,j}^{(2/3)}\right]}_{40\×120},$

Code check is 3/4 $E^{(3/4)}={\left[e_{i,j}^{(3/4)}\right]}_{30\×120},$

Code check is 5/6 $E^{(5/6)}={\left[e_{i,j}^{(5/6)}\right]}_{20\×120};$

Code check after S2, note are improved is that 1/2 1/2-b128 code (15360,7680) offset address matrix is:

${\stackrel{\·}{E}}^{(1/2)}={\left[{\stackrel{\·}{e}}_{i,j}^{(1/2)}\right]}_{60\×120},$ Wherein,

${\stackrel{\·}{e}}_{i,j}^{(1/2)}=\left\{\begin{array}{c}0,(i,j)=\left(\mathrm{2,47}\right)\\ e_{i,j}^{(1/2)},\mathrm{else}\end{array}\right.,1\≤i\≤\mathrm{60,1}\≤j\≤120;$

Code check after S3, note are improved is that 2/3 2/3-b128 code (15360,10240) offset address matrix is:

${\stackrel{\·}{E}}^{(2/3)}={\left[{\stackrel{\·}{e}}_{i,j}^{(2/3)}\right]}_{40\×120},$ Wherein,

${\stackrel{\·}{e}}_{i,j}^{(2/3)}=\left\{\begin{array}{c}0,(i,j)=\left(\mathrm{24,13}\right)\\ e_{i,j}^{(2/3)},\mathrm{else}\end{array}\right.,1\≤i\≤\mathrm{40,1}\≤j\≤120;$

Code check after S4, note are improved is that 3/4 3/4-b128 code (15360,11520) offset address matrix is:

${\stackrel{\·}{E}}^{(3/4)}={\left[{\stackrel{\·}{e}}_{i,j}^{(3/4)}\right]}_{30\×120},$ Wherein,

${\stackrel{\·}{e}}_{i,j}^{(3/4)}=\left\{\begin{array}{c}0,(i,j)=\left(\mathrm{23,57}\right)\\ e_{i,j}^{(3/4)},\mathrm{else}\end{array}\right.,1\≤i\≤\mathrm{30,1}\≤j\≤120;$

Code check after S5, note are improved is that 5/6 5/6-b128 code (15360,12800) offset address matrix is:

${\stackrel{\·}{E}}^{(5/6)}={\left[{\stackrel{\·}{e}}_{i,j}^{(5/6)}\right]}_{20\×120},$ Wherein,

${\stackrel{\·}{e}}_{i,j}^{(5/6)}=\left\{\begin{array}{c}0,(i,j)=(13,2)\\ e_{i,j}^{(5/6)},\mathrm{else}\end{array}\right.,1\≤i\≤\mathrm{20,1}\≤j\≤120.$

A kind of many code lengths QC-LDPC code that the present embodiment constructs is characterised in that, on the basis of long code QC-LDPC code offset address matrix, obtains the QC-LDPC code offset address matrix of short code by revising the parton matrix.Wherein the modification of parton matrix is specially: one or more cyclic determinant submatrix is revised as complete zero submatrix, or one or more complete zero submatrix is revised as the cyclic determinant submatrix.

Based on described building method for code modulated QC-LDPC code, the present invention has proposed a kind of code modulating method simultaneously, and as shown in Figure 2, described code modulating method may further comprise the steps:

S201, the described building method for code modulated QC-LDPC code of employing obtain the QC-LDPC code;

S202, utilize described QC-LDPC code, information bit waiting for transmission is encoded, obtain coded-bit;

S203, described coded-bit is carried out bit mapping, obtain the constellation bit vectors;

S204, described constellation bit vectors is carried out constellation mapping, obtain constellation symbol;

S205, described constellation symbol is sent to the subsequent treatment unit.

Preferably, the code length of described QC-LDPC code is 61440 or 15360.

Preferably, step S203 specifically comprises:

S203-1, described coded-bit is carried out Bit Interleave, obtain interleaving bits;

S203-2, described interleaving bits is carried out bit permutation, the bit vectors after obtaining replacing, and the bit vectors after the described displacement split, obtain described constellation bit vectors,

Wherein, described bit permutation refers to that all bits that will be mapped in one or more constellation symbol carry out order adjustment.

Preferably, step S204 specifically comprises:

Described constellation bit vectors is carried out APSK constellation mapping or the qam constellation mapping that M is ordered, obtains described constellation symbol,

Wherein, the value of described M is 4,16,64 or 256.

Preferably, step S205 further comprises:

Described constellation symbol carried out coordinate interweaves and symbol interleaving, then send to described subsequent treatment unit.

In step S202, information bit waiting for transmission is carried out the LDPC coding, obtain coded-bit

Wherein NLDPC represents the LDPC code length.

Preferably, the code length of described LDPC code is 61440 or 15360, and code check is 1/2,2/3,3/4 or 5/6.

In step S203, described coded-bit is carried out bit mapping, obtain the constellation bit vectors, as the result of bit mapping.Wherein, bit mapping at first carries out interleaving treatment to coded-bit, and the result that then will interweave is combined as bit vectors.

Preferably, described bit mapping specifically comprises the steps:

S203-1, the gained coded-bit is carried out Bit Interleave, obtain interleaving bits.

Wherein, described Bit Interleave is characterised in that, coded-bit c is write the buffering area that a capable b of L is listed as line by line by row, obtains Matrix C, namely

$C=\left[\begin{array}{c}{c}_0\\ c_1\\ .\\ .\\ .\\ c_{L-1}\end{array}\right],$

Interweave in Matrix C gone, obtain matrix

Namely

$\tilde{C}=\left[\begin{array}{c}{\tilde{c}}_0\\ {\tilde{c}}_1\\ .\\ .\\ .\\ {\tilde{c}}_{L-1}\end{array}\right],$

C wherein _lWith Respectively representing matrix C and

L capable, 1≤l＜L.Will

Read by column by row, obtain interleaving bits

Wherein, a kind of optimal way of interweaving is in the row,

And the corresponding relation between the row of C and the row is as follows: make the remainder of lm=mod (l, m) expression l mould m,

Wherein

Expression rounds m=log downwards ₂M, M represent the exponent number of follow-up constellation mapping; Then ${\tilde{c}}_l=c_{L/m\×l_m+l_d.}$

Preferably, the value of parameter L is L=120, and the value of parameter b is b=N _LDPC/ L namely, works as N _LDPC=61440 o'clock, b=512 worked as N _LDPC=15360 o'clock, b=128.

S203-2, described interleaving bits is carried out bit permutation in one or more constellation symbol successively, be called for short bit permutation, the bit vectors after obtaining replacing splits the bit vectors after the displacement, obtains the constellation bit vectors, as the result of bit mapping.

Wherein, described bit permutation refers to that all bits that will be mapped in one or more constellation symbol carry out order adjustment.

The concrete steps of bit permutation are to incite somebody to action

Every q successive bits be classified as one group, obtain bit vectors

Wherein the value of q be m positive integer doubly, the bit vectors that arranges after changing is

Then

With

Corresponding relation be

0≤i＜q, wherein p=(p ₀, p ₁..., p _Q-1) be called the bit permutation pattern.

Wherein, the bit vectors after the displacement is split, it is characterized in that, will

Every m successive bits be classified as one group, obtain one or more constellation bit vectors b=(b ₀, b ₁..., b _M-1).

In step S204, described constellation bit vectors is carried out APSK constellation mapping or the qam constellation mapping that M is ordered, obtain constellation symbol.Wherein, but the selected value of M is 4,16,64 and 256.

Wherein, described M point APSK planisphere is characterised in that, all constellation point are distributed in N _ROn the individual donut, the radius of each annulus is ascending to be followed successively by

Have identical number of constellation points on each ring, be made as M _C, so M=N _R* M _C, each the ring on constellation point be uniformly distributed in phase place [0,2 π), initial phase is deflected to θ ₀Therefore, planisphere can represent with following formula:

$\mathrm{\χ}=\left\{x_{n,k}\right|x_{n,k}=r_n\mathrm{edp}\left\{j(\frac{2\mathrm{\π}}{M_C}k+{\mathrm{\θ}}_0)\right\}\},$

Wherein, j is imaginary unit

N=0,1 ..., N _R-1, k=0,1 ..., M _C-1.

Preferably, if M=4, then θ ₀=0; If M=16,64,256, θ then ₀=π/M _C

Preferably, in the situation that different M, annulus is counted N _R, each the ring on number of constellation points M _C, respectively to encircle the value of radius r as shown in table 2, and respectively encircle radius and can zoom in or out in proportion.

Table 2 constellation mapping parameter list

In step S205, give the subsequent treatment unit with the constellation symbol that obtains, perhaps, described constellation symbol carried out coordinate interweaves and symbol interleaving, be sent to again the subsequent treatment unit.

The above only is preferred implementation of the present invention; should be pointed out that for the person of ordinary skill of the art, under the prerequisite that does not break away from the technology of the present invention principle; can also make some improvement and replacement, these improvement and replacement also should be considered as protection scope of the present invention.

Appendix

e[1,3]=111 e[2,21]=95 e[3,34]=33 e[4,62]=116

e[1,11]=98 e[2,39]=72 e[3,66]=1 e[5,2]=8

e[1,39]=43 e[2,65]=1 e[4,5]=13 e[5,17]=40

e[1,56]=98 e[3,7]=35 e[4,8]=74 e[5,68]=1

e[2,1]=29 25 e[3,11]＝54 30 e[4,45]=63 35 e[6,2]=115

e[6,10]=49 e[13,11]=81 55 e[20,6]=30 e[66,59]=95

e[6,56]=100 e[13,27]=48 e[20,16]=106 e[67,16]=12

e[6,69]=1 30 e[13,74]=17 e[20,83]=1 e[67,21]=70

e[7,6]=39 e[14,3]=17 e[61,4]=62 85 e[67,59]=84

e[7,12]=115 e[14,8]=31 e[61,16]=32 e[67,70]=1

e[7,43]=33 e[14,12]=126 60 e[61,47]=126 e[68,10]=29

e[8,1]=41 e[14,63]=71 e[61,64]=1 e[68,27]=35

e[8,7]=6 35 e[15,9]=43 e[62,6]=59 e[68,43]=70

e[8,16]=91 e[15,12]=60 e[62,13]=101 90 e[68,48]=34

e[8,71]=1 e[15,15]=25 e[62,15]=111 e[69,14]=57

e[9,3]=83 e[15,51]=101 65 e[62,47]=39 e[69,30]=102

e[9,6]=98 e[16,10]=91 e[63,1]=9 e[69,42]=4

e[9,15]=120 40 e[16,11]=52 e[63,15]=111 e[69,72]=1

e[9,35]=85 e[16,15]=25 e[63,59]=98 95 e[70,1]=63

e[10,8]=20 e[16,77]=78 e[63,63]=91 e[70,11]=122

e[10,17]=33 e[16,79]=1 70 e[64,9]=44 e[70,45]=68

e[10,21]=112 e[17,16]=57 e[64,16]=73 e[70,73]=1

e[10,42]=37 45 e[17,78]=48 e[64,27]=41 e[71,4]=83

e[11,5]=63 e[17,80]=1 e[64,67]=1 100 e[71,16]=124

e[11,13]=44 e[18,1]=57 e[65,9]=25 e[71,34]=80

e[11,49]=101 e[18,10]=47 75 e[65,15]=24 e[71,74]=1

e[11,73]=127 e[18,11]=26 e[65,43]=41 e[72,6]=115

e[12,34]=3 50 e[18,16]=34 e[65,49]=126 e[72,9]=20

e[12,42]=88 e[19,14]=7 e[65,56]=76 105 e[72,18]=51

e[12,64]=24 e[19,17]=35 e[66,12]=44 e[73,6]=110

e[12,75]=1 e[19,81]=71 80 e[66,14]=122 e[73,18]=25

e[13,2]=127 e[20,2]=72 e[66,45]=50 e[73,35]=95

e[73,76]=1 e[81,1]=59 55 e[84,58]=43 e[87,90]=1

e[74,16]=75 e[81,5]=117 e[84,60]=35 e[88,4]=5

e[74,49]=68 30 e[81,13]=18 e[84,76]=74 e[88,5]=112

e[74,75]=92 e[81,17]=127 e[84,87]=1 85 e[88,11]=114

e[74,77]=1 e[81,29]=87 e[85,1]=69 e[88,17]=81

e[75,69]=104 e[81,30]=92 60 e[85,5]=34 e[88,25]=9

e[75,71]=67 e[81,51]=123 e[85,12]=90 e[88,46]=59

e[75,78]=1 35 e[81,84]=1 e[85,18]=17 e[88,90]=29

e[76,4]=60 e[82,3]=13 e[85,25]=5 90 e[88,91]=1

e[76,29]=13 e[82,7]=67 e[85,58]=23 e[89,1]=74

e[76,32]=2 e[82,9]=47 65 e[85,79]=2 e[89,9]=44

e[77,7]=113 e[82,18]=13 e[85,88]=1 e[89,10]=113

e[77,14]=58 40 e[82,31]=64 e[86,3]=76 e[89,16]=78

e[77,29]=6 e[82,67]=19 e[86,8]=35 95 e[89,46]=114

e[77,58]=45 e[82,84]=93 e[86,11]=66 e[89,52]=7

e[78,35]=121 e[82,85]=1 70 e[86,15]=77 e[89,89]=4

e[78,51]=8 e[83,8]=84 e[86,24]=114 e[89,92]=1

e[78,80]=102 45 e[83,13]=79 e[86,55]=85 e[90,2]=15

e[78,81]=1 e[83,18]=74 e[86,82]=10 100 e[90,6]=54

e[79,6]=46 e[83,32]=115 e[86,89]=1 e[90,13]=34

e[79,25]=51 e[83,60]=123 75 e[87,1]=17 e[90,16]=62

e[79,32]=4 e[83,83]=126 e[87,7]=112 e[90,24]=78

e[79,82]=1 50 e[83,86]=1 e[87,14]=30 e[90,61]=92

e[80,11]=77 e[84,3]=38 e[87,15]=53 105 e[90,87]=92

e[80,30]=79 e[84,6]=59 e[87,31]=44 e[90,93]=1

e[80,31]=57 e[84,10]=10 80 e[87,60]=1 e[91,7]=1

e[80,41]=19 e[84,17]=102 e[87,88]=2 e[91,12]=6

e[91,17]=116 e[94,97]=1 55 e[98,12]=47 e[101,38]=16

e[91,24]=100 e[95,1]=58 e[98,18]=60 e[101,102]=101

e[91,65]=101 30 e[95,8]=7 e[98,62]=34 e[101,104]=1

e[91,72]=59 e[95,14]=91 e[98,68]=20 85 e[102,4]=65

e[91,94]=1 e[95,18]=119 e[98,95]=113 e[102,8]=120

e[92,2]=44 e[95,46]=14 60 e[98,101]=1 e[102,10]=65

e[92,7]=23 e[95,61]=22 e[99,1]=117 e[102,17]=108

e[92,11]=116 35 e[95,94]=21 e[99,9]=15 e[102,37]=41

e[92,17]=25 e[95,98]=1 e[99,11]=21 90 e[102,66]=82

e[92,36]=90 e[96,1]=36 e[99,18]=59 e[102,103]=43

e[92,52]=38 e[96,6]=32 65 e[99,40]=11 e[102,105]=1

e[92,85]=60 e[96,13]=24 e[99,66]=26 e[103,3]=1

e[92,95]=1 40 e[96,17]=26 e[99,97]=122 e[103,9]=68

e[93,8]=46 e[96,55]=53 e[99,102]=1 95 e[103,12]=51

e[93,12]=67 e[96,70]=68 e[100,3]=110 e[103,17]=105

e[93,16]=20 e[96,98]=118 70 e[100,5]=99 e[103,57]=52

e[93,36]=57 e[96,99]=1 e[100,12]=64 e[103,61]=49

e[93,41]=73 45 e[97,2]=103 e[100,18]=83 e[103,100]=101

e[93,91]=69 e[97,5]=83 e[100,40]=123 100 e[103,106]=1

e[93,96]=1 e[97,15]=26 e[100,53]=105 e[104,4]=116

e[94,4]=73 e[97,18]=7 75 e[100,93]=103 e[104,7]=31

e[94,6]=80 e[97,22]=39 e[100,103]=1 e[104,13]=83

e[94,14]=117 50 e[97,36]=123 e[101,2]=50 e[104,18]=39

e[94,17]=79 e[97,99]=17 e[101,8]=119 105 e[104,55]=110

e[94,26]=88 e[97,100]=1 e[101,10]=17 e[104,69]=33

e[94,52]=65 e[98,4]=110 80 e[101,18]=54 e[104,106]=112

e[94,96]=79 e[98,6]=44 e[101,26]=75 e[104,107]=1

e[105,3]=128 e[108,22]=124 55 e[111,108]=106 e[115,10]=101

e[105,7]=5 e[108,23]=29 e[111,114]=1 e[115,13]=83

e[105,13]=95 30 e[108,37]=2 e[112,4]=13 e[115,19]=29

e[105,26]=20 e[108,101]=93 e[112,10]=109 85 e[115,33]=14

e[105,41]=91 e[108,111]=1 e[112,15]=110 e[115,64]=66

e[105,44]=34 e[109,4]=11 60 e[112,38]=49 e[115,116]=42

e[105,105]=63 e[109,7]=88 e[112,44]=10 e[115,118]=1

e[105,108]=1 35 e[109,12]=81 e[112,54]=43 e[116,5]=76

e[106,5]=41 e[109,22]=125 e[112,111]=13 90 e[116,7]=75

e[106,9]=34 e[109,50]=29 e[112,115]=1 e[116,12]=127

e[106,13]=113 e[109,54]=102 65 e[113,5]=50 e[116,23]=81

e[106,40]=74 e[109,86]=66 e[113,10]=40 e[116,28]=76

e[106,50]=62 40 e[109,112]=1 e[113,14]=11 e[116,38]=31

e[106,63]=82 e[110,3]=12 e[113,50]=98 95 e[116,114]=96

e[106,92]=113 e[110,5]=68 e[113,57]=1 e[116,119]=1

e[106,109]=1 e[110,14]=42 70 e[113,65]=62 e[117,3]=7

e[107,4]=40 e[110,19]=114 e[113,115]=46 e[117,10]=62

e[107,8]=23 45 e[110,54]=122 e[113,116]=1 e[117,13]=114

e[107,11]=9 e[110,68]=83 e[114,2]=113 100 e[117,20]=127

e[107,23]=17 e[110,107]=42 e[114,7]=91 e[117,28]=43

e[107,57]=52 e[110,113]=1 75 e[114,15]=12 e[117,53]=75

e[107,67]=60 e[111,2]=65 e[114,20]=87 e[117,110]=121

e[107,109]=59 50 e[111,8]=68 e[114,33]=9 e[117,120]=1

e[107,110]=1 e[111,14]=19 e[114,62]=68 105 e[118,2]=112

e[108,3]=21 e[111,20]=14 e[114,113]=14 e[118,9]=41

e[108,9]=73 e[111,37]=37 80 e[114,117]=1 e[118,14]=56

e[108,13]=79 e[111,70]=26 e[115,2]=110 e[118,33]=34

e[118,39]=77

e[118,53]=3

e[118,104]=31

e[118,119]=49

e[119,5]=84

e[119,8]=19

e[119,15]=46

e[119,19]=75

e[119,47]=7

e[119,48]=75

e[119,112]=48

e[119,120]=26

e[120,4]=59

e[120,9]=98

e[120,14]=10

e[120,28]=107

e[120,44]=2

e[120,48]=69

e[120,117]=108

e[120,118]=116 。

Claims (7)

1. a building method that is used for code modulated QC-LDPC code is characterized in that, described building method may further comprise the steps:

S101, make up female code offset address matrix E of QC-LDPC code, and to set the submatrix exponent number be b, wherein,

Described matrix E is the matrix of the capable 12M row of 12M, and M is positive integer, the displacement exponent e of described matrix E _{I, j}Satisfy 0≤e _{I, j}≤ b;

S102, add non-zero displacement index at described matrix E and obtain matrix E ', the displacement exponent e of described matrix E ' ' _{I, j}Satisfy 0≤e ' _{I, j}≤ b,

Obtain matrix E at described matrix E ' interpolation non-zero displacement index ", described matrix E " displacement exponent e " _{I, j}Satisfy 0≤e " _{I, j}≤ b,

At described matrix E " add non-zero displacement index obtain matrix E " ', described matrix E " ' displacement exponent e " ' _{I, j}Satisfy 0≤e " ' _{I, j}≤ b;

S103, calculate the offset address matrix E that code check is 1/2 QC-LDPC code ^(1/2), wherein, described matrix E ^(1/2)The displacement index

Computing formula be:

$e_{i,j}^{(1/2)}=e_{i,j}+e_{i+6M,j},$ 1≤i≤6M，1≤j≤12M；

S104, calculate the offset address matrix E that code check is 2/3 QC-LDPC code ^(2/3), wherein, described matrix E ^(2/3)The displacement index

Computing formula be:

$e_{i,j}^{(2/3)}=e_{i,j}^{\′}+e_{i+4M,j}^{\′}+e_{i+8M,j}^{\′},$ 1≤i≤4M，1≤j≤12M；

S105, calculate the offset address matrix E that code check is 3/4 QC-LDPC code ^(3/4), wherein, described matrix E ^(3/4)The displacement index

Computing formula be: $e_{i,j}^{(3/4)}=e_{i,j}^{\′\′}+e_{i+3M,j}^{\′\′}+e_{i+6M,j}^{\′\′}+e_{i+9M,j}^{\′\′},$ 1≤i≤3M，1≤j≤12M；

S106, calculate the offset address matrix E that code check is 5/6 QC-LDPC code ^(5/6), wherein, described matrix E ^(5/6)The displacement index

Computing formula be:

$e_{i,j}^{(5/6)}=e_{i,j}^{\′\′\′}+e_{i+2M,j}^{\′\′\′}+e_{i+4M,j}^{\′\′\′}+e_{i+6M,j}^{\′\′\′}+e_{i+8M,j}^{\′\′\′}+e_{i+10M,j}^{\′},$ 1≤i≤2M，1≤j≤12M；

S107, according to described matrix E ^(1/2)With described submatrix exponent number b, generate code check and be 1/2, code length is the QC-LDPC code of 12M*b,

According to described matrix E ^(2/3)With described submatrix exponent number b, generate code check and be 2/3, code length is the QC-LDPC code of 12M*b,

According to described matrix E ^(3/4)With described submatrix exponent number b, generate code check and be 3/4, code length is the QC-LDPC code of 12M*b,

According to described matrix E ^(5/6)With described submatrix exponent number b, generate code check and be 5/6, code length is the QC-LDPC code of 12M*b.

2. building method according to claim 1 is characterized in that, further comprises step after the step S107:

S108, the numerical value of described submatrix exponent number b is revised as b ', wherein, described submatrix exponent number b ' satisfies

b′≥e _i,j，e′ _i，j，e″ _i，j，e″′ _i，j， $e_{i,j}^{(1/2)},e_{i,j}^{(2/3)},e_{i,j}^{(3/4)},e_{i,j}^{(5/6)};$

S109, according to described matrix E ^(1/2)With described submatrix exponent number b ', generate code check and be 1/2, code length is the QC-LDPC code of 12M*b ',

According to described matrix E ^(2/3)With described submatrix exponent number b ', generate code check and be 2/3, code length is the QC-LDPC code of 12M*b ',

According to described matrix E ^(3/4)With described submatrix exponent number b ', generate code check and be 3/4, code length is the QC-LDPC code of 12M*b ',

According to described matrix E ^(5/6)With described submatrix exponent number b ', generate code check and be 5/6, code length is the QC-LDPC code of 12M*b '.

3. a code modulating method is characterized in that, described code modulating method may further comprise the steps:

S201, employing claim 1 or 2 described building methods for code modulated QC-LDPC code obtain the QC-LDPC code;

S202, utilize described QC-LDPC code, information bit waiting for transmission is encoded, obtain coded-bit;

S203, described coded-bit is carried out bit mapping, obtain the constellation bit vectors;

S204, described constellation bit vectors is carried out constellation mapping, obtain constellation symbol;

S205, described constellation symbol is sent to the subsequent treatment unit.

4. code modulating method according to claim 3 is characterized in that, the code length of described QC-LDPC code is 61440 or 15360.

5. code modulating method according to claim 3 is characterized in that, step S203 specifically comprises:

S203-1, described coded-bit is carried out Bit Interleave, obtain interleaving bits;

S203-2, described interleaving bits is carried out bit permutation, the bit vectors after obtaining replacing, and the bit vectors after the described displacement split, obtain described constellation bit vectors,

Wherein, described bit permutation refers to that all bits that will be mapped in one or more constellation symbol carry out order adjustment.

6. code modulating method according to claim 3 is characterized in that, step S204 specifically comprises:

Described constellation bit vectors is carried out APSK constellation mapping or the qam constellation mapping that M is ordered, obtains described constellation symbol,

Wherein, the value of described M is 4,16,64 or 256.

7. code modulating method according to claim 3 is characterized in that, step S205 further comprises:

Described constellation symbol carried out coordinate interweaves and symbol interleaving, then send to described subsequent treatment unit.

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