CN102868852A - Security camera - Google Patents
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- CN102868852A CN102868852A CN2012103405890A CN201210340589A CN102868852A CN 102868852 A CN102868852 A CN 102868852A CN 2012103405890 A CN2012103405890 A CN 2012103405890A CN 201210340589 A CN201210340589 A CN 201210340589A CN 102868852 A CN102868852 A CN 102868852A
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Abstract
The invention provides a security camera which comprises a case, a camera lens, an image sensor which is connected with the camera lens, a field programmable gate array (FPGA) mainboard which is connected with the image sensor, a photoelectric module which is connected with the FPGA mainboard, an optical fiber interface which is connected with the photoelectric module and a power supply device which is respectively connected with the image sensor, the FPGA mainboard and the photoelectric module, wherein the camera lens, the image sensor, the FPGA mainboard, the photoelectric module, the optical fiber interface and the power supply device are respectively arranged in the case, and the power supply device comprises a battery; the case is a steel case body, tempered glass is installed on the case, the camera lens is installed on the inside of the tempered glass, the optical fiber interface has a round fiber channel (FC) interface with threads and is fixed on the case through three-proofing plastics; and the FPGA mainboard comprises an image encoding and decoding module and a parallel serial and serial parallel converter which is connected with the image encoding and decoding module, and the parallel serial and serial parallel converter is connected with the photoelectric module. The security camera has high safety.
Description
Technical field
The present invention relates to the video camera in intelligent security guard field.
Background technology
High definition security protection industry development is rapid at present, and all trades and professions are all entertained great interest to high-definition video monitoring.But high-definition camera at present on the market substantially all adopts the 12V externally fed, and basic power consumption and need to be with coaxial cable or the transmission of IP network line all more than 5W.This has retrained the demand of special industry to high-definition video monitoring greatly.For example, coal industry, when mine disaster occured, all underground power supplies of at first will breaking were to prevent causing larger disaster owing to the circuit spark.If there is a kind of video camera not to be fixed against externally fed, and also not with electric signal transmission information, with the demand that can solve under this particular surroundings high definition.
Summary of the invention
There is the technical problem of security risk in order to solve existing security monitoring video camera, the invention provides a kind of security monitoring video camera.
The present invention is that the technical scheme that solves the problems of the technologies described above proposition is:
A kind of security monitoring video camera, comprise casing and lay respectively at described casing interior camera lens and the imageing sensor that is connected with described camera lens, also comprise the FPGA mainboard that is connected with described imageing sensor, the optical-electric module that is connected with described FPGA mainboard, the optical fiber interface that is connected with described optical-electric module that lays respectively in the described casing and the electric supply installation that is connected with described imageing sensor, described FPGA mainboard and the optical-electric module of being connected respectively, electric supply installation comprises battery; Described casing is steel shell, on this casing toughened glass is installed, and it is inboard that described camera lens is installed in this toughened glass place, and described optical fiber interface has round threaded FC interface, and this optical fiber interface fixes on the described casing with three anti-plastic solids; Comprise in the described FPGA mainboard that proofreading and correct with 8/10B encoding and decoding for clocking error is connected image coding and decoding module and the parallel series and the staticizer that are connected with this image coding and decoding module, this parallel series is connected with described optical-electric module with staticizer.
Further, comprise the image processing module that is connected between described imageing sensor and the described image coding and decoding module in the described FPGA mainboard.
Further, described image processing module comprises sensor interface, the auto-exposure control unit that is connected with this sensor interface, the image interpolation process unit that is connected with this sensor interface, the Automatic white balance processing unit that is connected with this image interpolation process unit, the color that is connected with this Automatic white balance processing unit strengthens processing unit, the wide dynamic process unit that is connected with this color enhancing processing unit, the color space convert unit that is connected with this wide dynamic process unit, the gammate that is connected with this color space convert unit.
Further, described image coding and decoding module comprises interconnective CTC module and 8/10B coding/decoding module.
Further, described optical-electric module is the wavelength division multiplexing optical module; Described FPGA mainboard comprises respectively reception holding wire and the transmitted signal line of being responsible for transmitting-receiving, this FPGA mainboard by described reception holding wire be connected the transmitted signal line and be connected with described wavelength division multiplexing optical module.
Further, described electric supply installation comprises successively DC/DC switch power module, first order LDO, second level LDO and the third level LDO of serial connection.
Further, described DC/DC switch power module is used for that input voltage is converted to 3.3V voltage to be exported, and its output is to described FPGA mainboard and the power supply of described optical-electric module; The 3.3V voltage transitions that described first order LDO is used for input is that 2.8V voltage is exported, and its output is powered to described imageing sensor; The 2.8V voltage transitions that described second level LDO is used for input is that 1.8V voltage is exported, and its output is powered to described imageing sensor; The 1.8V voltage transitions that described third level LDO is used for input is that 1.2V voltage is exported, and its output is to described FPGA main board power supply.
Further, described electric supply installation comprise be used to the power interface that connects outside 5V power supply and respectively with described battery be connected the detection control circuit that power interface is connected, described detection control circuit is connected with optical-electric module with described imageing sensor, described FPGA mainboard respectively.
Further, when described detection control circuit detected described power interface power supply is arranged, this detection control circuit was controlled this power interface and is connected conducting with described imageing sensor, described FPGA mainboard and the optical-electric module of being connected respectively; When described detection control circuit detected described power interface without power supply, this detection control circuit was controlled described battery and is connected conducting with described imageing sensor, described FPGA mainboard and the optical-electric module of being connected respectively.
Further, described battery adopts 3.7V power supply output; Be provided with the charging inlet that joins with this battery at described casing.
The invention has the beneficial effects as follows: security monitoring video camera of the present invention adopts FPGA independent design ISP function, adopts the 5V electric power system, so that Overall Power Consumption is controlled in the 2W, so that become possibility with powered battery; Also adopt the wavelength division multiplexing optical module, realize the signal transmission of uni-core bidirectional; Structurally use hermetic steel shell, fully waterproof, gas-tight; Only have an optical fiber to be connected with ground, though fibercuts, owing to be light signal, so do not worry causing thus spark yet; Owing to use optical fiber, directly can transmit 70 to 80 kilometers without relaying simultaneously, well solve remote problem.
Description of drawings
Fig. 1 is embodiment of the invention security monitoring video camera structural representation block diagram;
Fig. 2 is the FPGA mainboard structure schematic block diagram of embodiment of the invention security monitoring video camera;
Fig. 3 is the image processing module structural representation block diagram of embodiment of the invention security monitoring video camera;
Fig. 4 is the image coding and decoding modular structure schematic block diagram of embodiment of the invention security monitoring video camera;
Fig. 5 is the schematic diagram of the clock jitter removing mode that adopts of the image coding and decoding module of embodiment of the invention security monitoring video camera;
Fig. 6 is parallel series and the staticizer structural representation of embodiment of the invention security monitoring video camera;
Fig. 7 is the circuit diagram that the step pressure reducing method of embodiment of the invention security monitoring video camera relates to;
Fig. 8 is the part-structure schematic block diagram of the electric supply installation of embodiment of the invention security monitoring video camera.
Embodiment
The present invention is further described below in conjunction with description of drawings and embodiment.
As shown in Figure 1, the security monitoring video camera of present embodiment comprises casing 1 and is connected in the casing 1 with lower member: camera lens 2, the imageing sensor 3 that is connected with camera lens 2, the FPGA mainboard 4 that is connected with imageing sensor 3, the optical-electric module 5 that is connected with FPGA mainboard 4, the optical fiber interface 6 that is connected with optical-electric module 5 and are connected the electric supply installation 7 that is connected with optical-electric module with imageing sensor 3, FPGA mainboard 4 respectively; Electric supply installation 7 comprises battery 71; Casing 1 is steel shell, and its front portion is equipped with toughened glass, and it is inboard that camera lens 2 is installed in casing 1 interior toughened glass, optical fiber interface 6 adopts round threaded FC interface, prevents that with three plastic solids fix on the rear end of casing 1, like this, make casing 1 form the housing of a sealing, and fire prevention, waterproof.As shown in Figure 2, comprise in the FPGA mainboard 4 that proofreading and correct with 8/10B encoding and decoding for clocking error is connected image coding and decoding module 42 and the parallel series that is connected with image coding and decoding module 42 and staticizer 43, parallel series is connected with optical-electric module 5 with staticizer 43.
Preferably, as shown in Figure 2, comprise the image processing module 41 that is connected between imageing sensor 3 and the image coding and decoding module 42 in the FPGA mainboard 4.As shown in Figure 3, image processing module 41 comprises sensor interface 411, the auto-exposure control unit 412 that is connected with this sensor interface 411, the image interpolation process unit 413 that is connected with this sensor interface 411, the Automatic white balance processing unit 414 that is connected with this image interpolation process unit 413, the color that is connected with this Automatic white balance processing unit 414 strengthens processing unit 415, strengthen the wide dynamic process unit 416 that processing unit 415 is connected with this color, the color space convert unit 417 that is connected with this wide dynamic process unit 416, the gammate 418 that is connected with this color space convert unit 417.Sensor interface 411 is used for docking with imageing sensor 3; 41 pairs of vedio datas of image processing module carry out respectively automatic exposure, interpolation, Automatic white balance, color enhancing, wide dynamic process, color space convert and gamma correction process, to obtain the high-quality video image.
42 pairs of image processing modules of image coding and decoding module 41 transmission and the video image that arrives encodes to be more suitable for Optical Fiber Transmission, as shown in Figure 4, image coding and decoding module 42 comprises and interconnects the Correction to CTC(Clock Tolerance that clocking error is proofreaied and correct) module 421 and 8/10B coding/decoding module 422.421 pairs of vision signals of CTC module are carried out clocking error and are proofreaied and correct, it is the transmission key point, as shown in Figure 5, it adopts standing procedure, VCXO(Voltage Controlled X'tal Oscillator, voltage-controlled clock shakes) clock jitter removing, make receiving end recover reliably originating data, can well reduce the error rate of receiving terminal and reduce the clock scheme cost; 422 pairs of 8/10B coding/decoding modules are from 421 transmission of CTC module and the encoding video signal of the 8bit data width that arrives, make it convert the vision signal of 10bit data width to, to reach the balance of transmission level, prevent that continuous level "0" and level"1" from occurring, strengthen the stability of data and assist the better receive data of receiving end; Transfer to again parallel series and staticizer 43 carries out parallel-serial conversion.8/10B coding/decoding module 422 also can be to the decoding video signal of the 10bit data width that arrives from 43 transmission of parallel series and staticizer, make its vision signal that converts the 8bit data width to, again it is exported to CTC module 421 and carry out clocking error and proofread and correct backward outer output.
As shown in Figure 6, the parallel data of the 10bit width that parallel series and staticizer 43 will arrive from 42 transmission of image coding and decoding module converts the serial continuous data of 1bit width to, exports to optical-electric module 5 again; Parallel series and staticizer 43 also can be converted to the serial data of sending from optical-electric module 5 parallel data of 10bit width, send to coding/decoding module 42 again.
Preferably, as shown in Figure 1, optical-electric module 5 is the wavelength division multiplexing optical module.FPGA mainboard 4 also can receive distal fiber and send the signal that comes to from optical fiber interface 6, finishes such as switch video camera, switch light compensating lamp, increases some video parameters etc. function of audio frequency, control video camera.Adopt low-power consumption FPGA mainboard 4 to finish ISP(Image Signal Processing, picture signal is processed) function, and the SERDES(parallel series and staticizer with transmitted in both directions function that carry with FPGA) be connected the wavelength division multiplexing optical module, FPGA mainboard 4 cooperates the bidirectional optical fiber transmission video signal, and using the wavelength division multiplexing optical module to realize the transmission mechanism of single fiber bi-directional, realization FPGA mainboard 4 docks with two-way optical-electric module.So-called two-way, be that FPGA mainboard 4 has one one receipts two pairs of holding wires (namely receiving holding wire and transmitted signal line), these two pairs of holding wires are received on the wavelength division multiplexing optical module, the wavelength division multiplexed light inside modules has optic wavelength division multiplexing function, and its photosynthetic light beam that becomes with sending and receiving transmits at an optical fiber.
Preferably, battery 71 adopts 3.7 volts of power supply outputs.The power supply of imageing sensor 3, FPGA mainboard 4 and wavelength division multiplexing optical module is all less than or equal to 3.3 volts.Battery 71 sides also are provided with charging inlet 71a, can charge to battery 71 by it.The voltage drop method that existing supply power mode adopts normally directly produces 3.3V, 2.8V, 1.8V, 1.2V etc. by the 5V power supply, has increased greatly thermal losses and power supply Wen Bo for no reason in power supply step-down process.And the security monitoring video camera of present embodiment adopts two kinds of Power supplies, as shown in Figure 1, be that electric supply installation 7 not only comprises battery 71, also comprise be used to the power interface 72 that connects outside 5V power supply, judging environment when FPGA mainboard 4 powers when normal, FPGA mainboard 4 control plugged interfaces 72 are to use outside 5V power supply, and when FPGA mainboard 4 judged that adverse circumstances occur, 4 controls of FPGA mainboard were connected inner 3.7V battery 71 with power supply; As shown in Figure 7, electric supply installation 7 also comprises respectively with battery 71 is connected the DC/DC(DC-DC that is connected with power interface) switch power module 73, and the first order LDO(Low Dropout Regulator that is connected in series successively, low pressure difference linear voltage regulator) 741, second level LDO 742 and third level LDO 743, the input of described first order LDO 741 is connected with the output of DC/DC switch power module 73.DC/DC switch power module 73 is used for that input voltage is converted to 3.3V voltage to be exported, and its output is to FPGA mainboard 4 and optical-electric module 5 power supplies, and its efficient can reach 95%; The 3.3V voltage transitions that first order LDO 741 is used for input is that 2.8V voltage is exported, and its output is to imageing sensor 3 power supplies; The 2.8V voltage transitions that second level LDO 742 is used for input is that 1.8V voltage is exported, and its output is to imageing sensor 3 power supplies; The 1.8V voltage transitions that third level LDO 743 is used for input is that 1.2V voltage is exported, and its output is to 4 power supplies of FPGA mainboard.Adopt such step pressure reducing method, can greatly save because LDO plays the loss that High Pressure Difference is brought when 5V changes to 3.3V or 1.2V, the step pressure reducing method can be so that the thermal losses of power supply be minimum, and so that the civilian ripple of power supply is minimum, the little energy of caloric value is to the more stable environment of video camera, and the power supply of low Wen Bo makes signal quality better.Because the internal system power supply can ensure that all less than or equal to 3.3V Overall Power Consumption is minimum, measuring and calculating video camera Overall Power Consumption out is less than 2W at present.Can be according to the battery of the length customization different capabilities of video camera service time.
Preferably, the security monitoring video camera of present embodiment selects to adopt the ORing mode in power supply, as shown in Figure 8, electric supply installation 7 comprises with battery 71 is connected the detection control circuit 75 that is connected with power interface, battery 71 continues to think that to detecting control circuit 75 power supplies it provides working power, detects control circuit 75 and is connected with optical-electric module with imageing sensor 3, FPGA mainboard 4 respectively and is connected.Detect control circuit 75 by battery 71 power supplies, if when detecting control circuit 75 and detect the outside power supply is arranged, thereby then gating power interface 72 make externally fed to main frame to save battery electric quantity, when namely detecting power interface 72 places power supply being arranged, detect control circuit 75 control power interfaces 72 and be connected conducting with being connected with optical-electric module with imageing sensor 3, FPGA mainboard 4 respectively; Detect the outside time of power supply that do not have if detect control circuit 75, then 71 power supplies of gating battery are to main frame, when namely detecting power interface 72 without power supply, detect control circuit 75 control batteries 71 and be connected conducting with being connected with optical-electric module with imageing sensor 3, FPGA mainboard 4 respectively.Like this, can be implemented in environment and power and use externally fed in the normal situation, when adverse circumstances occur, use the internal cell power supply; And, also realized intelligent power saving.
Also adopt in addition following power saving mode, when system was in holding state, the power supply of FPGA mainboard 4 closing image transducers 3 was also closed system's master frequency generator.Optical-electric module 5 and parallel series and staticizer 43 adopt burst mode (BMR in addition, burst mode receiver), burst mode is in the 4 interior realizations of FPGA mainboard, whether the receiving terminal that is mainly used to detect optical-electric module 5 receives light signal, if receive light signal, with regard to wake-up master, then the control signal that transmits according to the outside is opened the imageing sensor power supply, provide work clock etc. work, if do not receive light signal, optical-electric module 5 is in little electric supply condition, only have FPGA mainboard 4 to keep sleep state this moment under the 1.2V ultralow pressure, in case have light signal to enter optical-electric module 5 by optical fiber, FPGA mainboard 4 is activated, the synchronous external signal of FPGA mainboard 4 beginnings, according to the value of judging the signal that optical-electric module 5 transmits, judge whether it is that the identification information of signal the inside is used as foundation, wake step by step the high-frequency clock module of imageing sensor 3 and FPGA mainboard 4 inside up: first to imageing sensor 3 power supplies, and then the transmission clock signal is to imageing sensor 3; For the functional module of FPGA mainboard 4 inside, realize by the switch clock signal.Greatly saved battery power consumption by this mode.
Preferably, on casing 1, also be provided with the charging inlet 76 that joins with battery 71 on battery 71 sides, can charge to battery 71 by it.
As above institute's cloud is the further description of the present invention being done in conjunction with concrete preferred implementation, can not assert that implementation of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, under the prerequisite that does not break away from design of the present invention and intension, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (10)
1. security monitoring video camera, comprise casing (1) and lay respectively at described casing (1) interior camera lens (2) and the imageing sensor (3) that is connected with described camera lens (2), it is characterized in that: also comprise the FPGA mainboard (4) that is connected with described imageing sensor (3) that lays respectively in the described casing (1), the optical-electric module (5) that is connected with described FPGA mainboard (4), the optical fiber interface (6) that is connected with described optical-electric module (5) and respectively with described imageing sensor (3), described FPGA mainboard (4) be connected the electric supply installation (7) that optical-electric module (5) connects, electric supply installation (7) comprises battery (71); Described casing (1) is steel shell, this casing is equipped with toughened glass on (1), it is inboard that described camera lens (2) is installed in this toughened glass place, and described optical fiber interface (6) has round threaded FC interface, and this optical fiber interface (6) fixes on the described casing (1) with three anti-plastic solids; Comprise in the described FPGA mainboard (4) that proofreading and correct with 8/10B encoding and decoding for clocking error is connected image coding and decoding module (42) and the parallel series and the staticizer (43) that are connected with this image coding and decoding module (42), this parallel series is connected with described optical-electric module (5) with staticizer (43).
2. security monitoring video camera according to claim 1 is characterized in that: comprise the image processing module (41) that is connected between described imageing sensor (3) and the described image coding and decoding module (42) in the described FPGA mainboard (4).
3. security monitoring video camera according to claim 2, it is characterized in that: described image processing module (41) comprises sensor interface (411), the auto-exposure control unit (412) that is connected with this sensor interface (411), the image interpolation process unit (413) that is connected with this sensor interface (411), the Automatic white balance processing unit (414) that is connected with this image interpolation process unit (413), the color that is connected with this Automatic white balance processing unit (414) strengthens processing unit (415), strengthen the wide dynamic process unit (416) that processing unit (415) is connected with this color, the color space convert unit (417) that is connected with this wide dynamic process unit (416), the gammate (418) that is connected with this color space convert unit (417).
4. security monitoring video camera according to claim 1, it is characterized in that: described image coding and decoding module (42) comprises interconnective CTC module (421) and 8/10B coding/decoding module (422).
5. security monitoring video camera according to claim 1, it is characterized in that: described optical-electric module (5) is the wavelength division multiplexing optical module; Described FPGA mainboard (4) comprises respectively reception holding wire and the transmitted signal line of being responsible for transmitting-receiving, this FPGA mainboard (4) by described reception holding wire be connected the transmitted signal line and be connected with described wavelength division multiplexing optical module.
6. security monitoring video camera according to claim 1 is characterized in that: described electric supply installation (7) comprises successively DC/DC switch power module (73), the first order LDO(741 of serial connection), second level LDO(742) and third level LDO(743).
7. security monitoring video camera according to claim 6, it is characterized in that: described DC/DC switch power module (73) is used for that input voltage is converted to 3.3V voltage to be exported, and its output is to described FPGA mainboard (4) and described optical-electric module (5) power supply; Described first order LDO(741) the 3.3V voltage transitions that is used for input is that 2.8V voltage is exported, and its output is powered to described imageing sensor (3); Described second level LDO(742) the 2.8V voltage transitions that is used for input is that 1.8V voltage is exported, and its output is powered to described imageing sensor (3); Described third level LDO(743) the 1.8V voltage transitions that is used for input is that 1.2V voltage is exported, and its output is powered to described FPGA mainboard (4).
8. security monitoring video camera according to claim 1, it is characterized in that: described electric supply installation (7) comprise be used to the power interface (72) that connects outside 5V power supply and respectively with described battery (71) be connected the detection control circuit (75) that power interface (72) is connected, described detection control circuit (75) is connected 5 with described imageing sensor (3), described FPGA mainboard (4) with optical-electric module respectively) be connected.
9. security monitoring video camera according to claim 8, it is characterized in that: when described detection control circuit (75) detects described power interface (72) when power supply is arranged, this detection control circuit (75) is controlled this power interface (72) and is connected conducting with described imageing sensor (3), described FPGA mainboard (4) and the optical-electric module (5) of being connected respectively; When described detection control circuit (75) detected described power interface (72) without power supply, this detection control circuit (75) was controlled described battery (71) and is connected conducting with described imageing sensor (3), described FPGA mainboard (4) and the optical-electric module (5) of being connected respectively.
10. according to the described security monitoring video camera of above arbitrary claim, it is characterized in that: described battery (71) adopts 3.7V power supply output; Be provided with the charging inlet (76) that joins with this battery (71) at described casing (1).
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| CN2012103405890A CN102868852A (en) | 2012-09-14 | 2012-09-14 | Security camera |
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| CN2012103405890A CN102868852A (en) | 2012-09-14 | 2012-09-14 | Security camera |
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| CN112083257A (en) * | 2020-09-22 | 2020-12-15 | 中国科学院长春光学精密机械与物理研究所 | CMOS image sensor's testing arrangement |
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| CB02 | Change of applicant information |
Address after: 518000, Guangdong, Shenzhen province Futian District Shennan Avenue and the junction of agricultural road, northeast side Times Technology Building No. 20, building 2009 Applicant after: Qihan Technology Co., Ltd. Address before: 518000, Guangdong, Shenzhen province Futian District Shennan Avenue and the junction of agricultural road, northeast side Times Technology Building No. 20, building 2009 Applicant before: QIHAN TECHNOLOGY CO., LTD. |
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| COR | Change of bibliographic data | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20130109 |
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| WD01 | Invention patent application deemed withdrawn after publication |