CN102867072A - Power inspection system and power inspection method for printed circuit board - Google Patents
Power inspection system and power inspection method for printed circuit board Download PDFInfo
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- CN102867072A CN102867072A CN2011101855253A CN201110185525A CN102867072A CN 102867072 A CN102867072 A CN 102867072A CN 2011101855253 A CN2011101855253 A CN 2011101855253A CN 201110185525 A CN201110185525 A CN 201110185525A CN 102867072 A CN102867072 A CN 102867072A
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Abstract
The invention provides a power inspection system for a PCB (printed circuit board). The system reads a layout file of the PCB from a memory of a computer, and analyzes the layout file to obtain copper foil distribution of a power area and a grounding area of each layer of the PCB. Afterwards, the system calculates the length and the sectional area of copper foils in the power area and the grounding area of each layer of the PCB with current flowing from a power supply module to a load chip on the PCB according to copper foil distribution obtained by means of analysis, and calculates power consumption of each layer of the PCB according to the calculated length, the calculated sectional area, resistivity and preset parameters of the copper foils. When power consumption of a certain layer of the PCB exceeds a preset standard, the system positions the power area and the grounding area of the layer on the layout file and prompts a user to modify copper foil layout in the positioned areas. The invention further provides a power inspection method for the PCB.
Description
Technical field
The present invention relates to a kind of printed circuit board (PCB) (printed circuit board, PCB) aided design system and method, especially about a kind of PCB power inspection system and method.
Background technology
Printed circuit board (PCB) (printed circuit board, PCB) production procedure generally is to design first PCB layout (layout), make the PCB model according to the PCB layout again, stamp part, then deliver the efficiency requirements whether lab investigation PCB model satisfies the client.If do not satisfy the demands, then rule of thumb revise the PCB layout.
Help to carry out analysis on the efficient owing to lacking effective instrument, whether design department usually all must wait until when the PCB model is sent actual measurement back to, could understand PCB efficient and can meet the requirements; Which place need to be done when improving understanding the PCB layout, can only revise with experience, often is to improve limitedly, and the probability of doing over again is high.
Summary of the invention
In view of above content, be necessary to provide a kind of PCB power inspection system and method, can before PCB re-packs, estimate efficient and whether can meet customer need, the part that location PCB layout need to be revised is with the problem of avoiding the PCB design to do over again.
A kind of P.e.c. power output plate inspection system.This system comprises a series of functional modules.Utilize these functional modules, this system reads the cloth map file of printing board PCB from the storer of computing machine, analyzes this cloth map file and obtains the power supply area of the every one deck of this PCB and the Copper Foil distribution situation of ground area.Afterwards, the Copper Foil distribution situation that this system obtains according to analysis calculate electric current from the upper supply module of this PCB to supported chip length and the sectional area of Copper Foil of the power supply area of the upper every one deck of this PCB of process or ground area, and the power consumption of calculating the every one deck of this PCB according to length, sectional area and resistivity and the parameter preset of the Copper Foil that calculates.When the power consumption of this PCB one deck surpassed preset standard, this system was in power supply area and the ground area of this layer of described cloth map file location, and prompting user is made amendment to the Copper Foil layout of locating area.
A kind of P.e.c. power output plate inspection method, the method comprises: the cloth map file that (A) reads printing board PCB from the storer of computing machine; (B) Butut analytical procedure: analyze this cloth map file, obtain the power supply area of the every one deck of this PCB and the Copper Foil distribution situation of ground area; (C) the Copper Foil distribution situation that obtains according to analysis calculate electric current from the upper supply module of this PCB to supported chip length and the sectional area of Copper Foil of the power supply area of the upper every one deck of this PCB of process or ground area; (D) according to length, sectional area and the resistivity of the Copper Foil that calculates and the power consumption that parameter preset calculates the every one deck of this PCB; (E) judge that whether the power consumption of the every one deck of this PCB is above preset standard; And (F) when the power consumption of this PCB one deck surpasses preset standard, in power supply area and the ground area of this layer of described cloth map file location, and prompting user is made amendment to the Copper Foil layout of locating area.
Compared to prior art, whether PCB power inspection system provided by the invention and method can estimate efficient and can meet customer need before PCB re-packs, and the part that location PCB layout need to be revised is to avoid designing the problem of doing over again.
Description of drawings
Fig. 1 is the applied environment figure of PCB power inspection system of the present invention preferred embodiment.
Fig. 2 is the functional block diagram of PCB power inspection system of the present invention preferred embodiment.
Fig. 3 is the process flow diagram of PCB power inspection method of the present invention preferred embodiment.
Fig. 4 is the schematic diagram of electric current from the upper supply module of PCB to load IC.
The main element symbol description
| Computing machine | 100 |
| Storer | 10 |
| Processor | 20 |
| PCB power inspection system | 30 |
| The file read module | 31 |
| The Butut analysis module | 32 |
| |
33 |
| Judge module | 34 |
| Reminding module | 35 |
| PCB cloth map file | 40 |
| Display | 50 |
| |
200 |
| |
201 |
| Load IC | 202 |
| |
21 |
| The |
22 |
| The |
23 |
Following embodiment further specifies the present invention in connection with above-mentioned accompanying drawing.
Embodiment
Consulting shown in Figure 1ly, is the applied environment figure of printed circuit board (PCB) of the present invention (printed circuit board, PCB) power inspection system preferred embodiment.This PCB power inspection system 30 is applied to computing machine 100.This computing machine 100 also comprises storer 10, processor 20 and display 50.The various PCB of storer 10 storages, for example PCB cloth map file 40 of PCB 200, and the sequencing code of PCB power inspection system 30.Processor 20 is carried out described sequencing code, realizes the following function that PCB power inspection system 30 provides.Display 50 shows PCB cloth map file 40.
Consulting shown in Figure 2ly, is the functional block diagram of PCB power inspection system of the present invention 30 preferred embodiments.This PCB power inspection system 30 comprises file read module 31, Butut analysis module 32, computing module 33, judge module 34 and reminding module 35.The alleged module of the present invention can be the hardware chip that is made of a plurality of electronic devices and components, also can be the computer program code segments that is comprised of the series of computation instruction.The described module of the present embodiment is a kind of can be by the processor 20 of computing machine 100 performed and can finish the computer program code segments of fixed function, and it is stored in the storer 10 of computing machine 100.
File read module 31 is used for reading described PCB cloth map file 40 from storer 10.
Butut analysis module 32 is used for analyzing this PCB cloth map file 40, obtains the power supply area 21 of the every one deck of PCB200 and the Copper Foil distribution situation of ground area 23 (consulting shown in Figure 4).PCB cloth map file 40 comprises the cabling layout of PCB 200 each layers and the layout of the upper part of PCB200.
The number of plies of PCB refers to that PCB has the number of plies of Copper Foil that can separate cabling.For example, multi-layer PCB may comprise a plurality of signals layers, bus plane, stratum etc.Every one deck all comprises one or more power supply areas or the ground area that is covered with Copper Foil.But via is the hole that PCB goes up some fillings or wrapped up conductive material, is the electrical connection between the different layers cabling in the multi-layer PCB.These holes can connect power supply area or the ground area between the multi-layer PCB, allow electric current smoothly by each layer of PCB.The loss of PCB power mainly is derived from the impedance of each layer Copper Foil.
The Copper Foil distribution situation that computing module 33 is used for obtaining according to analysis is calculated length L and the sectional area A of the Copper Foil of the power supply area 21 of every one deck on the PCB 200 of electric current (integrated chip, IC) 202 (such as CPU, internal memory etc.) process from supply module 201 on the PCB 200 to supported chip or ground area 23.As shown in Figure 4, arrow represents direction of current, and PCB 200 some signals layers comprise power supply area 21, signal wire zone 22 and ground area 23.Electric current arrives load IC 202 communication channel routed over electrical source regions 21 or ground area 23 from supply module 201.Because Copper Foil distribution shape and the thickness of power supply area 21 or ground area 23 are irregular, therefore computing module 33 may need to utilize certain mathematical method, infinitesimal analysis for example calculates length L and the sectional area A of the Copper Foil of electric current 202 communication channel routed over electrical source regions 21 or ground area 23 from supply module 201 to load IC.
Judge module 34 is used for judging whether the power consumption DCR of the every one deck of PCB surpasses preset standard.This preset standard can be a relative standard, for example, the power consumption DCR that supposes PCB 200 some signals layers is more than or equal to 10 times of the power consumption DCR of other certain one deck, and then judge module 34 judges that the power consumption DCR of these signals layers surpasses preset standard.This preset standard also can be concrete numerical value, for example a 7.13776e-6.
Reminding module 35 is used for when the power consumption DCR of PCB 200 certain one deck surpasses preset standard, power supply area 21 and ground area 23 at PCB cloth map file 40 these layers of location, prompting user is made amendment to the Copper Foil layout of power supply area 21 and ground area 23, for example adjusts length L or the sectional area A of Copper Foil.
Consulting shown in Figure 3ly, is the process flow diagram of PCB power inspection method of the present invention preferred embodiment.
Step S31, file read module 31 reads described PCB cloth map file 40 from storer 10.
Step S32, Butut analysis module 32 is analyzed this PCB cloth map file 40, obtains the power supply area 21 of PCB 200 every one decks and the Copper Foil distribution situation of ground area 23.PCB cloth map file 40 comprises the layout of part on the cabling layout of PCB 200 each layers and the PCB 200.
The Copper Foil distribution situation that step S33, computing module 33 obtain according to analysis is calculated length L and the sectional area A of the Copper Foil of the power supply area 21 of every one deck on the PCB 200 of electric current from supply module 201 on the PCB 200 to load IC 202 (such as CPU, internal memory etc.) process or ground area 23.As shown in Figure 4, arrow represents direction of current, and PCB 200 some signals layers comprise power supply area 21, signal wire zone 22 and ground area 23.Electric current arrives load IC202 from supply module 201 communication channel routed over electrical source regions 21 or ground area 23.
Step S34, the power consumption DCR of length L, sectional area A and the resistivity p of the Copper Foil that computing module 33 bases calculate and the every one deck of calculation of parameter PCB that sets in advance.The described parameter that sets in advance comprises the supply voltage of supply module 201, the demand current of load IC 202.For example, in the present embodiment, the supply voltage that supply module 201 is set is 1 volt, and the demand current of load IC 202 is 1 ampere, then power consumption DCR=p*L/A.The power consumption DCR of the every one deck of PCB equals the power consumption DCR of this layer power supply area 21 and the power consumption DCR sum of ground area 23.
Step S35, judge module 34 judge that whether the power consumption DCR of PCB 200 every one decks surpasses preset standard, and whether the power consumption DCR that for example judges PCB 200 some signals layers is more than or equal to 10 times of the power consumption DCR of other certain one deck.If the power consumption DCR of PCB 200 every one decks does not surpass preset standard, then flow process finishes.If the power consumption DCR of PCB 200 certain one deck surpasses preset standard, then execution in step S36.
Step S36, reminding module 35 be in power supply area 21 and the ground area 23 of these layers of PCB cloth map file 40 location, and prompting user makes amendment to the Copper Foil layout of power supply area 21 and ground area 23, for example adjusts length L or the sectional area A of Copper Foil.
It should be noted that at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although with reference to preferred embodiment the present invention is had been described in detail, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and scope of technical solution of the present invention.
Claims (8)
1. a P.e.c. power output plate inspection system is characterized in that, this system comprises:
The file read module is for the cloth map file that reads printing board PCB from the storer of computing machine;
The Butut analysis module is used for analyzing this cloth map file, obtains the power supply area of the every one deck of this PCB and the Copper Foil distribution situation of ground area;
Computing module, the Copper Foil distribution situation that is used for obtaining according to analysis calculate electric current from the upper supply module of this PCB to supported chip length and the sectional area of Copper Foil of the power supply area of the upper every one deck of this PCB of process or ground area, and the power consumption of calculating the every one deck of this PCB according to length, sectional area and resistivity and the parameter preset of the Copper Foil that calculates;
Judge module is used for judging whether the power consumption of the every one deck of this PCB surpasses preset standard; And
Reminding module is used for when the power consumption of this PCB one deck surpasses preset standard, and in power supply area and the ground area of this layer of described cloth map file location, and prompting user is made amendment to the Copper Foil layout of locating area.
2. P.e.c. power output plate inspection system as claimed in claim 1 is characterized in that, the power consumption of the every one deck of this PCB equals the power consumption of this layer power supply area and the power consumption sum of ground area.
3. P.e.c. power output plate inspection system as claimed in claim 1 is characterized in that, described parameter preset comprises the demand current of supply voltage and the supported chip of supply module.
4. P.e.c. power output plate inspection system as claimed in claim 1 is characterized in that, described computing module utilizes the method for infinitesimal analysis to calculate length and the sectional area of the Copper Foil of electric current from supply module to supported chip communication channel routed over electrical source region or ground area.
5. a P.e.c. power output plate inspection method is characterized in that, the method comprises:
File read step: the cloth map file that reads printing board PCB from the storer of computing machine;
Butut analytical procedure: analyze this cloth map file, obtain the power supply area of the every one deck of this PCB and the Copper Foil distribution situation of ground area;
The first calculation procedure: the Copper Foil distribution situation that obtains according to analysis calculate electric current from the upper supply module of this PCB to supported chip length and the sectional area of Copper Foil of the power supply area of the upper every one deck of this PCB of process or ground area;
The second calculation procedure: the power consumption of calculating the every one deck of this PCB according to length, sectional area and resistivity and the parameter preset of the Copper Foil that calculates;
Determining step: whether the power consumption of judging the every one deck of this PCB surpasses preset standard; And
The prompting step: when the power consumption of this PCB one deck surpassed preset standard, in power supply area and the ground area of this layer of described cloth map file location, and prompting user was made amendment to the Copper Foil layout of locating area.
6. P.e.c. power output plate inspection method as claimed in claim 5 is characterized in that, the power consumption of the every one deck of this PCB equals the power consumption of this layer power supply area and the power consumption sum of ground area.
7. P.e.c. power output plate inspection method as claimed in claim 5 is characterized in that, described parameter preset comprises the demand current of supply voltage and the supported chip of supply module.
8. P.e.c. power output plate inspection method as claimed in claim 5 is characterized in that, the length and the sectional area that calculate the Copper Foil of electric current from supply module to supported chip communication channel routed over electrical source region or ground area are the methods of taking infinitesimal analysis.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101855253A CN102867072A (en) | 2011-07-04 | 2011-07-04 | Power inspection system and power inspection method for printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101855253A CN102867072A (en) | 2011-07-04 | 2011-07-04 | Power inspection system and power inspection method for printed circuit board |
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| CN102867072A true CN102867072A (en) | 2013-01-09 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011101855253A Pending CN102867072A (en) | 2011-07-04 | 2011-07-04 | Power inspection system and power inspection method for printed circuit board |
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| Country | Link |
|---|---|
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Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201015188Y (en) * | 2006-10-18 | 2008-01-30 | 深圳国人通信有限公司 | Linear power amplifier device |
-
2011
- 2011-07-04 CN CN2011101855253A patent/CN102867072A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201015188Y (en) * | 2006-10-18 | 2008-01-30 | 深圳国人通信有限公司 | Linear power amplifier device |
Non-Patent Citations (2)
| Title |
|---|
| 张辉: "高速印刷电路板的设计及DDR2仿真", 《中国优秀硕士学位论文全文数据库（电子期刊）.信息科技辑》 * |
| 李艳星: "对基于CAD的印刷电路板仿真与检测", 《中国优秀硕士学位论文全文数据库（电子期刊）.信息科技辑》 * |
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Application publication date: 20130109 |