CN102842519B - Method for growing silicon wafer film - Google Patents
Method for growing silicon wafer film Download PDFInfo
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- CN102842519B CN102842519B CN201110172057.6A CN201110172057A CN102842519B CN 102842519 B CN102842519 B CN 102842519B CN 201110172057 A CN201110172057 A CN 201110172057A CN 102842519 B CN102842519 B CN 102842519B
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Abstract
The invention discloses a method for growing a silicon wafer film. The method comprises the steps as follows: measuring a film thickness ratio of the center to the periphery of a control silicon wafer; growing the film for the first time on the silicon wafer by utilizing the thickness ratio; carrying out photoresist spin-coating on the film grown for the first time; exposing the periphery of the silicon wafer by utilizing a silicon wafer periphery exposure system, developing and removing photoresist partially; etching to partially remove the silicon wafer film; and after removing residual photoresist, growing the film for the second time by utilizing the thickness ratio, and enabling the film to have required thickness by growing the film twice. According to the method, the film thicknesses in the center and at the periphery of the film grown on the silicon wafer are uniform, the failure rate of chips at the periphery of the silicon wafer is reduced, and the finished product rate of products is increased.
Description
Technical field
The present invention relates to semiconductor integrated circuit and manufacture field, particularly relate to a kind of growing method of silicon wafer film.
Background technology
Film growth is a kind of very important technique in semiconductor fabrication, and the performance of thickness to semiconductor device of film plays vital effect.Along with the increase of die size, the technical requirement of film growth is more and more higher, and due to the capabilities limits of film growth apparatus, the homogeneity problem of the film thickness of wafer center position and peripheral position becomes outstanding.
As shown in Figure 1 and Figure 2, in process of production, often can cause the chip failure of silicon chips periphery due to the problem of this non-uniform film thickness, thus affect the rate of finished products of product.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of growing method of silicon wafer film, makes film middle position and the peripheral position consistency of thickness of product grown above silicon, reduces the failure rate of product silicon chips periphery chip, improves the rate of finished products of product.
For solving the problems of the technologies described above, the growing method of silicon wafer film of the present invention, manufacture the product silicon chip that the final film thickness of a slice is T, comprise the following steps:
(1) record the film thickness of a monitoring silicon chip, the film thickness of its middle position is a, and the film thickness of peripheral position is b, and the film thickness of middle position and peripheral position is than being a/b;
During a/b>1, step is as follows:
(2) on product silicon chip, carry out first time film growth, make the film thickness of product wafer center position be T (a/b-1), the film thickness of product silicon chips periphery position is T (1-b/a);
(3) on the film of first time growth, negative photoresist spin coating is carried out;
(4) utilize silicon chips periphery exposure system to expose product silicon chips periphery position, removed by the photoresist of product wafer center position after development, the photoresist of peripheral position retains;
(5) removed by the film of product wafer center position by etching, the film of peripheral position retains;
(6), after removing the photoresist of peripheral position, carry out second time film growth, make the film thickness of product wafer center position be T.
Now, the film of product silicon chips periphery position comprises two parts, a part is the film of the peripheral position of second time film growth, its thickness is Tb/a, another part is the film of the peripheral position that first time film growth stays, its thickness is T (1-b/a), and both total film thicknesses are Tb/a+T (1-b/a)=T, consistent with product wafer center position film thickness.
As a/b<1, step is as follows:
(7) on product silicon chip, carry out first time film growth, make the film thickness of product wafer center position be T (1-a/b), the film thickness of product silicon chips periphery position is T (b/a-1);
(8) on the film of first time growth, positive photoresist spin coating is carried out;
(9) utilize silicon chips periphery exposure system to expose silicon chips periphery position, removed by the photoresist of product silicon chips periphery position after development, the photoresist of middle position retains;
(10) film of product silicon chips periphery position etching removed by etching, the film of middle position retains;
(11), after removing the photoresist of middle position, carry out second time film growth, make the film thickness of product wafer center position be Ta/b, the film thickness of periphery is T.
Now, the film of product wafer center position comprises two parts, a part is the film of the middle position of second time film growth, its thickness is Ta/b, another part is the film of the middle position that first time film growth stays, its thickness is T (1-a/b), and both total film thicknesses are Ta/b+T (1-a/b)=T, consistent with the film thickness of product silicon chips periphery position.
Described film is silicon dioxide, silicon nitride, carborundum, tungsten silicide, metallic aluminium, tungsten, germanium silicon or germanium silicon-carbon.
Described first time film growth and second time film growth adopt the growth of chemical vapor deposition, physical vapor deposition or boiler tube heat.
The thickness range of described first time film growth and second time film growth is 10 dust to 100000 dusts.
In step (3), step (8), described photoresist is the photoresist of 436 nanometers, 365 nanometers, 248 nanometers, 193 nanometers.
In step (4), step (9), the width range of peripheral position exposure is 0.5 millimeter to 30 millimeters.
Silicon wafer film growing method of the present invention, the film middle position of product grown above silicon can be made through first time film growth consistent with the film thickness of peripheral position with second time film growth, reduce the failure rate of product silicon chips periphery chip, improve the rate of finished products of product.
Accompanying drawing explanation
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:
Fig. 1 is the silicon chip schematic diagram of middle position film higher than peripheral position film.
Fig. 2 is the silicon chip schematic diagram of peripheral position film higher than middle position film.
Fig. 3 is the schematic flow sheet of the inventive method.
Fig. 4 A to Fig. 4 E is the schematic diagram of first embodiment of the invention.
Fig. 5 A to Fig. 5 E is the schematic diagram of second embodiment of the invention.
Description of symbols in figure
1 is product silicon chip 2 is films of wafer center position
3 is films of silicon chips periphery position
4 be first time film growth wafer center position film
5 be first time film growth silicon chips periphery position film
6 is negative photoresists 6.1 is negative photoresists of middle position
6.2 is negative photoresists of peripheral position
7 be second time film growth wafer center position film
8 be second time film growth silicon chips periphery position film
9 is positive photoresists 9.1 is positive photoresists of middle position
9.2 is positive photoresists of peripheral position
A is wafer center position film thickness
B is silicon chips periphery position film thickness.
Embodiment
As shown in Fig. 4 A to Fig. 4 E, in the first embodiment of the invention, manufacture the final film thickness of a slice is the silicon chip of T, and step is as follows:
(1) as shown in Figure 4 A, record the film thickness of a control silicon chip, film 4 thickness of its middle position is a, and film 5 thickness of peripheral position is b, and the film thickness of middle position and peripheral position is than being a/b, wherein a/b>1;
(2) as shown in Figure 4 B, product silicon chip 1 carries out first time film growth, make film 4 thickness of product silicon chip 1 middle position be T (a/b-1), film 5 thickness of product silicon chip 1 peripheral position is T (1-b/a);
(3) as shown in Figure 4 C, the film of first time growth carries out negative photoresist 6 spin coating;
(4) as shown in Figure 4 D, utilize silicon chips periphery exposure system to expose product silicon chips periphery position 6.2, removed by the negative photoresist 6.1 of product wafer center position after development, the negative photoresist 6.2 of peripheral position retains;
(5) as shown in Figure 4 E, removed by the film 4 of product wafer center position by etching, the film 5 of peripheral position retains;
(6) as illustrated in figure 4f, after removing the negative photoresist 6.2 of peripheral position, carry out second time film growth, film 7 thickness making product wafer center position is T, and film 8 thickness of periphery is Tb/a.
Now, the film of product silicon chips periphery position comprises two parts, a part is the film 8 of the peripheral position of second time film growth, its thickness is Tb/a, another part is the film 5 of the peripheral position that first time film growth stays, its thickness is T (1-b/a), and both total film thicknesses are Tb/a+T (1-b/a)=T, consistent with wafer center position film thickness.
As shown in Fig. 5 A to Fig. 5 E, in second embodiment of the invention, manufacture a slice film final thickness is the silicon chip of T, and step is as follows:
(1) as shown in Figure 5A, record the film thickness of a control silicon chip, film 4 thickness of its middle position is a, and film 5 thickness of peripheral position is b, and the film thickness of middle position and peripheral position is than being a/b, wherein a/b<1;
(2) as shown in Figure 5 B, silicon chip 1 carries out first time film growth, make film 4 thickness of product wafer center position be T (1-a/b), film 5 thickness of product silicon chips periphery position is T (b/a-1);
(3) as shown in Figure 5 C, the film of first time growth carries out positive photoresist 9 spin coating;
(4) as shown in Figure 5 D, utilize silicon chips periphery exposure system to expose silicon chips periphery position 5, removed by the positive photoresist 9.2 of product silicon chips periphery position after development, the positive photoresist 9.1 of middle position retains;
(5) as shown in fig. 5e, by etching, the film 5 of product silicon chips periphery position is etched removal, the film 4 of middle position retains;
(6) as illustrated in figure 5f, after removing the positive photoresist 9.1 of middle position, carry out second time film growth, film 7 thickness making product wafer center position is Ta/b, and film 8 thickness of periphery is T.
Now, the film of product wafer center position comprises two parts, a part is the film 7 of the middle position of second time film growth, its thickness is Ta/b, another part is the film 4 of the middle position that first time film growth stays, its thickness is T (1-a/b), and both total film thicknesses are Ta/b+T (1-a/b)=T, consistent with product silicon chips periphery position film thickness.
Below through the specific embodiment and the embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (6)
1. a growing method for silicon wafer film, manufacture the product silicon chip that the final film thickness of a slice is T, comprise the following steps:
(1) record the film thickness of a monitoring silicon chip, the film thickness of its middle position is a, and the film thickness of peripheral position is b, and middle position is a/b with the film thickness ratio of peripheral position;
As a/b>1, step is as follows:
(2) on a product silicon chip, carry out first time film growth, make the film thickness of product wafer center position be T (a/b-1), the film thickness of product silicon chips periphery position is T (1-b/a);
(3) on the film of first time growth, negative photoresist spin coating is carried out;
(4) utilize silicon chips periphery exposure system to expose product silicon chips periphery position, removed by the photoresist of product wafer center position after development, the photoresist of peripheral position retains;
(5) removed by the film of product wafer center position by etching, the film of peripheral position retains;
(6), after removing the photoresist of peripheral position, carry out second time film growth, make the film thickness of product wafer center position be T, the film thickness of peripheral position is Tb/a;
As a/b<1, step is as follows:
(7) on a product silicon chip, carry out first time film growth, make the film thickness of product wafer center position be T (1-a/b), the film thickness of product silicon chips periphery position is T (b/a-1);
(8) on the film of first time growth, positive photoresist spin coating is carried out;
(9) utilize silicon chips periphery exposure system to expose product silicon chips periphery position, removed by the photoresist of product silicon chips periphery position after development, the photoresist of middle position retains;
(10) film of product silicon chips periphery position etching removed by etching, the film of middle position retains;
(11), after removing the photoresist of middle position, carry out second time film growth, make the film thickness of product wafer center position be Ta/b, the film thickness of peripheral position is T.
2. the method for claim 1, is characterized in that: described film is silicon dioxide, silicon nitride, carborundum, tungsten silicide, metallic aluminium, tungsten, germanium silicon or germanium silicon-carbon.
3. the method for claim 1, is characterized in that: first time film growth and second time film growth adopt the growth of chemical vapor deposition, physical vapor deposition or boiler tube heat.
4. the method for claim 1, is characterized in that: the thickness range of first time film growth and second time film growth is 10 dust to 100000 dusts.
5. the method for claim 1, is characterized in that: in step (3), step (8), and described photoresist is the photoresist of 436 nanometers, 365 nanometers, 248 nanometers, 193 nanometers.
6. the method for claim 1, is characterized in that: in step (4), step (9), and the width range of peripheral position exposure is 0.5 millimeter to 30 millimeters.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201110172057.6A CN102842519B (en) | 2011-06-23 | 2011-06-23 | Method for growing silicon wafer film |
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| CN201110172057.6A CN102842519B (en) | 2011-06-23 | 2011-06-23 | Method for growing silicon wafer film |
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| CN102842519A CN102842519A (en) | 2012-12-26 |
| CN102842519B true CN102842519B (en) | 2015-02-04 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US5803967A (en) * | 1995-05-31 | 1998-09-08 | Kobe Steel Usa Inc. | Method of forming diamond devices having textured and highly oriented diamond layers therein |
| TW497138B (en) * | 2001-08-28 | 2002-08-01 | Winbond Electronics Corp | Method for improving consistency of critical dimension |
| TW516078B (en) * | 2000-07-13 | 2003-01-01 | Advanced Micro Devices Inc | Method and apparatus for modeling thickness profiles and controlling subsequent etch process |
| CN101620985A (en) * | 2008-07-02 | 2010-01-06 | 联华电子股份有限公司 | Chip edge etching device and related chip planarization method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5931020A (en) * | 1982-08-13 | 1984-02-18 | Mitsubishi Electric Corp | Selective epitaxial growth method |
| JPH0766291A (en) * | 1993-08-31 | 1995-03-10 | Nippondenso Co Ltd | Manufacture of semiconductor device |
-
2011
- 2011-06-23 CN CN201110172057.6A patent/CN102842519B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5803967A (en) * | 1995-05-31 | 1998-09-08 | Kobe Steel Usa Inc. | Method of forming diamond devices having textured and highly oriented diamond layers therein |
| TW516078B (en) * | 2000-07-13 | 2003-01-01 | Advanced Micro Devices Inc | Method and apparatus for modeling thickness profiles and controlling subsequent etch process |
| TW497138B (en) * | 2001-08-28 | 2002-08-01 | Winbond Electronics Corp | Method for improving consistency of critical dimension |
| CN101620985A (en) * | 2008-07-02 | 2010-01-06 | 联华电子股份有限公司 | Chip edge etching device and related chip planarization method |
Non-Patent Citations (3)
| Title |
|---|
| JP昭59-31020A 1984.02.18 * |
| JP特开平7-66291A 1995.03.10 * |
| Yong Xia,et al..高速晶圆薄膜厚度均匀图象在CMP工艺快速评定中的应用.《电子工业专用设备》.2004,(第116期),全部. * |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140103 |
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Effective date of registration: 20140103 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong, Pudong New Area, Sichuan Road, No. 1188 Bridge Applicant before: Shanghai Huahong NEC Electronics Co., Ltd. |
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