CN102832945A - Sigma-delta modulator - Google Patents
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- CN102832945A CN102832945A CN2012101956403A CN201210195640A CN102832945A CN 102832945 A CN102832945 A CN 102832945A CN 2012101956403 A CN2012101956403 A CN 2012101956403A CN 201210195640 A CN201210195640 A CN 201210195640A CN 102832945 A CN102832945 A CN 102832945A
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Abstract
A sigma-delta modulator includes a front portion and a hybrid portion to form a loop filter. The front portion includes integrator(s) and feed-forward path(s), and is arranged to provide a front signal by combining signals of the integrator(s) and feed-forward path(s). The hybrid portion is coupled to the front portion, and arranged to provide a filtered signal by combining an integration of the front signal and a weighting of the front signal. The filtered signal is quantized, converted from digital to analog, and fed back to the loop filter. According to the sigma-delta modulator, hardware complexity, power consumption and layout area is reduced.
Description
[technical field]
The invention relates to a kind of sigma-delta modulator (sigma-delta modulator); And particularly replace, to reduce hardware complexity, reduce layout area and to reduce the sigma-delta modulator of power consumption relevant for a kind of forward path that in resistance-type feed-forward loop filter, will be directed to the loop filter output.
[background technology]
Sigma-delta modulator can be used in the analog-to-digital conversion, has become one of key components in signal/message/image-processing circuit and the communicating circuit.
Sigma-delta modulator includes a loop filter, a quantizer and a digital to analog converter.The signal meeting of one analog input and an analog feedback signal of digital to analog converter output are done linear combination, and feed back to loop filter.In view of the above, loop filter produces a filtering signal, and it can be quantified as the quantized signal of a numeral by a quantizer (quantizer).So, analog input signal just can be converted into corresponding digital signal.Quantized signal also can be changed back a corresponding analog signal by digital to analog converter, with as aforesaid analog feedback signal, and feeds back to loop filter.Via the feedback framework, quantizing noise (error) will be treated to the frequency band of high frequency, with by the loop filter filtering.
Resistance-type feedforward topology can be in order to realize the loop filter of high-performance continuous time (continuous-time).The loop filter of resistance-type feedforward topology comprises an integration link and a plurality of forward path that realizes with resistance.The integration link comprises the integrator of a plurality of serial connections, is used for integrated signal; Each integrator is directed to once the port of high order by a port, that is each integrator receives signal by a port, with the signal integration that receives, and exports the port of time high order to.Each forward path then bypass in the integration link, with the signal weighting of a low order port, and with its feed forward, with the signal plus of a higher-order port.Need a forward path so that one first signal of a low order port is able to do linear combination with a secondary signal (being the output signal of last integrator in the integration link) of the highest order port like loop filter; Will need an extra adder circuit; Like an operational amplifier, to make up first signal and secondary signal.This extra adder circuit can make the more power of loop filter consumption, and occupies bigger layout area.
For example, in four (4-th order) loop filters, if there is a forward path to be directed to the port of high order, this loop filter just need could be realized with five operational amplifiers; These five operational amplifiers wherein four in order to realize four integrators (being four filtering of order one to four), another is then in order to realize extra adder circuit.That is the continuous-time sigma-delta modulator of realizing with resistance-type feedforward topology must add extra adder (realizing with operational amplifier) at last at loop filter, therefore can consume than big electric current and than the large chip area.
[summary of the invention]
In view of this, the embodiment of the invention provides a kind of sigma-delta modulator, to address the above problem.
One embodiment of the invention provide a sigma-delta modulator, comprise that a leading portion partly mixes with one partly.Leading portion partly comprises at least one leading portion integrator and at least one forward path.The leading portion integrator provides a first integral signal according to the integration of an internal signal.The forward path bypass is in the leading portion integrator, in order to the weighting internal signal so that a feed-forward signal to be provided.Leading portion partly provides a summation signals according to the first integral signal, and according to the linear combination of summation signals and feed-forward signal one preceding segment signal is provided.Mix partly to couple leading portion partly, before the weighting segment signal so that a weighted signal to be provided, before the integration segment signal so that a second integral signal to be provided, and with weighted signal and second integral signal combination so that a filtering signal to be provided.
Among one embodiment, mix the weight path that partly comprises a back segment integrator and a resistance-type, respectively in order to segment signal before segment signal before the integration and the weighting.Owing to mix the function of partly having integrated integration and linear combination (weighting and addition), the hardware complexity of loop filter, power consumption and layout area can both be able to reduction.So, just available four amplifiers of No. four filters are realized, need not set up amplifier and realize extra adder circuit.
Among one embodiment, leading portion partly is provided with a leading portion input port receiving an input signal, and a leading portion output port to be exporting preceding segment signal, and according to input signal internal signal is provided.Forward path has a feedforward input port with the reception internal signal, and has a feedforward output port with the output feed-forward signal.The leading portion integrator has an integration input port with the reception internal signal, and has an integration output port with output first integral signal.The feedforward input port is coupled to the integration input port, and the feedforward output port then is coupled between integration output port and the leading portion output port; That is forward path is crossed over the leading portion integrator, with bypass in the leading portion integrator.
Among one embodiment, leading portion partly also comprises one second leading portion integrator, is coupled between integration output port and the leading portion output port.In view of the above, leading portion partly can provide summation signals according to the integration of first integral signal.
Among one embodiment, the second leading portion integrator is coupled between integration output port and the feedforward output port, in order to the integration according to the first integral signal one third integral signal is provided.That is forward path is crossed over two or more leading portion integrators.Leading portion partly also provides summation signals according to the third integral signal.Among one embodiment, leading portion partly also comprises one second forward path, is coupled between feedforward input port and the integration output port.That is the number of the leading portion integrator of the second forward path cross-over connection is less than aforesaid forward path, in order to the weighting internal signal so that one second feed-forward signal to be provided.In view of the above, leading portion partly can provide summation signals according to the linear combination of the first integral signal and second feed-forward signal.
Among one embodiment, the second leading portion integrator is coupled between feedforward output port and the leading portion output port, in order to the combination of integration feed-forward signal and summation signals so that a third integral signal to be provided.That is the forward path bypass is the cross-over connection second leading portion integrator in the first leading portion integrator but not.In view of the above, leading portion partly responds third integral signal (the for example combination of summation signals and feed-forward signal) so that preceding segment signal to be provided.
Among one embodiment, sigma-delta modulator also comprises a quantizer and a digital to analog converter.Quantizer is coupled to and mixes partly, in order to the quantification filtering signal so that a quantized signal to be provided.Digital to analog converter couples quantizer, in order to change quantized signal so that a feedback signal to be provided.In view of the above, leading portion part responsive feedback signal is to provide internal signal.
Among one embodiment, leading portion partly also provides one the 3rd internal signal according to an auxiliary signal, and the combination of integration one second internal signal and the 3rd internal signal is to provide a third integral signal.Leading portion partly also comprises a secondary path, and weighting third integral signal is to provide auxiliary signal.Among one embodiment, the combination of leading portion integrator integration internal signal and auxiliary signal is to provide the first integral signal, and leading portion part weighting first integral signal is to provide the 3rd internal signal.Second internal signal is got by the internal signal weighting; For example, feed-forward signal can be used as second internal signal.Secondary path can be introduced the zero point of non-zero in the transfer function (transfer function) of quantizing noise, to strengthen the filtering of (in-band) noise in the frequency band.
One embodiment of the invention provide a sigma-delta modulator, have a loop filter, and it comprises a path of integration, at least one forward path and mixes with one partly.Path of integration comprises a plurality of internal ports orderly and preset number (one or more) leading portion integrator, and each leading portion integrator is by the internal port guiding internal port of high order once.Forward path is directed to the internal port of another higher-order by an internal port, and bypass is in this preset number leading portion integrator.Mix and partly comprise an input port, an output port, a back segment integrator and a weight path; Input port couples one of them of internal port, and the back segment integrator is directed to output port by input port, and weight path is by the input port output port that leads, and bypass is in the back segment integrator.
Among one embodiment, sigma-delta modulator also comprises one second forward path, is directed to the higher internal port of another order by an internal port.For example, suppose forward path by one first internal port, one second internal port that leads, second forward path can be by first internal port, one the 3rd internal port that leads, and its order is greater than first internal port.
Among one embodiment, sigma-delta modulator also comprises a secondary path, is directed to the lower internal port of an order by an internal port.Among one embodiment, suppose that secondary path is directed to one first internal port, then be directed to the signal of first internal port and more can make up by path of integration with the signal that is directed to first internal port via path of integration via secondary path.
Among one embodiment, sigma-delta modulator also comprises a quantizer and a digital to analog converter.Quantizer is coupled to output port to quantize the signal of output port.Digital to analog converter carries out digital-to-analogue conversion between quantizer to internal port.
Among one embodiment, suppose that forward path is directed to one first internal port, then also can be by in addition linear combination of path of integration via forward path signal that is directed to first internal port and the signal that is directed to first internal port via path of integration.
Sigma-delta modulator of the present invention can make hardware complexity, power consumption, layout area effectively reduced.
For there is better understanding above-mentioned and other aspects of the present invention, hereinafter is special lifts preferred embodiment, and conjunction with figs., elaborates as follows.
[description of drawings]
Fig. 1 is a kind of structural representation of sigma-delta modulator;
Fig. 2 is the structural representation of a kind of embodiment of the loop filter of Fig. 1;
Fig. 3 is the structural representation of the sigma-delta modulator of one embodiment of the invention;
Fig. 4 is the structural representation of an embodiment of the loop filter among Fig. 3 of the present invention;
Fig. 5 is the structural representation of the sigma-delta modulator of another embodiment of the present invention;
Fig. 6 is the structural representation of an embodiment of the loop filter among Fig. 5 of the present invention.
[embodiment]
Please refer to Fig. 1, that it is illustrated is a kind of embodiment of sigma-delta modulator 10.Sigma-delta modulator (sigma-delta modulator; SDM) 10 comprise a loop filter 12, a quantizer 14, dynamic element coupling (dynamic element matching; DEM) circuit 16 and a digital to analog converter (digital-to-analog converter, DAC) 18.Sigma-delta modulator 10 also comprises a plurality of weighting circuit 22a to 22j, and each weighting circuit is according to a corresponding coefficient and weighted signal.When sigma-delta modulator 10 will convert the signal u (t) of an analog input into one corresponding digital signal v (n), the signal u (t) of simulation received from a port i0, carries out weighting with a coefficient B 1, and with another analog signal uf (t) addition; The result of addition can be fed back in the loop filter 12, and in view of the above, loop filter 12 can provide filtering signal x (t).Quantizer 14 can quantize the filtering signal x (t) of loop filter 12, to produce the quantized signal v (n) of numeral.Dynamic element match circuit 16 and digital to analog converter 18 are changed back a corresponding analog signal uf0 (t) with the quantized signal v (n) of numeral together, then with a coefficient D1 weighting, and feed back to loop filter 12, become signal uf (t).
In sigma-delta modulator 10, loop filter 12 is the feedforward topology on four rank, and comprises three forward path and an integration link.Three feed forward circuits are formed by the weighting circuit 22f to 22h that coefficient is respectively A0 to A2 respectively.The weighting circuit 22b to 22e that integration chain route coefficient is respectively B2 to B5 forms with the integrator 20a to 20d that transfer function is respectively C1/s, C2/s, C3/s and C4/s.Integrator 20a to 20d is connected in series, and the weighting circuit 22b to 22e that coefficient is respectively B2 to B5 then is arranged at therebetween.Integrator 20a is directed to port o1 by port i1, and the signal that is received from port i1 is carried out integration, provides (output) signal (integrated signal) x1 (t) to port o1 according to this.Similarly, integrator 20b, 20c and the 20d in order to integration is directed to port o2, o3 and o4 by port i2, i3 and i4 respectively.Port o1 and i3 to i5 have the order (progression) of integration; The order of port o1 is minimum, because have only an integrator 20a between port i1 and o1.O1 compares with port, and port i3 has the order of time high (high one-level), because be coupled with two integrator 20a and 20b between port i1 and i3.With respect to port i3, port i4 has time high order.The order of port i5 is the highest, because all integrators of loop filter 12 all are coupled between port i1 and i5.
The weighting circuit 22f to 22h that coefficient is respectively A0, A1 and A2 realizes three forward path of loop filter 12 respectively.Each forward path is directed to the another port of higher-order in the integration link by the port of low order, and therefore, the signal of low order port can be combined into the signal that is directed to the higher-order port via the integration link.For example, be directed to port i3 because coefficient is the forward path of A2 by port o1, therefore, the signal that is directed to port i3 via the integration link just signal x1 (t) of ability and port o1 carries out linear combination.Similarly, coefficient is that the forward path of A0 is directed to the highest port i5 of order by port o1, makes signal x1 (t) ability of port o1 and the output signal line property combination of tail end integrator 20d.Along integration chain route port o1 to i5, signal x1 (t) can be by integrator 20b to 20d integration three times, and makes up with signal x1 (t) itself, because signal x1 (t) itself also can be via the forward path fl transmission of coefficient A0 to port i5.
Please refer to Fig. 2, that it is illustrated is a kind of embodiment that realizes the loop filter 12 among Fig. 1.Integrator 20a to 20d is realized C1 to C4 with electric capacity by differential amplifier OP1 to OP4 respectively.Port i0 to i5 among Fig. 1, o1 to o4 difference corresponding node are to i0p/i0n to i5p/i5n, o1p/o1n to o4p/o4n.Resistance is to Rb1 to Rb5, Ra0 to Ra2, and Rr respectively with Fig. 1 in coefficient B 1 to B5, A0 to A2 relevant with G1.It should be noted that; Also comprise an extra differential amplifier OP5 that sets up and an a pair of resistance Rbs among Fig. 2; So, being directed to output node via differential amplifier OP4 could mutual additive combination to the differential wave of o1p/o1n with the guiding node to the differential wave of o4n/o4p.That is; In realizing the integration link each amplifier of each integrator; Loop filter structure among Fig. 1 also need be set up an extra amplifier, is used for signal that is directed to port i5 via the integration link and the signal that is directed to port i5 via coefficient A0 forward path are carried out additive combination.This amplifier of setting up can consume extra power, and occupies extra layout area.
In order to overcome the shortcoming of setting up amplifier; The present invention provides the loop filter of resistance-type feedforward topology; It can adopt a weight path between the port of the port of the highest order and contiguous inferior low order, therefore, by low order port extremely the forward path of the highest order port just can be substituted.Please refer to Fig. 3, what it was illustrated is the sigma-delta modulator 30 according to one embodiment of the invention.Sigma-delta modulator 30 can be used as an analog to digital converter, and comprises a loop filter 32, a quantizer 34, a dynamic element match circuit 36 and a D/A converter 38.When sigma-delta modulator 30 converts an analog signal u (t) the digital signal v (n) of a correspondence into; The analog input signal u (t) that transfers to port i0 can be the weighting circuit 48a weighting of b1 by coefficient; And with an analog feedback signal uf (t) combination, to form signal x0 (t).Loop filter 32 has two-port i1 and o4, and via port i1, loop filter 32 receives signal x0 (t) as an input signal, and produces a filtering signal x (t) with response signal x0 (t).Filtering signal x (t) is exported by port o4, and transfers to quantizer 34.Quantizer 34 couples loop filter 32, and to produce the quantized signal v (n) of a numeral, so, sigma-delta modulator 30 just can convert the input signal u (t) of simulation into quantized signal v (n) in order to quantification filtering signal x (t).Digital to analog converter 38 couples quantizer 34 via element match circuit 36, and with element match circuit 36 Collaboration, quantized signal v (n) is converted into the feedback signal uf0 (t) of simulation.Feedback signal uf0 (t) is that the weighting circuit 48b of d1 is weighted to feedback signal uf (t) by coefficient then.
In the loop filter 32, weighting circuit 46a and 46b that coefficient is respectively a1 and a2 form two forward path.Each forward path is in order to being directed to another higher internal port of order from an internal port, and integrator 40a to 40c is carried out bypass; Therefore, the signal of low order port can with the signal combination of higher-order port.Coefficient is that the forward path of a1 is directed to port i4 by port o1, and the signal x1 (t) of port o1 output can be made up with signal x3 (t); Wherein, signal x3 (t) then is the signal that is directed to port i4 via path of integration.Similarly, coefficient is that the forward path of a2 is directed to another port i3 by port o1, makes the signal x1 (t) of low order port o1 do linear combination with the signal x2 (t) of higher-order port o2.
On the other hand, coefficient is that the weighting circuit 54 of g1 forms a secondary path, and this secondary path is directed to the port i2 of low order by port o3.So, signal x3 (t) will be by coefficient g1 weighting, and in port i2 and signal b2 * x1 (t) combination.That is, leading portion partly 50 integrator 40c through to respectively by the signal a2 * x1 (t) of weighting circuit 46b and 42b output with b3 * x2's (t) with carry out integration, with generation integrated signal x3 (t); Coefficient is that the secondary path of g1 is through carrying out weighting to produce an auxiliary signal aux (t) to signal x3 (t); The integrator 40b of leading portion part 50 is then through carrying out integration to produce a signal x2 (t) to signal z1 (t); Wherein, Signal z1 (t) is auxiliary signal aux (t) and the linear combination of signal x1 (t), i.e. z1 (t)=(b2 * x1 (t)-g1 * aux (t)), and signal x1 (t) then is the signal of integrator 40a integration gained.
In loop filter 32, mix partly 52 being coupled to port i4, and comprise an integrator 40d and two weighting circuit 42d and 56.The transfer function of integrator 40d is c4/s, and c4 is a coefficient, and weighting circuit 42d and 56 then has coefficient b5 and a3 respectively.Integrator 40d is directed to port o4 by port i4, in order to carry out integration through the signal z3 (t) to 50 outputs of leading portion part, with the signal x4 (t) behind the generation integration.Coefficient is that the weighting circuit 56 of a3 forms a weight path, is directed to port o4 by port i4, in order to signal z3 (t) is carried out weighting with signal z3 ' after producing a weighting (t); Signal x (t) promptly is signal x4 (t) and z3 ' linear combination (t).The equality EQ1 of Fig. 3 represents Laplce (Laplace) transfer function of loop filter 32, for example X (s)/X0 (s); Wherein, X (s) is respectively the Laplce's conversion with x0 (t) to time-domain signal x (t) with X0 (s).In equality EQ1, leading portion partly 50 provides three transfer functions with three limits (pole) and two zero points; Mix 52 of parts the transfer function with a single limit and single zero point is provided.
Because signal z1 (t)=(b2 * x1 (t)-g1 * x3 (t)) comprises signal x1 (t), at integrator 40b signal z1 (t) is carried out integration when to port i3 signal x2 (t) being provided, the signal x2 (t) of integration just comprises the integration of signal x1 (t); That is, be forward path and the integrator 40b of a2 via coefficient, signal x1 (t) itself is able to make up at port i3 with its integrated signal.Moreover; Owing to be about to be integrated integration after the weighting that comprises signal x1 (t) among the signal z2 (t) of device 40c integration; Signal x1 (t) can be integrated device 40b and 40c integration twice along path of integration, and the result of this twice integration can be that the signal x1 (t) that the a1 forward path is transmitted itself makes up with coefficient also.In mixing part 52, signal x1 (t) can experience the integration for the third time of integrator 40d.That is via integrator 40b to 40d, signal x1 (t) is integrated three times, forms the part of signal x4 (t).
In feedforward topological structure shown in Figure 1, coefficient is that the forward path of A0 makes signal x1 (t) be able to make up with the triple integral result of signal x1 (t), but also needs an extra amplifier OP5 who sets up to realize this combination.Relatively, be to be that the weight path substitution index of a3 is the forward path of A0 with the coefficient 32 of loop filters shown in Figure 3.Via weighting circuit 46a and 56 formed paths, signal x1 (t) also can be fed forward to port o4, and signal x1 (t) can be made up with the triple integral result of signal x1 (t) equally.Therefore, compared to loop filter 12, loop filter 32 still can provide enough functions.Yet, 52 can realize owing to mix partly, so the hardware complexity of loop filter 32, power consumption and layout area all can be less than loop filters 12 with single amplifier.
Please refer to Fig. 4, what it was illustrated is in order to realize the circuit layer level framework of loop filter 32 in one embodiment of the invention.In Fig. 4, the loop filter 32 of Fig. 3 can use four amplifiers (like differential operational amplifier) op1 to op4, resistance that R1 to R4, Rf1 to Rf2, Rr1 and Rs and electric capacity are achieved to C1 to C4 (like variable capacitance).Differential node is to i0p and i0n, i1p and i1n, i2p and i2n, i3p and i3n, i4p and i4n, o1p and o1n, o2p and o2n, o3p and o3n and o4p and the corresponding port i0 of o4n difference, i1, i2, i3, i4, o1, o2, o3 and o4.Integrator 40a to 40d (Fig. 3) realizes C1 to C4 with electric capacity with amplifier op1 to op4 respectively.For example, node i 1p, i1n, o1p and o1n are coupled to positive input terminal, negative input end, positive output end and the negative output terminal of amplifier op1 respectively; Electric capacity is coupled between the positive input terminal and negative output terminal of amplifier op1 one of them of C1, and electric capacity then is coupled between the negative input end and positive output end of amplifier op1 among the C1 another.
Resistance is respectively coupled to positive input terminal and the negative input end of amplifier op1 to R1.Resistance is coupled to one of them of R2/R3/R4/Rr1 between the negative input end of positive output end and amplifier op2/op3/op4/op2 of amplifier op1/op2/op3/op3, and resistance then is coupled to another resistance of R2/R3/R4/Rr1 between the positive input terminal of negative output terminal and amplifier op2/op3/op4/op2 of amplifier op 1/op2/op3/op3.Resistance is coupled to one of them of Rf1/Rf2 between the positive input terminal of positive output end and amplifier op4/op3 of amplifier op1, and resistance then is coupled to another resistance among the Rf1/Rf2 between the negative input end of negative output terminal and amplifier op4/op3 of amplifier op1.Resistance is serially connected with between the positive output end and negative input end of amplifier op4 one of them to C4 of one of them and the electric capacity of Rs, and resistance then is serially connected with between the negative output terminal and positive input terminal of amplifier op4 another electric capacity among the C4 another resistance among the Rs and electric capacity.
The numerical value of coefficient c1 to c4 (Fig. 3) can be by the capacitance decision of capacitor C 1 to C4.Resistance is then distinguished the numerical value of coefficient of correspondence b1, b2, b3, b4, a1, a2, a3 and g1 to the resistance value of R1, R2, R3, R4, Rf1, Rf2, Rs and Rr1; Wherein, coefficient b5 can combine with coefficient c4, makes coefficient product c4 * b5 can be controlled by the capacitance of capacitor C 4.As shown in Figure 4, mix the multiple function that part 52 provides integration and linear combination (weighting and addition), its single amplifier op4 capable of using, resistance are achieved to C4 to Rs and electric capacity.
Can know with Fig. 2 through comparison diagram 4,, just can be reduced to four (Fig. 4) by five (Fig. 2) in order to the amplifier number that realizes the homogeneous transfer function through the feed forward circuit (Fig. 1) of substitution index A0.In Fig. 2, originally to can be integrated with addition and integrating function that two amplifier OP5 and OP4 realize respectively, so that it is 52 single amplifier op4 realizes by mixing partly, as shown in Figure 4.
Please refer to Fig. 5, that it is illustrated is the loop filter 32A according to one embodiment of the invention; Loop filter 32 replaceables of sigma-delta modulator 30 (Fig. 3) are loop filter 32A.Loop filter 32A comprises N integrator G [1] to G [N], and N weighting circuit 42, a weighting circuit 56 and one or more weighting circuit 46 mix partly 52A to form leading portion part 50A with one.In addition, loop filter 32A can comprise one or more weighting circuits 54 in leading portion circuit 50A, also any weighting circuit 54 can be set.
Integrator G [1] to the transfer function of G [N] for being respectively c [1]/s to c [N]/s.For k=1 to N, transfer function is that the integrator G [k] of c [k]/s is coupled between port i [k] and the oa [k], receives a signal by port i [k], this signal is carried out integration, and integral result is exported to port oa [k].The coefficient of each weighting circuit 42 is respectively b [2] to b [N]; To (N-1), coefficient is that the weighting circuit 42 of b [k+1] is coupled between port oa [k] and the port ob [k] for k=1, makes the signal of port oa [k] can be by coefficient b [k+1] weighting, and transmits to port ob [k].To (N-1), port ob [k] is coupled to the port i [k+1] of next integrator to k=1, and integrator G [1] is connected in series to the weighting circuit 42 of b [N] with coefficient b [2] to G [N-1] alternately, the path of integration among the formation leading portion part 50A.
Each weighting circuit 46 provides a coefficient a [j]; And form a forward path by port oa [kjL] guiding port ob [kjH]; Make the signal of port oa [kjL] can be, and export port ob [kjH] to, wherein by coefficient a [j] weighting; Index kjH and kjL select in (N-1) by 1, and index kjH is greater than kjL.For example, leading portion part 50A can comprise that a coefficient is the weighting circuit 46 of a [1], is directed to port ob [N-1] by port oa [1].Among one embodiment, it is the forward path of a [1] to a [N-2] that (N-2) individual coefficient can be set; To (N-2), coefficient a [j] is directed to port ob [N-j] by port oa [1] for j=1, and each integrator G [1] is carried out bypass to G [N-1].Because coefficient is that the feed forward circuit cross-over connection of a [j] is in port oa [kjL] and ob [kjH]; Port oa [kjL] to the integrator between ob [kjH] by bypass, just can make up from the signal that port oa [kjL] is directed to port ob [kjH] via path of integration with the signal of port oa [kjL] itself.That is the signal (like the signal of port oa [kjL]) of less integration of experience can directly and experience more repeatedly the signal of integration (like the signal of port ob [kjH]) combination each other on the forward path on the path of integration.
If be provided with weighting circuit 54, each weighting circuit 54 is in order to providing a coefficient g [i], and forms one and be directed to the secondary path of port ob [kiL] by port oa [kiH], makes the signal of port oa [kiH] can be by coefficient g [i] weighting, and passes to port ob [kiL]; Wherein, index kiH and kiL select in (N-1) by 1, and index kiH is greater than kiL.For example, leading portion part 50A can comprise that a coefficient is the weighting circuit 54 (not shown) of g1, is directed to port ob [1] by port oa [3].At leading portion partly among the 50A, each port ob [k] makes the signal of path of integration be able to the signal plus with forward path or secondary path, for k=1 to (N-1).But the transfer function limit of secondary path subsidiary control loop filter 32A (being the zero point of quantizing noise) can be placed in greater than on zero the frequency some limit.
In mixing partly 52A, transfer function is that integrator G [N] and the coefficient of c [N]/s is that the weighting circuit 42 of b [N+1] is by port i [N] guiding port ob [N].Coefficient is that the weighting circuit 56 of as0 forms a weight path, by port i [N] guiding port ob [N], to carry out bypass for integrator G [N].For k less than N; If hoping one first signal of port oa [k] and the secondary signal that last integrator G [N] integration goes out makes up each other; First signal from port oa [k] can be directed to port ob [N-1] through a forward path that only extends leading portion part 50A; Make this first signal can be through being directed to port ob [N], so that make up each other with the secondary signal of integrator G [N] output via mixing the weighting circuit 56 among the 52A partly.
Utilize integrator G [1] to G [N] and each forward path, loop filter 32A can provide N rank transfer function with N limit.Leading portion partly 50A can provide (N-1) inferior transfer function, and the transfer function of 52A multiplies each other with mixing partly.Be similar to the mixing part 52 among Fig. 3,52A can realize with single amplifier because mix partly, so loop filter 32A only needs N amplifier just can realize, but not (N+1) individual.Please refer to Fig. 6, that it is illustrated is the embodiment that the present invention realizes loop filter 32A.At leading portion partly among the 50A, the path of integration among Fig. 5 can use amplifier op [1] C [1] to be realized to R [N] R [2] to C [N-1] and resistance to op [N-1], electric capacity; Coefficient is that the forward path of a [j] can be realized Rf [j] by resistance, and coefficient is that the secondary path of g [i] can be realized Rr [i] by resistance.Mixing partly, 52A can realize a Rs and an amplifier op [N] C [N], resistance with electric capacity.For k=1 to N, the port i [k] among Fig. 5, oa [k] and the corresponding differential node of ob [k] difference are to i [k] p and i [k] n, oa [k] p and oa [k] n and ob [k] p and ob [k] n.For k=2 to N, node i [k] p and i [k] n couple node ob [k-1] n and ob [k-1] p respectively.
To (N-1), positive input terminal, negative input end, positive output end and the negative output terminal of amplifier G [k] couples node i [k] p, i [k] n, oa [k] p and oa [k] n respectively for k=1; Electric capacity is coupled between node i [k] p and oa [k] n one of them of C [k], and electric capacity then is coupled between node i [k] n and oa [k] p among the C [k] another; Resistance is coupled between node oa [k] p and ob [k] p one of them of R [k+1], and resistance then is coupled between node oa [k] n and ob [k] n among the R [k+1] another.In mixing partly 52A, electric capacity is coupled between node i [N] p and ob [N] n one of them to Rs of one of them and the resistance of C [N], and electric capacity then is coupled between node i [N] n and ob [N] p among the Rs another another and resistance among the C [N].
In each forward path, resistance is coupled between node oa [kjL] p and ob [kjH] n one of them of Rf [j], and resistance then is coupled between node oa [kjL] n and ob [kjH] p among the Rf [j] another.For example, for realizing the coefficient a [1] of Fig. 5, a resistance R _ f [1] is coupled between node oa [1] p and ob [N-1] n, and another resistance R _ f [1] then is coupled between node oa [1] n and ob [N-1] p.In each secondary path, resistance is coupled between node oa [kiH] n and ob [kiL] n one of them of Rr [i], and another then is coupled between node oa [kiL] p and ob [kiH] p.
Though the sigma-delta modulator 30 among Fig. 3 adopted one continuous time loop filter 32, sigma-delta modulator 30 also can be the hybrid sigma-delta modulator that a kind of mixed continuous time and discrete time are handled.Digital to analog converter 38 (seeing Fig. 3, Fig. 4 and Fig. 6) can be worked in coordination with dynamic element match circuit 36 (Fig. 3), digital signal v (n) is changed back analog signal uf0 (t) as feedback.Though the sigma-delta modulator 30 among Fig. 3 has adopted single digital to analog converter 38 so that an analog signal is fed back to loop filter, sigma-delta modulator 30 also can comprise the digital to analog converter of a plurality of feedback usefulness.For example, the digital to analog converter of setting up with reference to figure 3,, with a collocation set up the dynamic element match circuit (if the words that need are arranged; Both all do not scheme), can be set between quantizer 34 and port i2 or the i3, converting signal v (n) into analog signal, and feed back to the port i2 of integrator 40b or the port i3 of integrator 40c.
In summary, the present invention provides a kind of loop filter of resistance-type feedforward topology of improvement, can be applicable in the sigma-delta modulator of continuous time.In the loop filter of resistance-type feedforward topology, N integrator G [1] is connected in series to G [N] in regular turn, and last integrator G [N] is equipped with a weight path, to form a multi-functional mixing partly, can carry out integration and linear combination; If a secondary signal of one first signal of a certain integrator G of expectation [k] output and integrator G [N] output makes up addition (k is less than N) each other, then first signal can be fed forward to weight path, makes first signal be able to make up with secondary signal.Because integrator G [1] can realize with single amplifier respectively with the integrator G [N] that mixes partly to G [N-1], thus altogether need N amplifier, rather than (N+1) individual.So, the hardware complexity of loop filter and sigma-delta modulator, power consumption, layout area just can effectively reduce.Among one embodiment, sigma-delta modulator of the present invention can be applicable to a fundamental frequency demodulator, with a radio-frequency tuner (RF tuner) Collaboration.Radio-frequency tuner receives a radiofrequency signal and it is fallen the I signal and quadrature Q signal mutually that transfers homophase to.In the fundamental frequency demodulator, just available two sigma-delta modulators of the present invention of I signal and Q signal are given digitlization respectively.
Though the present invention discloses as above with preferred embodiment; Right its is not in order to limit the present invention; Any technical staff in this area; Do not breaking away from the spirit and scope of the present invention, when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the scope that claims of the present invention define.
Claims (15)
1. a sigma-delta modulator is characterized in that, comprises: leading portion part and is mixed partly;
Wherein this leading portion partly comprises:
One leading portion integrator is in order to carry out integration and to produce a first integral signal an internal signal; An and forward path; Also produce a feed-forward signal according to this in order to this internal signal of weighting; Wherein this leading portion is partly in order to producing a summation signals according to this first integral signal, and this summation signals and this feed-forward signal are made up to produce a preceding segment signal; And
This mixing partly couples this leading portion partly, in order to weighting should before segment signal producing a weighted signal, integration should before segment signal producing a second integral signal, and make up this weighted signal and this second integral signal to produce a filtering signal.
2. sigma-delta modulator as claimed in claim 1 is characterized in that:
This leading portion partly also comprises a leading portion input port and a leading portion output port, be somebody's turn to do preceding segment signal in order to receive an input signal and output respectively, and this leading portion partly is used for also producing this internal signal according to this input signal;
This forward path comprises a feedforward input port and a feedforward output port, respectively in order to receive this internal signal and to export this feed-forward signal;
This leading portion integrator comprises an integration input port and an integration output port, respectively in order to receive this internal signal and to export this first integral signal;
Wherein, this feedforward input port couples this integration input port, and this feedforward output port is coupled between this integration output port and this leading portion output port.
3. sigma-delta modulator as claimed in claim 2 is characterized in that, this leading portion partly also comprises one second leading portion integrator, is coupled between this integration output port and this leading portion output port;
Wherein this leading portion partly is used for according to the integration of this first integral signal is produced this summation signals.
4. sigma-delta modulator as claimed in claim 3 is characterized in that, this second leading portion integrator is coupled between this integration output port and this feedforward output port, in order to this first integral signal is carried out integration to produce a third integral signal;
Wherein, this leading portion partly also provides this summation signals according to this third integral signal.
5. sigma-delta modulator as claimed in claim 4 is characterized in that, this leading portion partly also comprises one second forward path, is coupled between this feedforward input port and this integration output port, also produces one second feed-forward signal according to this in order to this internal signal of weighting;
Wherein, this leading portion partly also provides this summation signals according to the combination of this first integral signal and this second feed-forward signal.
6. sigma-delta modulator as claimed in claim 3; It is characterized in that; This second leading portion integrator is coupled between this feedforward output port and this leading portion output port, in order to the combination of this feed-forward signal of integration and this summation signals, and produces a third integral signal according to this;
Wherein this leading portion partly also provides this preceding segment signal according to this third integral signal; And this leading portion is partly also according to the integration of the combination of this summation signals and this feed-forward signal and produce this preceding segment signal.
7. sigma-delta modulator as claimed in claim 1 is characterized in that, also comprises:
One quantizer is coupled to this mixing partly, in order to quantize this filtering signal and a quantized signal is provided according to this; And
One digital to analog converter is coupled in this quantizer, in order to change this quantized signal so that a feedback signal to be provided;
Wherein this leading portion partly more provides this internal signal according to this feedback signal.
8. sigma-delta modulator as claimed in claim 1 is characterized in that:
The combination that this leading portion partly also is used for integration one second internal signal and one the 3rd internal signal is to produce one the 4th integrated signal;
Wherein this leading portion partly also comprises a secondary path, and so that an auxiliary signal to be provided, and this leading portion partly also produces the 3rd internal signal according to this auxiliary signal in order to weighting the 4th integrated signal;
Wherein the combination of this this internal signal of leading portion integrator integration and this auxiliary signal to be producing this first integral signal, and this leading portion partly this first integral signal of weighting so that the 3rd internal signal to be provided; And i.e. this feed-forward signal of this second internal signal.
9. sigma-delta modulator as claimed in claim 1 is characterized in that, this mixing partly comprises:
One back segment integrator is somebody's turn to do preceding segment signal in order to integration; And
One weight path should preceding segment signal in order to weighting.
10. a sigma-delta modulator is characterized in that, comprises:
One path of integration comprises an a plurality of internal ports orderly and preset number leading portion integrator, and each leading portion integrator is in order to via an internal port that is directed to the high order of another time in the said internal port in the said internal port;
One first forward path, in order to via an internal port that is directed to another the higher order in the said internal port in the said internal port, and bypass is in this preset number leading portion integrator; And
One mixes partly, comprises an input port, an output port, a back segment integrator and a weight path; This input port couples in the said internal port, and this leading portion integrator is in order to being directed to this output port via this input port, and this weight path is in order to being directed to this output port by this input port, and this back segment integrator of bypass.
11. sigma-delta modulator as claimed in claim 10 is characterized in that, also comprises:
One second forward path is in order to by an internal port that is directed to another higher order in the said internal port in the said internal port.
12. the sigma-delta modulator like claim 10 is characterized in that, also comprises:
One secondary path is in order to be directed to the lower internal port of an order by one in the said internal port.
13. sigma-delta modulator as claimed in claim 12; It is characterized in that; This secondary path one first internal port in the said internal port that leads, this path of integration also are used for being directed to the signal that the signal and of this first internal port is directed to this first internal port via this path of integration with one via this secondary path and make up.
14. sigma-delta modulator as claimed in claim 10 is characterized in that, also comprises:
One quantizer couples this output port, in order to quantize the signal of this output port; And
One digital to analog converter will carry out digital-to-analogue conversion from the signal of an internal port this quantizer to the said internal port.
15. sigma-delta modulator as claimed in claim 10; It is characterized in that; This first forward path is directed to one second internal port in the said internal port, and this path of integration also is used for being directed to the signal that the signal and of this second internal port is directed to this second internal port via this path of integration with one via this forward path and makes up.
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| US201161497435P | 2011-06-15 | 2011-06-15 | |
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| US201161549922P | 2011-10-21 | 2011-10-21 | |
| US61/549,922 | 2011-10-21 | ||
| US13/450,866 | 2012-04-19 | ||
| US13/450,866 US8552894B2 (en) | 2011-06-15 | 2012-04-19 | Sigma-delta modulator having a feed-forward path and a hybrid portion |
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| CN106160749A (en) * | 2015-05-14 | 2016-11-23 | 联发科技股份有限公司 | Continuous time delta sigma manipulator, analog-digital converter and correlative compensation method |
| CN108199717A (en) * | 2013-07-18 | 2018-06-22 | 亚德诺半导体集团 | For may be programmed the digital tuning engine of delta-sigma analog-digital converter |
| CN108712157A (en) * | 2016-11-13 | 2018-10-26 | 美国亚德诺半导体公司 | Quantizing noise in feedback loop is eliminated |
| CN111327316A (en) * | 2018-12-13 | 2020-06-23 | 亚德诺半导体国际无限责任公司 | Stub filter for improving blocking signal tolerance in analog-to-digital converter generated by continuous time residue |
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