CN102832905B - Phase shifter and phase-moving method - Google Patents

Abstract

The embodiment of the present invention provides a kind of phase shifter and phase-moving method. Wherein, phase shifter, comprising: except two-divider and with described at least one vector adder being connected except two-divider; Described except two-divider, generate four orthogonal successively initialize signals for two inversion signals according to input; Described vector adder, for the amplitude proportional of every two orthogonal initialize signals in described four initialize signals is adjusted, and described every two the orthogonal signals after amplitude proportional being adjusted carry out vector addition process, generate four orthogonal successively local oscillator LO signals. The embodiment of the present invention can reduce design complexities and the power consumption of vibrator; And, it is possible to generate the LO signal of various phase place flexibly.

Description

Phase shifter and phase-moving method

Technical field

The embodiment of the present invention relates to the communication technology, particularly relates to a kind of phase shifter and phase-moving method.

Background technology

Existing communication system needs to utilize vibrator often, such as voltage-controlled oscillator (VoltageControlledOscillator, hereinafter referred to as: signal VCO) exported produces the local oscillator (LocalOscillation of not same-phase, hereinafter referred to as: LO) signal, so that the LO signal adopting required phase place in signal launch and accept process carries out modulation and demodulation.

Prior art often adopts the mode of two divided-frequency to produce the LO signal of multiple phase shift. Fig. 1 is the electrical block diagram that existing two divided-frequency generates the LO signal of multiple phase place, and as shown in Figure 1, two phase differential that VCO produces are 180 �� and frequency is f₀Signal be input to the first step except in two-divider, this first step except two-divider then export four signal I, Q,Its phase place is respectively 0 ��, 90 ��, 180 �� and 270 �� and its frequency and is f₀/ 2; I,One that can be input to the second stage is removed in two-divider, should export four signals except two-divider, and its phase place is respectively 0 ��, 90 ��, 180 �� and 270 �� and its frequency and is f₀/ 4, Q,Another that can be input to the second stage was except, in two-divider, should also export four signals except two-divider, and its phase place is respectively 45 ��, 135 ��, 225 �� and 315 �� and its frequency and is f₀/ 4. Therefore, adopt two-stage shown in Fig. 1 except the structure of two-divider, it is possible to obtain the LO signal of 8 kinds of phase places, and the frequency of LO signal is f₀/4��

From above-mentioned prior art, adopt two-stage except two-divider structure generation LO signal, then VCO must vibrate the LO signal frequency of 4 times, and once be produced the LO signal of more kinds of phase place, then except the progression of two-divider needs to increase, correspondingly, the oscillation frequency of VCO then wants corresponding lifting, thus increases design difficulty and the power consumption of VCO.

Summary of the invention

The embodiment of the present invention provides a kind of phase shifter and phase-moving method, increases along with required increasing of phase place to solve the oscillation frequency of vibrator in prior art, causes the design complexities of vibrator higher, the problem that power consumption is bigger.

The embodiment of the present invention provides a kind of phase shifter, comprising: except two-divider and with described at least one vector adder being connected except two-divider;

Described except two-divider, generate four orthogonal successively initialize signals for two inversion signals according to input;

Described vector adder, for the amplitude proportional of every two orthogonal initialize signals in described four initialize signals is adjusted, and described every two the orthogonal signals after amplitude proportional being adjusted carry out vector addition process, generate four orthogonal successively local oscillator LO signals.

Further, described vector adder comprises four identical vector addition circuit, two mutual orthogonal initialize signals in described four initialize signals are carried out vector addition by each vector addition circuit respectively, and each vector addition circuit comprises amplitude adjustment unit and vector addition unit;

Described amplitude adjustment unit, for the amplitude proportional of described two mutual orthogonal initialize signals of input is adjusted, and two signals after the adjustment of output amplitude ratio;

Described vector addition unit, carries out vector addition process for two signals after amplitude proportional being adjusted.

Wherein, described amplitude adjustment unit comprises the first dividing potential drop circuit and the 2nd dividing potential drop circuit;

Described first dividing potential drop circuit, for a signal in described two mutual orthogonal initialize signals is carried out voltage division processing, and exports the voltage signal of the first amplitude;

Described 2nd dividing potential drop circuit, for another signal in described two mutual orthogonal initialize signals is carried out voltage division processing, and exports the voltage signal of the 2nd amplitude;

Described vector addition unit, comprise a MOS pipe and the 2nd MOS pipe, and a loaded impedance, the grid of the one MOS pipe and the grid of the 2nd MOS pipe input the voltage signal of described first amplitude and the voltage signal of the 2nd amplitude respectively, the drain electrode of a described MOS pipe and the drain electrode of the 2nd MOS pipe are all connected with same one end of described loaded impedance, the source electrode of a described MOS pipe and the source ground of the 2nd MOS pipe or power supply, the voltage signal on described loaded impedance is the LO signal generated after vector addition processes.

Further, described amplitude adjustment unit comprises a MOS pipe and the 2nd MOS pipe, the source ground of a described MOS pipe and the 2nd MOS pipe or power supply;

A described MOS pipe, for a signal in described two the mutual orthogonal initialize signals inputted from grid is converted to the electric current signal of the first amplitude, and exports the electric current signal of described first amplitude from the drain electrode of a described MOS pipe;

Described 2nd MOS pipe, for another signal in described two the mutual orthogonal initialize signals inputted from grid is converted to the electric current signal of the 2nd amplitude, and exports the electric current signal of described 2nd amplitude from the drain electrode of described 2nd MOS pipe;

Described vector addition unit, comprises loaded impedance, and the drain electrode of a described MOS pipe and the drain electrode of described 2nd MOS pipe are connected with same one end of described loaded impedance respectively, and the voltage signal on described loaded impedance is the LO signal generated after vector addition processes.

The embodiment of the present invention provides a kind of phase-moving method, comprising:

Two inversion signals according to input generate four orthogonal successively initialize signals;

The amplitude proportional of every two orthogonal initialize signals in described four initialize signals is adjusted, and described every two the orthogonal signals after amplitude proportional being adjusted carry out vector addition process, generate four orthogonal successively LO signals; And the phase shift that different vector adder produces is different.

Further, described the amplitude proportional of every two orthogonal initialize signals in described four initialize signals is adjusted, comprising:

Respectively the amplitude proportional of two orthogonal initialize signals in described four initialize signals of input is adjusted, and two signals after difference output amplitude ratio adjustment;

Described to amplitude proportional adjust after described every two orthogonal signals carry out vector addition process, comprising:

Two signals after amplitude proportional adjustment being processed respectively carry out vector addition process.

Wherein, described respectively the amplitude proportional of two orthogonal initialize signals in described four initialize signals of input is adjusted, and respectively output amplitude ratio adjust after two signals, comprising:

A signal in described two orthogonal initialize signals is carried out voltage division processing, and exports the voltage signal of the first amplitude;

Another signal in described two orthogonal initialize signals is carried out voltage division processing, and exports the voltage signal of the 2nd amplitude;

Described respectively to amplitude proportional adjustment process after two signals carry out vector addition process, comprising:

The voltage signal of described first amplitude exported is converted to electric current signal, the voltage signal of described 2nd amplitude exported is converted to electric current signal;

Two electric current signal sums are converted to voltage signal, the LO signal that the voltage signal after changing generates after processing into vector addition.

Further, described respectively the amplitude proportional of two orthogonal initialize signals in described four initialize signals of input is adjusted, and respectively output amplitude ratio adjust after two signals, comprising:

A signal in described two orthogonal signals is converted to the electric current signal of the first amplitude, and exports the electric current signal of described first amplitude;

Another signal in described two orthogonal signals is converted to the electric current signal of the 2nd amplitude, and exports the electric current signal of described 2nd amplitude;

Described respectively to amplitude proportional adjustment process after two signals carry out vector addition process, comprising:

Two electric current signal sums are converted to voltage signal, the LO signal that the voltage signal after changing generates after processing into vector addition.

In the embodiment of the present invention, except two-divider can generate four orthogonal successively initialize signals according to two inversion signals of input, and for one or more vector adder, the amplitude proportional of every two orthogonal initialize signals in these four initialize signals all can be adjusted by it, and two orthogonal signals after amplitude proportional being adjusted carry out vector addition process, such that it is able to generate four orthogonal successively LO signals, and for different vector adder, its phase shift produced can be the same or different. Therefore, the embodiment of the present invention no matter need how many kinds of phase place and frequency be f₀LO signal, its needs oscillator vibrates is at 2f₀Place, and the oscillation frequency without the need to vibrator increases along with required increasing of phase place, such that it is able to reduce design complexities and the power consumption of vibrator; And, the embodiment of the present invention according to the number of the LO signal of the not same-phase of required generation, can increase or reduce the number of vector adder flexibly, such that it is able to produce the LO signal of various phase shift very flexibly; In addition, the adding without the need to changing existing circuit structure of this vector adder, it is achieved complexity is lower.

Accompanying drawing explanation

In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, it is briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.

Fig. 1 is the electrical block diagram that existing two divided-frequency generates the LO signal of multiple phase place;

Fig. 2 is the structural representation of phase-shifter embodiment one of the present invention;

Fig. 3 be in Fig. 2 shown device vector adder realize principle schematic;

Fig. 4 is the result schematic diagram of in Fig. 2 shown device a vector adder;

Fig. 5 is the structural representation of phase-shifter embodiment two of the present invention;

Fig. 6 is a kind of structural representation of vector adder in Fig. 5 shown device;

Fig. 7 is a kind of structural representation of vector addition circuit in vector adder shown in Fig. 6;

Fig. 8 is the voltage V that vector adder produces_DVectorial schematic diagram;

Fig. 9 is the voltage V produced with reference to vector adder_DVectorial schematic diagram;

Figure 10 is another kind of structural representation of vector addition circuit in vector adder shown in Fig. 6;

Figure 11 is the schema of phase-moving method embodiment of the present invention.

Embodiment

For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments. Based on the embodiment in the present invention, those of ordinary skill in the art, not making other embodiments all obtained under creative work prerequisite, belong to the scope of protection of the invention.

Fig. 2 is the structural representation of phase-shifter embodiment one of the present invention, as shown in Figure 2, the device of the present embodiment can comprise: except two-divider 1 and at least one vector adder 2 of being connected except two-divider 1 with this, wherein, vector adder 2 is for carrying out additive operation to two vectors, and the present embodiment only illustrates to comprise four vector adder 2.

In the present embodiment, except two-divider 1 can generate four orthogonal successively initialize signals according to two inversion signals of input. Those skilled in the art should know, two inversion signals can refer to it is the relation of opposite in phase between two input signals, orthogonal successively four initialize signal generated can refer to the phase place of four initial orthogonal signals difference correspondences of generation at two-dimensional coordinate system according to sequence counter-clockwise, pairwise orthogonal successively, such as, two inversion signals of the present embodiment can be produced by vibrator, and this vibrator can be VCO, and its oscillation signal produced is the S shown in Fig. 2₁And S₂, the frequency of two signals is f₀, its phase place is respectively 0 �� and 180 ��. Two signal S₁And S₂Be input to except in two-divider 1, can generate four orthogonal successively initialize signal I, Q,Its phase place is respectively 0 ��, 90 ��, 180 �� and 270 �� and its frequency and is f₀/ 2. Should can adopt existing techniques in realizing except two-divider 1, repeat no more herein. It should be noted that, S₁And S₂Phase place be not limited to 0 �� and 180 ��, can also be such as 30 �� and 210 ��, if two signal inversion, correspondingly, four signal I, Q,Phase place be also not limited to 0 ��, 90 ��, 180 �� and 270 ��, can also be such as 30 ��, 120 ��, 210 �� and 300 ��, as long as four initialize signals are orthogonal successively.

These four initialize signals can be input in each vector adder 2, as shown in Figure 2, four LO signals of first vector adder 2 output can be expressed as LO_1_0 ��, LO_1_90 ��, LO_1_180 ��, LO_1_270 ��, wherein, LO_1_0 �� is generate by I and Q, LO_1_90 �� be by Q andGenerate, LO_1_180 �� be byWithGenerate, LO_1_270 �� be byGenerating with I, also namely these four LO signals are generate by two orthogonal initialize signals respectively.

Fig. 3 be in Fig. 2 shown device vector adder realize principle schematic, as shown in Figure 3, by two orthogonal signals V_IAnd V_QIt is added, obtains new vectorial V_SUM, its phase shift is:

$\mathrm{\θ}=\arctan \left(\frac{V_Q}{V_I}\right)$

It can thus be seen that choose two orthogonal signals V_IAnd V_QAmplitude proportional, so that it may to obtain arbitrary phase shift theta. Choosing of this amplitude proportional, such as, can adjust V_IAmplitude, it is also possible to adjustment V_QAmplitude, or V can also be adjusted_IAnd V_QAmplitude, as long as the phase shift theta obtained is required phase shift.

Therefore, in the present embodiment, each vector adder can to four initialize signal I, Q,In amplitude proportional between every two orthogonal signals adjust, and two signals after amplitude proportional being adjusted carry out vector addition process, generate four orthogonal successively LO signals, wherein, the phase shift that different vector adder produces can be the same or different, and it depends on that two signals of input vector adder are equal proportion adjustment or not equal proportion adjustment.

With the generative process of LO_1_0 �� for example, I both can have been carried out amplitude adjustment process by first vector adder 2, Q can also be carried out amplitude adjustment process, or I and Q is all carried out amplitude adjustment process, thus realize the amplitude proportional to I and Q and adjust. Such as the amplitude A of I can be adjusted to 2A by this vector adder 2, and the amplitude A retaining Q is constant, again such as, the amplitude A that this vector adder 2 can retain I is constant, and the amplitude A of Q is adjusted to 2A, again such as, the amplitude A of I can be adjusted to 3A by this vector adder 2, and the amplitude A of Q is adjusted to 2A. Then, I and Q after amplitude adjustment can be carried out vector addition process by vector adder 2. So that the amplitude A of I is adjusted to 3A and the amplitude A of Q is adjusted to 2A for example, after it carries out vector addition process, the phase shift theta obtained is:

$\mathrm{\θ}=\arctan \left(\frac{Q}{I}\right)=\arctan \left(\frac{2A}{3A}\right)=\arctan \left(\frac{2}{3}\right)$

Namely, also the LO_1_0 �� of phase shift relative to signal I is ��.

For LO_1_90 ��, first vector adder 2 can to Q andCarry out, with when generating LO_1_0 ��, the amplitude of I and Q is carried out identical adjustment, to ensure that amplitude proportional is identical, then, vector adder 2 amplitude can be adjusted after Q andCarry out vector addition process, so that the LO_1_90 �� of phase shift relative to Q is also ��. Analogize with this, LO_1_180 �� relative toPhase shift be also ��, LO_1_270 �� relative toPhase shift be also ��. Fig. 4 is the result schematic diagram of in Fig. 2 shown device a vector adder, and as shown in Figure 4, for first vector adder 2, the phase shift that its four LO signals obtained produce is identical, is ��, also, four LO signals relative to I, Q,, entirety have rotated �� phase place, and the phase place of four LO signals is still orthogonal successively.

The above-mentioned treating processes for first vector adder has been described in detail, and concerning its excess-three vector adder, its handling principle is similar. Be it should be noted that, between different vector adder, its two orthogonal initialize signals are carried out amplitude proportional when amplitude adjusts can difference can also be identical, adopt the different mode of amplitude proportional, it is ensured that the phase shift of the LO signal that different vector adder exports is different. Such as, the phase shift theta of above-mentioned first vector adder is 30 ��, and the 2nd vector adder is by after adopting the adjustment of different amplitude proportional, the phase shift theta of its four LO signals exported is such as 40 ��. Therefore, those skilled in the art can according to required signal phase place, make each vector adder that the initialize signal of input is carried out amplitude adjustment flexibly, so that each vector adder exports the LO signal of various phase shift, and, those skilled in the art according to the number of the LO signal of required phase shift, can select the number of required vector adder voluntarily. It thus is seen that it is f that the present embodiment adopts two vector adder to produce 8 frequencies₀LO signal; And vibrator, such as VCO, its oscillation frequency only needs vibration at 2f₀, and, even if needing to adopt N number of vector adder to produce 4N frequency is f₀LO signal, vibrator also without the need to promote, and only need vibration at 2f₀. Therefore, the present embodiment, when needing the LO signal generating relatively leggy, can reduce design complexities and the power consumption of vibrator.

In the phase shifter of the present embodiment, except two-divider can generate four orthogonal successively initialize signals according to two inversion signals that vibrator produces, and for one or more vector adder, the amplitude proportional of every two orthogonal initialize signals in these four initialize signals all can be adjusted by it, and two orthogonal signals after amplitude proportional being adjusted carry out vector addition process, such that it is able to generate four orthogonal successively LO signals, and for different vector adder, its phase shift produced can be the same or different. Therefore, the embodiment of the present invention no matter need how many kinds of phase place and frequency be f₀LO signal, its needs oscillator vibrates is at 2f₀Place, and the oscillation frequency without the need to vibrator increases along with required increasing of phase place, such that it is able to reduce design complexities and the power consumption of vibrator; And, the embodiment of the present invention according to the number of the LO signal of the not same-phase of required generation, can increase or reduce the number of vector adder flexibly, such that it is able to produce the LO signal of various phase shift very flexibly; In addition, the adding without the need to changing existing circuit structure of this vector adder, it is achieved complexity is lower.

Fig. 5 is the structural representation of phase-shifter embodiment two of the present invention, as shown in Figure 5, in the present embodiment, on the basis of Fig. 2 shown device structure, further, each vector adder 2 can comprise four identical vector addition circuit, and two mutual orthogonal initialize signals in described four initialize signals are carried out vector addition by each vector addition circuit respectively, and each vector addition circuit can comprise amplitude adjustment unit and vector addition unit. Wherein, the amplitude proportional that amplitude adjustment unit may be used for two mutual orthogonal initialize signals to input adjusts, and two signals after the adjustment of output amplitude ratio; Vector addition unit may be used for two signals after amplitude being adjusted and carries out vector addition process. It should be noted that, amplitude adjustment unit and vector addition unit both can be divided into two circuit realiration, it is also possible to synthesize a circuit realiration.

Further, the present embodiment also add with reference to vector adder 3, and this reference vector adder 3 is for carrying out phase correction process respectively to four LO signals. Specifically, lower for operating frequency, such as, when operating frequency is less than the 1/10 of the 3dB corner frequency of vector adder 2, it is not necessary to reference vector adder just can obtain the LO signal after required phase shift comparatively accurately. But, along with operating frequency raises, vector adder 2 itself will introduce exchange phase shift, �� in such Fig. 3 contains phase shift that vector adder produced by the adjustment of amplitude proportional and vector addition process itself and vector adder self produces exchanges phase shift, exchanging phase shift then with change of frequency, therefore, the phase shift theta produced is amplitude proportional Amp_ratio and the function of frequency f req two parameters, i.e. ��=f (freq, Amp_ratio).

Therefore, in order to eliminate the exchange phase shift that this vector adder self produces, the device of the present embodiment introduces with reference to vector adder 3, this reference vector adder 3 can adopt the circuit structure identical with any one vector adder 2, this reference vector adder 3 can also comprise four vector addition circuit and two input signals with reference to each the vector addition circuit in vector adder 3 be four signal I except two-divider 1 exports, Q,In same signal, also, using the input of two I signals as first vector addition circuit, using the input of two Q signals as the 2nd vector addition circuit, by twoSignal as the input of the 3rd vector addition circuit, by twoSignal is as the input of the 4th vector addition circuit, and the output signal of its correspondence is four LO reference signals, namely LO_ref_0 ��, LO_ref_90 ��, LO_ref_180 ��, LO_ref_270 ��. Phase shift can not be produced owing to the signal of two same-phases is carried out vector addition process by the vector addition circuit in this reference vector adder 3, therefore, the phase shift of LO reference signal is only exchange phase shift, therefore, four LO signals that the device of the present embodiment can adopt these four LO reference signals to be generated by vector adder 2 carry out phase correction process respectively, thus obtain accurate phase shifting signal.

It should be noted that, what the reference vector adder in the present embodiment adopted is the structure identical with one of them vector adder, it will be understood by those skilled in the art that, reference vector adder in the present embodiment can also adopt other structure, such as amplitude proportional adjustment can not introduce exchange phase shift, therefore, the circuit structure of amplitude adjustment unit also can be omitted, and those skilled in the art can design voluntarily.

Adopt two concrete circuit structures below, the specific implementation of the vector addition circuit in Fig. 5 shown device is described in detail.

Fig. 6 is a kind of structural representation of vector adder in Fig. 5 shown device, Fig. 7 is a kind of structural representation of vector addition circuit in vector adder shown in Fig. 6, as shown in Figures 6 and 7, Fig. 6 has illustrated four vector addition circuit, i.e. cell_1, cell_2, cell_3, cell_4, a vector addition circuit in each vector adder in each cell corresponding diagram 4, amplitude adjustment unit in vector addition circuit can adopt following circuit structure to realize: comprises two dividing potential drop circuit, i.e. the first dividing potential drop circuit and the 2nd dividing potential drop circuit, wherein, first dividing potential drop circuit, for a signal in two mutual orthogonal initialize signals is carried out voltage division processing, and export the voltage signal of the first amplitude, 2nd dividing potential drop circuit is for carrying out voltage division processing to another signal in two mutual orthogonal initialize signals, and exports the voltage signal of the 2nd amplitude. wherein, this dividing potential drop circuit both can be capacitance partial pressure circuit, it is also possible to adopt resistor voltage divider circuit, it will be appreciated that capacitance partial pressure circuit compares resistor voltage divider circuit, and it has the less advantage of noise.

Vector addition unit can adopt following circuit realiration: comprises a MOS pipe and the 2nd MOS pipe, and a loaded impedance, the grid of the one MOS pipe and the grid of the 2nd MOS pipe input the voltage signal of the first amplitude and the voltage signal of the 2nd amplitude respectively, the drain electrode of the one MOS pipe and the drain electrode of the 2nd MOS pipe are all connected with same one end of loaded impedance, the source electrode of the one MOS pipe and the source ground of the 2nd MOS pipe or power supply, the voltage signal on loaded impedance is the LO signal generated after vector addition processes. Specifically, existing MOS pipe can be divided into NMOS and PMOS two kinds, for NMOS, its source electrode can ground connection or say and connect lower level, the source electrode of PMOS then connects power supply or says and connects high level. The concrete structure of each cell can be shown in Figure 7, and its dividing potential drop circuit preferably adopts capacitance partial pressure circuit realiration. In the structure of circuit shown in Fig. 7, input voltage signal V_in1And V_in2It is two orthogonal signals, such as V in four signals except two-divider generation respectively_in1And V_in2Be respectively I and Q or be respectively Q andOr it is respectivelyWithOr it is respectivelyAnd I, i.e. V_in1And V_in2Amplitude identical, phase 90 ��. V_in1Pass through C₁And C₂The capacitance partial pressure circuit of composition obtains voltage signal V_g1, V_in2Pass through C₃And C₄The capacitance partial pressure circuit of composition obtains voltage signal V_g2, its amplitude proportional is:

$\frac{V_{g1}}{V_{g2}}=\frac{C_1}{C_1+C_2}\·\frac{C_3}{C_3+C_4}$

Therefore, by choosing C₁��C₂��C₃And C₄Different capacitances, just can obtain the amplitude proportional needed, and then can also obtain required phase shift.

Utilize the transconductance characteristic of MOS pipe, by voltage V_g1And V_g2Convert current i respectively to₁And i₂:

i₁=-g_m1��V_g1

i₂=-g_m2��V_g2

Wherein g_m1And g_m2It is MOS pipe M respectively₁And M₂Mutual conductance, two MOS pipe M in the present embodiment₁And M₂Identical MOS pipe can be adopted, its mutual conductance g_m1And g_m2Identical, therefore, current i₁And i₂Amplitude proportional and voltage V_g1And V_g2Amplitude proportional identical. At output terminal D point by current i₁And i₂Carry out vector addition, obtain vector sum i_D, i_DPhase shift theta be

$\mathrm{\θ}=\arctan \left(\frac{i_1}{i_2}\right)$

The conversion of electric current to voltage is realized again by loaded impedance R:

$V_D=i_D\·\frac{R}{1+\mathrm{j\ωRC}}$

This shows, current i_DObtain voltage V_DHave passed through again exchange phase shift ��=-acrtan (�� RC), the total phase shift of the voltage signal therefore produced is ��+��, and this exchange phase shift is error phase shift, needing to eliminate this phase shift, its concrete cancellation can adopt aforesaid with reference to vector adder realization.

As previously mentioned, the structure with reference to vector adder is identical with the structure of vector adder, and just the input signal of each cell is the identical signal in four initialize signals, the i.e. V of Fig. 7_in1And V_in2It is same signal, it is all such as the I signal of 0 �� or the Q signal of 90 ��, ensure the signal i obtained like this_DNot phase shift, and the V produced_DContains only with reference to the phase shift �� that the vector addition circuit itself in vector adder is introduced. Therefore the LO reference signal produced, namely the phase differential of the LO signal that LO_ref and other vector adder produce is arctan (i₁/i₂). Fig. 8 is the voltage V that vector adder produces_DVectorial schematic diagram, Fig. 9 is the voltage V produced with reference to vector adder_DVectorial schematic diagram. As shown in Figure 8, positive A.C. current vector produces the current i of phase shift ��_D, this loaded impedance is by i_DPhase shift �� produces voltage V again_D, as shown in Figure 9, with reference to vector adder outward current i_DWith received current i₁��i₂Homophase, its voltage V produced_DPhase shift ��, therefore Fig. 8 and Fig. 9 phase differential only ��, namely ensure that the accuracy of required phase shift.

In addition, in the present embodiment, in four orthogonal successively initialize signals, each signal as the input of two cell, can this ensure that load consistence, causes load to change for circuit parameter variations, the impact of these initialize signals is consistent, thus enhance the robust property of circuit.

Figure 10 is another kind of structural representation of vector addition circuit in vector adder shown in Fig. 6, specifically, in vector adder shown in Fig. 6 in another kind of circuit structure of vector addition circuit, in each cell, amplitude adjustment unit can comprise two MOS pipes, an i.e. MOS pipe and the 2nd MOS pipe, wherein, the source ground of a MOS pipe and the 2nd MOS pipe or power supply; One MOS pipe, for a signal in described two the mutual orthogonal initialize signals inputted from grid is converted to the electric current signal of the first amplitude, and exports the electric current signal of described first amplitude from the drain electrode of a described MOS pipe; 2nd MOS pipe, for another signal in described two the mutual orthogonal initialize signals inputted from grid is converted to the electric current signal of the 2nd amplitude, and exports the electric current signal of described 2nd amplitude from the drain electrode of described 2nd MOS pipe;

Vector addition unit can comprise loaded impedance, and the drain electrode of a MOS pipe and the drain electrode of the 2nd MOS pipe are connected with same one end of loaded impedance respectively, and the voltage signal on loaded impedance is the LO signal generated after vector addition processes, and its concrete structure is as shown in Figure 10. This kind of circuit structure is without the need to adopting capacitance partial pressure circuit or resistor voltage divider circuit, but MOS pipe can be utilized to adjust the amplitude proportional of two orthogonal initialize signals, i.e. V in Figure 10_in1And V_in2It is that amplitude is equal, orthogonal voltage signal, MOS pipe M₁Mutual conductance be g_m1, MOS pipe M₂Mutual conductance be g_m2, two MOS pipes are respectively by V_in1And V_in2Be converted to electric current signal:

i₁=-g_m1��V_in1

i₂=-g_m2��V_in2

It can thus be seen that by the MOS pipe choosing different size, namely the MOS pipe of different breadth-length ratio, obtains different mutual conductance ratios, converts the amplitude proportional of electric current accordingly to, at output terminal D point by i₁And i₂Carry out vector addition process, obtain required phase shift signal. With reason, this structure can be introduced with reference to vector adder equally to eliminate the exchange phase shift of introducing.

The technical scheme of the above embodiment of the present invention, has following useful effect:

1) circuit structure is simple, is easy to realize

The above embodiment of the present invention can utilize existing resource in radio-frequency system, namely I, Q signal produced except two-divider inputs initialize signal vector as two, original system is not changed, and just additionally add the realizing circuit of vector adder, design complicacy is lower, and circuit structure is easy to realize.

2) low-power consumption, low cost

The vector adder of the above embodiment of the present invention is common common source amplifier, does not comprise any passive device, and circuit area is little, it is achieved cost is low. And, it is not necessary to oscillator vibrates is at higher frequency place, thus also has the feature of low-power consumption.

3) broadband character

The above embodiment of the present invention, by adding vector adder, ensure that the constant of phase shift signal relative phase difference, thus eliminates frequency limitation, it is possible to realize phase shift operation in the range of frequency that this kind is very wide from low to high.

4) robust property

The above embodiment of the present invention is by adding with reference to vector adder so that the exchange phase shift that vector adder itself is introduced is effectively eliminated, and enhances the robust property of circuit.

Figure 10 is the schema of phase-moving method embodiment of the present invention, and as shown in Figure 10, the method for the present embodiment can comprise:

Step 101, two inversion signals according to input generate four orthogonal successively initialize signals;

Step 102, the amplitude proportional of every two orthogonal initialize signals in described four initialize signals is adjusted, and described every two the orthogonal signals after amplitude proportional being adjusted carry out vector addition process, generate four orthogonal successively LO signals.

The method of the present embodiment can realize based on Fig. 2 shown device structure, and it realizes principle and corresponding technique effect describes in detail in device embodiment, repeats no more herein.

When specific implementation, the amplitude proportional of every two orthogonal initialize signals in described four initialize signals is adjusted by above-mentioned steps 102, can comprise: respectively the amplitude proportional of two orthogonal initialize signals in described four initialize signals of input is adjusted, and two signals after difference output amplitude ratio adjustment; Described every two orthogonal signals after amplitude being adjusted in above-mentioned steps 102 carry out vector addition process, it is possible to comprising: two signals after amplitude proportional adjustment being processed respectively carry out vector addition process. This specific implementation process can realize based on the structure of Fig. 5 shown device, its realize principle and technique effect similar, repeat no more herein.

Further, above-mentioned respectively the amplitude proportional of two orthogonal initialize signals in described four initialize signals of input is adjusted, and respectively output amplitude ratio adjust after two signals, it is possible to adopt following scheme to realize:

A signal in described two orthogonal initialize signals is carried out voltage division processing, and exports the voltage signal of the first amplitude;

Another signal in described two orthogonal initialize signals is carried out voltage division processing, and exports the voltage signal of the 2nd amplitude;

Above-mentioned respectively to amplitude adjustment process after two signals carry out vector addition process, it is possible to adopt following scheme to realize:

The voltage signal of the first amplitude exported is converted to electric current signal, the voltage signal of the 2nd amplitude exported is converted to electric current signal;

Two electric current signal sums are converted to voltage signal, the LO signal that the voltage signal after changing generates after processing into vector addition.

When specific implementation, above-mentioned voltage division processing both can adopt two capacitance partial pressure circuit realiration, it is also possible to adopts two resistor voltage divider circuits; Therefore, the method for the above embodiment of the present invention also comprises:

Phase shift according to required generation, it is determined that the capacitance size in two capacitance partial pressure circuit or the resistance sizes in two resistor voltage divider circuits.

This specific implementation process can realize based on Fig. 6 and Fig. 7 shown device structure, its realize principle and technique effect similar, repeat no more herein.

Alternatively, above-mentioned respectively the amplitude proportional of two orthogonal initialize signals in described four initialize signals of input is adjusted, and respectively output amplitude ratio adjust after two signals, it is possible to adopt following scheme to realize:

A signal in described two orthogonal signals is converted to the electric current signal of the first amplitude, and exports the electric current signal of described first amplitude;

Another signal in described two orthogonal signals is converted to the electric current signal of the 2nd amplitude, and exports the electric current signal of described 2nd amplitude;

Above-mentioned respectively to amplitude proportional adjustment process after two signals carry out vector addition process, it is possible to adopt following scheme to realize:

Two electric current signal sums are converted to voltage signal, the LO signal that the voltage signal after changing generates after processing into vector addition.

When specific implementation, it is possible to adopting two MOS pipes that two orthogonal signals are converted to electric current signal respectively, correspondingly, the method for the above embodiment of the present invention can also comprise:

Phase shift according to required generation, it is determined that the mutual conductance size of two MOS pipes.

This specific implementation process can realize based on Fig. 6 and Figure 10 shown device structure, its realize principle and technique effect similar, repeat no more herein.

On the basis of aforesaid method embodiment, further, it is also possible to generate four the LO reference signals being used for four LO signals carry out phase correction process respectively.

This specific implementation process can realize based on Fig. 5, Fig. 7, Figure 10 shown device structure, its realize principle and technique effect similar, repeat no more herein.

One of ordinary skill in the art will appreciate that: all or part of step realizing above-mentioned each embodiment of the method can be completed by the hardware that programmed instruction is relevant. Aforesaid program can be stored in a computer read/write memory medium. This program, when performing, performs the step comprising above-mentioned each embodiment of the method; And aforesaid storage media comprises: ROM, RAM, magnetic disc or CD etc. various can be program code stored medium.

Last it is noted that above each embodiment is only in order to illustrate the technical scheme of the present invention, it is not intended to limit; Although with reference to foregoing embodiments to invention has been detailed description, it will be understood by those within the art that: the technical scheme described in foregoing embodiments still can be modified by it, or wherein some or all of technology feature is carried out equivalent replacement; And these amendments or replacement, do not make the scope of the essence disengaging various embodiments of the present invention technical scheme of appropriate technical solution.

Claims (11)

1. a phase shifter, it is characterised in that, comprising: except two-divider and with described at least one vector adder being connected except two-divider;

Described except two-divider, generate four orthogonal successively initialize signals for two inversion signals according to input;

Described vector adder, for the amplitude proportional of every two orthogonal initialize signals in described four initialize signals is adjusted, and described every two the orthogonal signals after amplitude proportional being adjusted carry out vector addition process, generate four orthogonal successively local oscillator LO signals; Wherein, the phase shift of LO signal described in each is the arc-tangent value of the Amplitude Ratio of described two the orthogonal initialize signals generating described LO signal;

Also comprise:

With reference to vector adder, for described four LO signals are carried out phase correction process respectively.

2. phase shifter according to claim 1, it is characterized in that, described vector adder comprises four identical vector addition circuit, two mutual orthogonal initialize signals in described four initialize signals are carried out vector addition by each vector addition circuit respectively, and each vector addition circuit comprises amplitude adjustment unit and vector addition unit;

Described amplitude adjustment unit, for the amplitude proportional of described two mutual orthogonal initialize signals of input is adjusted, and two signals after the adjustment of output amplitude ratio;

Described vector addition unit, carries out vector addition process for two signals after amplitude proportional being adjusted.

3. phase shifter according to claim 2, it is characterised in that, described amplitude adjustment unit comprises the first dividing potential drop circuit and the 2nd dividing potential drop circuit;

Described first dividing potential drop circuit, for a signal in described two mutual orthogonal initialize signals is carried out voltage division processing, and exports the voltage signal of the first amplitude;

Described 2nd dividing potential drop circuit, for another signal in described two mutual orthogonal initialize signals is carried out voltage division processing, and exports the voltage signal of the 2nd amplitude;

Described vector addition unit, comprise a MOS pipe and the 2nd MOS pipe, and a loaded impedance, the grid of the one MOS pipe and the grid of the 2nd MOS pipe input the voltage signal of described first amplitude and the voltage signal of the 2nd amplitude respectively, the drain electrode of a described MOS pipe and the drain electrode of the 2nd MOS pipe are all connected with same one end of described loaded impedance, the source electrode of a described MOS pipe and the source ground of the 2nd MOS pipe or power supply, the voltage signal on described loaded impedance is the LO signal generated after vector addition processes.

4. phase shifter according to claim 3, it is characterised in that, described dividing potential drop circuit is capacitance partial pressure circuit or resistor voltage divider circuit.

5. phase shifter according to claim 2, it is characterised in that, described amplitude adjustment unit comprises a MOS pipe and the 2nd MOS pipe, the source ground of a described MOS pipe and the 2nd MOS pipe or power supply;

A described MOS pipe, for a signal in described two the mutual orthogonal initialize signals inputted from grid is converted to the electric current signal of the first amplitude, and exports the electric current signal of described first amplitude from the drain electrode of a described MOS pipe;

Described 2nd MOS pipe, for another signal in described two the mutual orthogonal initialize signals inputted from grid is converted to the electric current signal of the 2nd amplitude, and exports the electric current signal of described 2nd amplitude from the drain electrode of described 2nd MOS pipe;

Described vector addition unit, comprises loaded impedance, and the drain electrode of a described MOS pipe and the drain electrode of described 2nd MOS pipe are connected with same one end of described loaded impedance respectively, and the voltage signal on described loaded impedance is the LO signal generated after vector addition processes.

6. phase shifter according to claim 2, it is characterized in that, described identical with the structure of described vector adder with reference to vector adder, described two input signals with reference to each the vector addition circuit in vector adder are the same signal in described four initialize signals and output signal is LO reference signal, and described four the LO reference signals exported with reference to four vector addition circuit in vector adder are for carrying out phase correction process respectively to described four LO signals.

7. phase shifter according to any one of claim 1��6, it is characterised in that, also comprise:

Vibrator, for generation of described two inversion signals, and to described except two-divider described two inversion signals of input.

8. a phase-moving method, it is characterised in that, comprising:

Two inversion signals according to input generate four orthogonal successively initialize signals;

The amplitude proportional of every two orthogonal initialize signals in described four initialize signals is adjusted, and described every two the orthogonal signals after amplitude proportional being adjusted carry out vector addition process, generate four orthogonal successively LO signals; Wherein, the phase shift of LO signal described in each is the arc-tangent value of the Amplitude Ratio of described two the orthogonal initialize signals generating described LO signal;

Also comprise: generate four the LO reference signals being used for described four LO signals carry out phase correction process respectively.

9. method according to claim 8, it is characterised in that, described the amplitude proportional of every two orthogonal initialize signals in described four initialize signals is adjusted, comprising:

Respectively the amplitude proportional of two orthogonal initialize signals in described four initialize signals of input is adjusted, and two signals after difference output amplitude ratio adjustment;

Described to amplitude proportional adjust after described every two orthogonal signals carry out vector addition process, comprising:

Two signals after amplitude proportional adjustment being processed respectively carry out vector addition process.

10. method according to claim 9, it is characterised in that, described respectively the amplitude proportional of two orthogonal initialize signals in described four initialize signals of input is adjusted, and respectively output amplitude ratio adjust after two signals, comprising:

A signal in described two orthogonal initialize signals is carried out voltage division processing, and exports the voltage signal of the first amplitude;

Another signal in described two orthogonal initialize signals is carried out voltage division processing, and exports the voltage signal of the 2nd amplitude;

Described respectively to amplitude proportional adjustment process after two signals carry out vector addition process, comprising:

The voltage signal of described first amplitude exported is converted to electric current signal, the voltage signal of described 2nd amplitude exported is converted to electric current signal;

Two electric current signal sums are converted to voltage signal, the LO signal that the voltage signal after changing generates after processing into vector addition.

11. methods according to claim 9, it is characterised in that, described respectively the amplitude proportional of two orthogonal initialize signals in described four initialize signals of input is adjusted, and respectively output amplitude ratio adjust after two signals, comprising:

A signal in described two orthogonal signals is converted to the electric current signal of the first amplitude, and exports the electric current signal of described first amplitude;

Another signal in described two orthogonal signals is converted to the electric current signal of the 2nd amplitude, and exports the electric current signal of described 2nd amplitude;

Described respectively to amplitude proportional adjustment process after two signals carry out vector addition process, comprising:

Two electric current signal sums are converted to voltage signal, the LO signal that the voltage signal after changing generates after processing into vector addition.