CN102810524A - Power module and production method of power module - Google Patents

Power module and production method of power module Download PDF

Info

Publication number
CN102810524A
CN102810524A CN2012101677706A CN201210167770A CN102810524A CN 102810524 A CN102810524 A CN 102810524A CN 2012101677706 A CN2012101677706 A CN 2012101677706A CN 201210167770 A CN201210167770 A CN 201210167770A CN 102810524 A CN102810524 A CN 102810524A
Authority
CN
China
Prior art keywords
layer
burn till
semiconductor element
circuit layer
till
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2012101677706A
Other languages
Chinese (zh)
Other versions
CN102810524B (en
Inventor
仙石文衣理
西元修司
西川仁人
长友义幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Corp
Original Assignee
Mitsubishi Materials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2012011140A external-priority patent/JP5966379B2/en
Application filed by Mitsubishi Materials Corp filed Critical Mitsubishi Materials Corp
Publication of CN102810524A publication Critical patent/CN102810524A/en
Application granted granted Critical
Publication of CN102810524B publication Critical patent/CN102810524B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides

Abstract

The invention provides a power module having a semiconductor element accurately joint on one face of a circuit layer and having excellent thermal cycle and power cycle reliabilities, and a production method of the power module. The power module (1) comprises a power-module-used substrate (10) provided with a circuit layer (12) on one face of an insulation layer (11) and a semiconductor element (3) carried by the circuit layer (12), and is characterized in that, a first firing layer (31) composed of a firing material containing a glass constituent containing a glass Ag paste is formed on one face of the circuit layer (12), and a second firing layer (38) composed of a Ag firing material obtained by the reduction of silver oxide is formed on the first firing layer (31).

Description

The manufacturing approach of power model and power model
Technical field
The present invention relates to a kind of power module substrate and the manufacturing approach that is equipped on power model and this power model of the semiconductor element on the said circuit layer that is equipped with circuit layer in the one side of insulating barrier that possess.
Background technology
In various semiconductor elements; For the big electric power that control electric automobile or motor vehicle etc. use is controlled with power component because caloric value is more; Therefore as the substrate that carries this power component, be widely used for example engages the power module substrate of the metallic plate of excellent electric conductivity as circuit layer all the time on the ceramic substrate by formations such as AlN (aluminium nitride).
And, carry semiconductor element through the scolding tin material on the circuit layer of this power module substrate as power component.In addition, as the known substrate that following structure is arranged of this power module substrate, promptly it also to engage the excellent metallic plate of heat conductivity and engages the structure that cooler dispels the heat through this metallic plate at the ceramic substrate lower surface in order to dispel the heat.
As the metal of forming circuit layer, use aluminum or aluminum alloy or copper or copper alloy.
Wherein, in the circuit layer that constitutes by aluminium,, therefore can't engage well with the scolding tin material owing to form the oxide scale film of aluminium on the surface.And in the circuit layer that is made up of copper, the inside that has scolding tin material and the copper of fusion to react to make a circuit layer is infiltrated the composition of scolding tin material and is made the such problem of conductivity deterioration of circuit layer.
Therefore, for example as disclosed in the patent documentation 1, in the past, all be to form the Ni electroplating film on the surface of circuit layer, and on this Ni electroplating film, set the scolding tin material and come the bond semiconductor element through electroless plating etc.
In addition, propose to have the technology of not using the scolding tin material and using Ag nanometer cream to come the bond semiconductor element in the patent documentation 2.
In addition, in patent documentation 3 and 4, propose to have the technology of not using the scolding tin material and using the oxide paste bond semiconductor element of the reducing agent that comprises metal oxide particle and constitute by organic substance.
Patent documentation 1: the open 2004-172378 communique of Japan Patent
Patent documentation 2: the open 2006-202938 communique of Japan Patent
Patent documentation 3: the open 2008-208442 communique of Japan Patent
Patent documentation 4: the open 2009-267374 communique of Japan Patent
Yet; Described in patent documentation 1; The power module substrate that forms the Ni electroplating film on the circuit layer surface has following worry; In the process till the bond semiconductor element, the surface of Ni electroplating film reduces with the joint reliability of the semiconductor element that engages through the scolding tin material because of deteriorations such as oxidations.
In addition; When on power module substrate, engaging cooler with soldering; Then cause Ni electroplating film deterioration if after circuit layer surface forms the Ni electroplating film, carry out soldering etc.; Therefore, general following carrying out: power module substrate and cooler are carried out soldering form after the power module substrate of being with cooler, the power module substrate of whole this band cooler is immersed in the electroplating bath.At this moment, the part beyond the circuit layer also can form the Ni electroplating film, when cooler is made up of aluminum or aluminum alloy, might between cooler that is made up of aluminium and Ni electroplating film, galvanic corrosion take place.Therefore, in Ni electroplating film operation, have and to carry out mask process in order to avoid form the Ni electroplating film at quencher moiety.So, when after carrying out mask process, carrying out electroplating processes, only be used for partly forming a large amount of labours of Ni electroplating film needs the problem that exists the manufacturing cost of power model significantly to increase and so at circuit layer.
On the other hand; As disclosed in the patent documentation 2; Do not use the scolding tin material and when using Ag nanometer cream bond semiconductor element; Because the knitting layer that is made up of Ag nanometer cream forms thickness and is thinner than the scolding tin material,, the anxiety of the semiconductor element of causing breakage itself is arranged so stress is prone to act on semiconductor element during the thermal cycle load.
In addition, as disclosed in the patent documentation 3,4, when with metal oxide and reducing agent bond semiconductor element, the layer that burns till of oxide paste still forms thinlyyer, so stress is prone to act on semiconductor element during the thermal cycle load.
Particularly recently along with the miniaturization of power model or the propelling of thin-walled property, its environment for use is also strict further, and the tendency that increases from the caloric value of electronic unit is arranged.Therefore, when using power model, the stress that acts on the joint interface of circuit layer and semiconductor element also has the tendency of increase, with the joint reliability of comparing between further requirement raising circuit layer and the semiconductor element in the past.
Summary of the invention
The present invention accomplishes in view of afore-mentioned, and its purpose is to provide a kind of semiconductor element to be engaged in the one side of circuit layer exactly, and thermal cycle and the power model of power cycle reliability excellence and the manufacturing approach of power model.
For solving this problem; Realize above-mentioned purpose; The one side that power model of the present invention possesses at insulating barrier is equipped with the power module substrate of circuit layer and is equipped on the semiconductor element on the said circuit layer; Wherein, the one side of said circuit layer be formed with by contain glass ingredient contain glass Ag cream burn till that body constitutes the 1st burn till layer, the 1st burn till that the Ag that is formed with on the layer by the silver oxide reduction burns till that body constitutes the 2nd burn till layer.
Power model according to this structure; Since circuit layer simultaneously be formed with by contain glass ingredient contain glass Ag cream burn till that body constitutes the 1st burn till layer; Therefore; Can remove the oxide scale film that is formed at circuit layer surface by glass ingredient, and can guarantee that the 1st burns till the bond strength of layer and circuit layer.
And, since the 1st burn till that the Ag that is formed with on the layer by silver oxide reduction burns till that body constitutes the 2nd burn till layer, therefore can form the 2nd element of bond semiconductor when burning till layer.At this, when reduction-oxidation silver, can generate fine Ag particle, therefore can make the 2nd to burn till the structure that layer becomes densification.
In addition, owing to range upon range ofly have the 1st to burn till layer and the 2nd burn till layer, therefore can guarantee the thickness of the knitting layer between circuit layer and semiconductor element.Thus, stress also can prevent the breakage of semiconductor element itself in the time of can suppressing the thermal cycle load in semiconductor element.
At this, preferably be made as following structure, the promptly said the 1st burns till layer possesses the glassy layer of the one side that is formed at circuit layer and is laminated in the Ag layer on this glassy layer, is dispersed with glass particle on the said Ag layer.
At this moment, can the oxide scale film that be formed at circuit layer surface and glassy layer be reacted removes, and accurately bonded circuitry layer and semiconductor element.
At this, the preferred the said the 2nd burns till the body that burns till that layer becomes the oxidation silver paste that comprises silver oxide and reducing agent.
At this moment, when burning till the oxidation silver paste, silver oxide accurately reduces through reducing agent, thereby can generate fine Ag particle, can make the 2nd to burn till the structure that layer becomes densification.And, because reducing agent is decomposed when reduction-oxidation silver, therefore is difficult to remain in the 2nd and burns till in the layer, therefore can guarantee that the 2nd burns till the conductivity in the layer.In addition, can therefore can the junction temperature of semiconductor element be suppressed lower, and can lower heat load for example burning till under 300 ℃ and so on the lower temperature condition to semiconductor element.
Said oxidation silver paste can also contain the Ag particle except that said silver oxide and said reducing agent.
At this moment, the Ag particle that is contained in silver oxide reduction and the Ag particle that obtains and the oxidation silver paste burns till, thereby can burn till the structure that layer is made as densification with the 2nd.In addition, preferably as the average grain diameter of Ag particle below the above 800nm of 20nm.
In addition, preferred said insulating barrier is for being selected from AlN, Si 3N 4Or Al 2O 3Ceramic substrate.
Be selected from AlN, Si 3N 4Or Al 2O 3The insulating properties and the excellent strength of ceramic substrate, can seek to improve the reliability of power model.In addition, can come to form like a cork circuit layer through bonding metal plates on this ceramic substrate.
The manufacturing approach of power model of the present invention; The one side that said power model possesses at insulating barrier is equipped with the power module substrate of circuit layer and is equipped on the semiconductor element on the said circuit layer; In the said method, possess: through contain in the coating of the one side of said circuit layer glass ingredient contain glass Ag cream and carry out heat treated form the said the 1st burn till layer operation; Burn till the operation that is coated with the oxidation silver paste that comprises silver oxide and reducing agent on the layer the said the 1st; Operation at coated oxidation silver paste laminated semiconductor element; And with said semiconductor element and said power module substrate with range upon range of state heat come the said the 1st burn till form on the layer the 2nd burn till layer operation, and, engage said semiconductor element and said circuit layer.
Manufacturing approach according to the power model of this structure; Since possess the coating of the one side of said circuit layer contain glass ingredient contain glass Ag cream and carry out heat treated form the said the 1st burn till layer operation; Therefore can remove the oxide scale film on the surface that is formed at circuit layer, and bonded circuitry layer and the 1st burns till layer exactly.
In addition; Since possess the said the 1st burn till on the layer coating comprise the oxidation silver paste of silver oxide and reducing agent operation, the operation of coated oxidation silver paste laminated semiconductor element, and with said semiconductor element and said power module substrate with range upon range of state heat come the said the 1st burn till form on the layer the 2nd burn till layer operation, so can engage said semiconductor element and said circuit layer when burning till layer burning till the 2nd.
At this, be preferably formed the 2nd burn till oxidation silver paste described in the operation of layer firing temperature more than 150 ℃ below 400 ℃.
At this moment, because the firing temperature of said oxidation silver paste becomes below 400 ℃, therefore can when burn till the oxidation silver paste and come the bond semiconductor element, suppress temperature lower, and can lower heat load to semiconductor element.And,, therefore can remove reducing agent contained in the oxidation silver paste etc., and can guarantee that the 2nd burns till conductivity and the intensity in the layer because the firing temperature of said oxidation silver paste becomes more than 150 ℃.
And, be preferably formed the said the 1st and burn till the firing temperature that contains glass Ag cream described in the operation of layer more than 350 ℃ below 645 ℃.
At this moment,, therefore can remove the organic principle that contains in the glass Ag cream etc., and can accurately form the 1st and burn till layer because the said firing temperature that contains glass Ag cream becomes more than 350 ℃.And,, therefore can prevent the thermal degradation when of circuit layer or insulating barrier because the said firing temperature that contains glass Ag cream becomes below 645 ℃.
In addition, preferably burn till in the operation of layer, said semiconductor element and said power module substrate are heated with the state to the stacked direction pressurization in formation the said the 2nd.
At this moment, bond semiconductor element and power module substrate more exactly.
And said oxidation silver paste can also contain the Ag particle except that said silver oxide and said reducing agent.
At this moment, the Ag particle between silver oxide powder, the Ag particles sintering that is contained in silver oxide reduction and the Ag particle that obtains and the oxidation silver paste, thus can make the 2nd to burn till layer and become the structure of densification more.And, can when engaging, set the moulding pressure of semiconductor element lower.And, preferably as the average diameter of Ag particle below the above 800nm of 20nm.
Can provide a kind of semiconductor element to be engaged in the circuit layer one side exactly according to the present invention, and thermal cycle and the power model of power cycle reliability excellence and the manufacturing approach of power model.
Description of drawings
Fig. 1 is the summary description figure as the power model of execution mode of the present invention.
Fig. 2 is the amplification key diagram of joint interface of circuit layer and the semiconductor element of power model shown in Figure 1.
Fig. 3 is the amplification key diagram on the circuit layer surface of Fig. 2.
Fig. 4 is the flow chart that expression contains the manufacturing approach of glass Ag cream.
Fig. 5 is the flow chart of the manufacturing approach of expression oxidation silver paste.
Fig. 6 is the flow chart of manufacturing approach of the power model of presentation graphs 1.
Fig. 7 is the cross-section photo of joint interface of circuit layer and semiconductor element of the power model of the present invention example 1.
Symbol description
The 1-power model, the 3-semiconductor element, the 10-power module substrate, 11-ceramic substrate (insulating barrier), the 12-circuit layer, 31-the 1st burns till layer, the 32-glassy layer, the 33-Ag layer, the 34-electroconductive particle, the 35-glass particle, 38-the 2nd burns till layer.
Embodiment
Below, with reference to accompanying drawing execution mode of the present invention is described.Fig. 1 representes the power model as execution mode of the present invention.
The semiconductor chip 3 of the one side (being upper surface among Fig. 1) that this power model 1 possesses the power module substrate 10 that is equipped with circuit layer 12 is arranged, be engaged in circuit layer 12 and be equipped on the cooler 40 of the opposite side of power module substrate 10.
The circuit layer 12 of the one side that power module substrate 10 possesses the ceramic substrate 11 that constitutes insulating barrier is arranged, be equipped on this ceramic substrate 11 and be equipped on the metal level 13 of the another side of ceramic substrate 11.
Ceramic substrate 11 prevents the electric connection between circuit layer 12 and the metal level 13, and it is made up of the higher AlN of insulating properties (aluminium nitride).And the thickness setting of ceramic substrate 11 is set at 0.635mm in this execution mode in the scope of 0.2~1.5mm.
Circuit layer 12 engages the metallic plate with conductivity through the one side at ceramic substrate 11 and forms.In this execution mode, the aluminium sheet that circuit layer 12 constitutes through aluminium (so-called 4N aluminium) the calendering plate that is reached by purity more than 99.99% is engaged in ceramic substrate 11 and forms.
Metal level 13 forms through the another side bonding metal plates at ceramic substrate 11.In this execution mode, identical with circuit layer 12, the aluminium sheet that metal level 13 constitutes through aluminium (so-called 4N aluminium) the calendering plate that is reached by purity more than 99.99% is engaged in ceramic substrate 11 and forms.
Cooler 40 is used to cool off the aforementioned power module with substrate 10, and it possesses the top plate portion 41 that engages with power module substrate 10 is arranged, from this top plate portion 41 hang down towards the below fin of establishing 42 and the passage 43 that is used to make coolant (for example cooling water) circulation.This cooler 40 (top plate portion 41) preferably is made up of the good material of heat conductivity, is made up of A6063 (aluminium alloy) in this execution mode.
In addition, in this execution mode, be provided with by aluminum or aluminum alloy between the top plate portion 41 of cooler 40 and the metal level 13 or comprise the resilient coating 15 that the composite wood (for example AlSiC etc.) of aluminium constitutes.
And, in power model shown in Figure 11, be formed with between circuit layer 12 and the semiconductor element 3 the 1st burn till the layer the 31 and the 2nd burn till the layer 38.Wherein, the one side of circuit layer 12 range upon range of have the 1st burn till the layer 31, and the 1st burn till the layer 31 laminated have the 2nd burn till the layer 38, the 2nd burn till the layer 38 laminated semiconductor element 3 is arranged.
In addition, as shown in Figure 1, the 1st burns till layer the 31 and the 2nd burns till layer and 38 is not formed at the whole surface of circuit layer 12, but only optionally is formed at the part that sets semiconductor chip 3.
At this, as after state, the 1st burns till layer 31 becomes the body that burns till that contains glass Ag cream that comprises glass ingredient.Like Fig. 2 and shown in Figure 3, the 1st burns till layer 31 possesses and the glassy layer 32 that is formed at circuit layer 12 sides is arranged and be formed at the Ag layer 33 on this glassy layer 32.
Glassy layer 32 inside are dispersed with particle diameter for counting the fine electroconductive particle 34 about nanometer.This electroconductive particle 34 becomes and contains crystallinity particle at least a among Ag or the Al.In addition, the electroconductive particle 34 in the glassy layer 32 can be observed through for example utilizing transmission-type electronics display device (TEM).
In addition, the inside of Ag layer 33 is dispersed with particle diameter for counting the fine glass particle 35 about nanometer.
In addition, the 1st burn till layer 31 thickness direction resistance value P become below 0.5 Ω.At this, in this execution mode, the 1st burns till resistance value P on layer 31 the thickness direction is made as the 1st resistance value of burning till between the upper surface of upper surface and circuit layer 12 of layer 31.This be because, with the 1st burn till layer 31 thickness direction resistance compare, the resistance of the 4N aluminium of forming circuit layer 12 is very little.In addition; When measuring this resistance; Measure the 1st and burn till layer 31 upper surface central point and the resistance between the point on the circuit layer 12, the point and the 1st on this circuit layer 12 burns till layer 31 end distance apart and is and the 1st burns till the equal distance of distance that layers 31 said upper surface central point to the 1 burns till layer 31 end.
In addition, in this execution mode, constitute, therefore be formed with spontaneous alumina epithelium in atmosphere on the surface of circuit layer 12 because circuit layer 12 reaches 99.99% aluminium by purity.At this, be formed with the 1st and burn till in layer 31 the part aforesaid, this alumina epithelium is removed, on circuit layer 12, directly is formed with the 1st and burns till layer 31.That is, directly engage the aluminium and the glassy layer 32 of forming circuit layer 12.
Constitute in this execution mode, the thickness t g of glassy layer 32 is 0.01 μ m≤tg≤5 μ m, and the thickness t a of Ag layer 33 is 1 μ m≤ta≤100 μ m, and the whole the 1st to burn till layer 31 thickness t 1 be 1.01 μ m≤t1≤105 μ m.
Being formed at the said the 1st, to burn till layer be that the Ag that the 2nd on the Ag layer 33 burns till layer 38 and become the silver oxide reduction burns till body on 31, in this execution mode, as after state, become the body that burns till of the oxidation silver paste that comprises silver oxide and reducing agent.Wherein, the particle of on Ag layer 33 surface that generate through reduction-oxidation silver, separating out is the very fine particle of 10nm~1 μ m for for example particle diameter, therefore can form fine and close Ag and burn till layer.In addition, the 2nd burns till in the layer 38, burns till in layer 31 the Ag layer 33 that observed glass particle does not exist or considerably less the 1st.Can differentiate the 1st according to the density of this glass particle burns till layer 31 Ag layer 33 and the 2nd and burns till layers 38.
In this execution mode, the 2nd burns till layer 38 thickness t 2 becomes 5 μ m≤t2≤50 μ m.
Below, burn till layer 31 the glass Ag cream that contains and describe constituting the 1st.
This contains leadless glass powder, resin, solvent and dispersant that glass Ag cream contains the Ag powder, contains ZnO; The content of the powder composition that is made up of Ag powder and leadless glass powder is more than the whole 60 quality % that contain glass Ag cream below the 90 quality %, and remainder is resin, solvent, dispersant.In addition, in this execution mode, the content of the powder composition that is made up of Ag powder and leadless glass powder is the whole 85 quality % that contain glass Ag cream.
In addition, this viscosity that contains glass Ag cream is adjusted into below the above 500Pas of 10Pas, more preferably is adjusted into below the above 300Pas of 50Pas.
The particle diameter of Ag powder is that using average grain diameter in this execution mode is the Ag powder of 0.8 μ m below the above 1.0 μ m of 0.05 μ m.
Comprise Bi as principal component in the leadless glass powder 2O 3, ZnO, B 2O 3, its vitrification point is more than 300 ℃ below 450 ℃, and softening temperature is below 600 ℃, and crystallization temperature is more than 450 ℃.In addition, the weight ratio A/G of the weight A of Ag powder and the weight G of leadless glass powder is adjusted in 80/20 to 99/1 scope, is made as A/G=80/5 in this execution mode.
It is the material more than 200 ℃ that solvent is suitably for boiling point, uses dibutyl ethylene glycol ether in this execution mode.
The resin adjustment contains the viscosity of glass Ag cream, and it is suitably for the material that is decomposed more than 500 ℃.Use ethyl cellulose in this execution mode.
And in this execution mode, adding dicarboxylic acids is dispersant.In addition, can not add dispersant and contain glass Ag cream with regard to constituting.
At this, the leadless glass powder that uses in this execution mode is elaborated.The glass combination of the leadless glass powder in this execution mode becomes as follows:
Bi 2O 3: below the above 93 quality % of 68 quality %,
Below the above 20 quality % of ZnO:1 quality %,
B 2O 3: below the above 11 quality % of 1 quality %,
SiO 2: more than the 5 quality %,
Al 2O 3: more than the 5 quality %,
Fe 2O 3: more than the 5 quality %,
More than the CuO:5 quality %,
CeO 2: more than the 5 quality %,
ZrO 2: more than the 5 quality %,
Alkali metal oxide: below the 2 quality %,
Alkaline-earth metals oxide: below the 7 quality %.
That is, with Bi 2O 3, ZnO, B 2O 3Be made as neccessary composition, suitably add SiO on this basis on demand 2, Al 2O 3, Fe 2O 3, CuO, CeO 2, ZrO 2, Li 2O, Na 2O, K 2Alkaline-earth metals oxides such as alkali metal oxides such as O and MgO, CaO, BaO, SrO.
The leadless glass powder of this ZnO of containing is made as follows.Use above-mentioned various oxide, carbonate or ammonium salt as raw material.With this raw material pack into platinum crucible, alumina crucible or silica crucible etc., fusion in calciner.Melting condition does not have particular restriction, but for raw material is all evenly mixed with liquid phase, preferably is located at more than 900 ℃ in the scope below 1300 ℃, more than 30 minutes below 120 minutes.
Be fed into middle quenching such as carbon, iron and steel, copper coin, pair roller, water through fused mass and produce uniform glass blocks gained.
Through with this glass blocks of pulverizing such as ball mill, aeropulverizer and oversize grain is carried out classification obtain leadless glass powder.At this, in this execution mode, the average grain diameter d50 of leadless glass powder is located at more than the 0.1 μ m in the scope below the 5.0 μ m.
Then, with reference to flow chart shown in Figure 4 the manufacturing approach that contains glass Ag cream is described.
At first, mix aforementioned Ag powder and leadless glass powder and generate mixed-powder (mixed-powder forms operation S01).And mixed solvent and resin generate organic mixture (organic substance mixed processes S02).
Then, through blender mixed-powder, organic mixture and dispersant are carried out premix (premix operation S03).
Mix (mixing operation S04) when then, utilizing roller mill to rub pre-composition.
Then, the mixing thing with gained filters (filtering operation S05) through the cream filter.
So, produce the aforementioned glass Ag cream that contains.
Then, burn till layer 38 oxidation silver paste and describe constituting the 2nd.
This oxidation silver paste contains silver oxide powder, reducing agent, resin and solvent.In this execution mode, except that these compositions, also contain the organo-metallic compound powder.
The content of silver oxide powder is below the above 80 quality % of 60 quality % of whole oxidation silver paste; The content of reducing agent is below the above 15 quality % of 5 quality % of whole oxidation silver paste; The content of organo-metallic compound powder is that remainder is a solvent below the above 10 quality % of 0 quality % of whole oxidation silver paste.At this,, do not add dispersant or resin in the oxidation silver paste for suppressing the 2nd to burn till remaining unreacted organic substance in the layer 38 through what sintering obtained.
In addition, the viscosity of this oxidation silver paste is adjusted into below the above 100Pas of 10Pas, more preferably is adjusted into below the above 80Pas of 30Pas.
Using particle diameter is the silver oxide powder below the above 40 μ m of 0.1 μ m.In addition, this silver oxide powder can be bought commercially available article.
Reducing agent is the organic substance with reproducibility, for example can use alcohol, organic acid.
If alcohol then can use for example monohydric alcohols such as methyl alcohol, ethanol, propyl alcohol, butanols, amylalcohol, hexanol, octanol, nonyl alcohol, decyl alcohol, tip-nip, dodecanol, laruyl alcohol, myristyl alcohol, hexadecanol, octadecanol.In addition, except that these, also can use the compound of a plurality of alcohol radicals.
If organic acid for example then can use saturated fatty acids such as butyric acid, valeric acid, caproic acid, enanthic acid, sad, n-nonanoic acid, capric acid, hendecanoic acid, dodecylic acid, tridecanoic acid, tetradecanoic acid, pentadecanoic acid, hexadecanoic acid, Heptadecanoic acide, octadecanoid acid, nonadecylic acid.In addition, except that these, also can use unrighted acid.
In addition, if mix the reducing agent that the back is difficult for taking place reduction reaction, then can improve the storage stability of oxidation silver paste with silver oxide powder.Therefore, as reducing agent, preferred fusing point is the above reducing agent of room temperature, particularly; Preferred myristyl alcohol, 1-dodecanol, 2,5-dimethyl-2, the 5-hexylene glycol, 2 of using; 2-dimethyl-1, ammediol, 1,6-hexylene glycol, 1; 2,6-hexanetriol, 1,10-decanediol, myristic acid, capric acid etc.
Organo-metallic compound has the effect through the reduction reaction of the organic acid accelerating oxidation silver that is generated by thermal decomposition.Can lift carboxylic acids such as formic acid Ag, acetic acid Ag, propionic acid Ag, benzoic acid Ag, oxalic acid Ag as the organo-metallic compound with this effect be slaine etc.
From the storage stability of guaranteeing the oxidation silver paste, the viewpoint of printing, solvent preferably uses higher boiling point (150 ℃~300 ℃) solvent.
Particularly, can use α-terpineol, 2-ethyl hexyl ethanoate, acetate-3-methyl butyl ester etc.
Then, describe with reference to flow chart shown in Figure 5 manufacturing approach above-mentioned oxidation silver paste.
At first, mix aforesaid silver oxide powder, reducing agent (solid) and organo-metallic compound powder and generate solid constituent mixture (solid constituent mixed processes S11).
Then, in this solid constituent mixture, add solvent and stir (agitating procedure S 12).
Then, utilize roller mill (for example three-roll mill) to rub and mix (mixing operation S13) when stirring thing.
So, produce aforementioned oxidation silver paste.In addition, the oxidation silver paste of preferred gained low temperature (for example 5~15 ℃) preservation in refrigerating chamber etc.
Then, with reference to flow chart shown in Figure 6 manufacturing approach as the power model 1 of this execution mode is described.
At first; Preparation becomes the aluminium sheet and the aluminium sheet that becomes metal level 13 of circuit layer 12; Through solder these aluminium sheets are laminated in the one side and the another side of ceramic substrate 11 respectively, and pressurize or heat back cooling, engage said aluminium sheet and ceramic substrate 11 (circuit layer joint operation S21) thus.In addition, this brazing temperature is set at 640 ℃~650 ℃.
Then, through the another side side engagement cooler 40 (cooler engage operation S22) of solder at metal level 13.In addition, the brazing temperature of cooler 40 is set at 590 ℃~610 ℃.
Then, the surface coated at circuit layer 12 contains glass Ag cream (containing glass Ag cream painting process S23).
In addition,, coating can adopt the whole bag of tricks such as screen painting method, hectographic printing method, photonasty technology when containing glass Ag cream.In this execution mode, contain glass Ag cream in the part formation of the lift-launch semiconductor chip 3 of circuit layer 12 through the screen painting method.
Then, pack into after carrying out drying with the state that contains glass Ag cream in circuit layer 12 surface coated and contain burn till (the 1st firing process S24) of glass Ag cream in the heating furnace.In addition, this moment, firing temperature was set at 350~645 ℃.
Through the 1st firing process S24, form in the one side of circuit layer 12 and to possess the 1st of glassy layer 32 and Ag layer 33 and burn till layer 31.At this moment, be melted removal at the alumina epithelium that circuit layer 12 surfaces generate naturally, directly form glassy layer 32 at circuit layer 12 through glassy layer 32.
In addition, the inside of glassy layer 32 is dispersed with particle diameter for counting the fine electroconductive particle 34 about nanometer.This electroconductive particle 34 infers that for to contain crystallinity particle at least a among Ag or the Al it is the material that when burning till, precipitate into glassy layer 32 inside.
In addition, the inside of Ag layer 33 is dispersed with particle diameter for counting the fine glass particle 35 about nanometer.Infer that this glass particle 35 is by the material of remaining glass ingredient aggegation in the process of the sintering that carries out the Ag particle.
Then, burn till layer 31 surface coated oxidation silver paste (oxidation silver paste painting process S25) the 1st.
In addition, when coating oxidation silver paste, can adopt the whole bag of tricks such as screen painting method, hectographic printing method, photonasty technology.In this execution mode, through screen painting method printing oxidation silver paste.
Then, carry out drying (for example keeping under room temperature, the air atmosphere 24 hours) with the state of coating oxidation silver paste after, at oxidation silver paste laminated semiconductor element 3 (the range upon range of operation S26 of semiconductor element).
Then, pack heating furnace in range upon range of state semiconductor element 3 and power module substrate 10 and carry out burn till (the 2nd firing process S27) of silver oxide cream.At this moment, load is made as 0~10MPa, and firing temperature is made as 150~400 ℃.
In addition, preferably can engage more accurately through semiconductor element 3 is heated with the state to the stacked direction pressurization with power module substrate 10.At this moment, moulding pressure is preferably 0~10MPa.
So, burn till the 1st and form the 2nd on the layer 31 and burn till layer 38, bond semiconductor chip 3 and circuit layer 12.Thus, manufacturing is as the power model 1 of this execution mode.
Become in the power model 1 of as above this execution mode of conduct of structure; Since the one side of circuit layer 12 form by contain glass ingredient contain glass Ag cream burn till that body constitutes the 1st burn till layer 31; The 1st burn till that the Ag that forms on the layer 31 by the silver oxide reduction burns till that body constitutes the 2nd burn till layer 38, therefore can burn till 38 o'clock bond semiconductor element 3 of layer and circuit layer 12 forming the 2nd.
Therefore in addition, owing to range upon range ofly have the 1st to burn till layer the 31 and the 2nd and burn till layer 38, can guarantee the thickness of the knitting layer between circuit layer 12 and semiconductor element 3.Thus, stress and can prevent the breakage of semiconductor element 3 itself in semiconductor element 3 in the time of can suppressing the thermal cycle load.
In addition, because the 2nd burn till the body that burns till that layer 38 becomes the oxidation silver paste that comprises silver oxide and reducing agent, therefore when burning till the oxidation silver paste, silver oxide is reduced the agent reduction and becomes fine silver particles, can burn till the structure that layer 38 is made as densification with the 2nd.And, because reducing agent is decomposed when reduction-oxidation silver, therefore is difficult for remaining in the 2nd and burns till in the layer 38, thereby can guarantee that the 2nd burns till conductivity and the intensity in the layer 38.In addition, owing to can therefore can the junction temperature of semiconductor element 3 be suppressed lower, and can reduce heat load for example burning till under 300 ℃ and so on the lower temperature condition to semiconductor element 3.
And; In the power model 1 as this execution mode; Possess the glassy layer 32 that the one side that is formed at circuit layer 12 is arranged and be laminated in the Ag layer 33 on this glassy layer 32 because the 1st burns till layer 31; Therefore can the oxide scale film that be formed at circuit layer 12 surfaces be reacted with glassy layer 32 removes, and bonded circuitry layer 12 and semiconductor element 3 exactly.
And, in this execution mode,, therefore in glassy layer 32, also can guarantee conductivity owing to be dispersed with particle diameter for counting the fine electroconductive particle 34 about nanometer in glassy layer 32 inside.Particularly, in this execution mode, comprise that the resistance value P that the 1st of glassy layer 32 burns till layer 31 thickness direction is set in below 0.5 Ω.
Therefore, can burn till layer the 31 and the 2nd through the 1st and burn till layer and 38 between semiconductor element 3 and circuit layer 12, conduct exactly, and can constitute the higher power model of reliability 1.
In addition, in this execution mode,, therefore can seek to improve the reliability of power module substrate 10 owing to use ceramic substrate 11 that the AlN (aluminium nitride) by insulating properties and excellent strength constitutes as insulating barrier.And, can come to form like a cork circuit layer 12 through soldering aluminium sheet on this ceramic substrate 11.
In addition, in this execution mode,, therefore can prevent that power model 1 from becoming high temperature because of the heat radiation from semiconductor chip 3 owing to be equipped with cooler 40 through metal level 13 and resilient coating 13 at the another side (being downside among Fig. 1) of ceramic substrate 11.
In addition; Because in manufacturing approach as the power model 1 of this execution mode; Possess have the coating of the one side of circuit layer 12 contain glass Ag cream contain glass Ag cream painting process S23 with burn till dried contain glass Ag cream form the 1st burn till layer 31 the 1st firing process S24, therefore can on circuit layer 12, form by what glassy layer 32 and Ag layer 33 constituted and the 1st burn till layers 31.
In addition; Since possess have the 1st burn till coating oxidation silver paste on the layer 31 oxidation silver paste painting process S25, the range upon range of operation S26 of semiconductor element of coated oxidation silver paste laminated semiconductor element 3, and stacked semiconductor element 3 and power module substrate 10 and heating come the 1st burn till form on the layer 31 the 2nd burn till layer 38 the 2nd firing process S27, therefore can burn till layer the 31 and the 2nd and burn till layer 38 and come bond semiconductor element 3 and circuit layer 12 through the 1st.In addition, more preferably semiconductor element 3 is heated with the state to the stacked direction pressurization with power module substrate 10 and engage.
And, be below 400 ℃ owing to form the 2nd firing temperature that burns till among the 2nd firing process S27 of layer 38, therefore when engaging, can reduce heat load to semiconductor element 3.And, because firing temperature becomes more than 150 ℃ among the 2nd firing process S27, therefore can remove reducing agent contained in the oxidation silver paste etc., and can guarantee that the 2nd burns till conductivity and the intensity in the layer 38.
In addition, become more than 350 ℃, therefore can burn till and contain glass Ag cream and come accurately to form the 1st and burn till layer 31 owing to form the 1st firing temperature that burns till among the 1st firing process S24 of layer 31.In addition, because the firing temperature among the 1st firing process S24 becomes below 645 ℃, therefore can prevent the deterioration of circuit layer 12 or ceramic substrate 11.
In addition, in this execution mode, owing to be added with organo-metallic compound in the oxidation silver paste, therefore through carrying out the organic acid that thermal decomposition generates by this organo-metallic compound, the reduction reaction of accelerating oxidation silver.
In addition, because the reducing agent that mixes with the oxidation silver paste of conduct uses at room temperature the material as solid, so can prevent before burning till, to carry out reduction reaction.
In addition, owing to do not add dispersant or resin in the oxidation silver paste, can prevent that therefore organic substance from remaining in the 2nd and burning till in the layer 38.
In addition; Because the viscosity of oxidation silver paste is adjusted into below the above 100Pas of 10Pas; More preferably be adjusted into below the above 80Pas of 30Pas; Therefore burn till among the oxidation silver paste painting process S25 of coating oxidation silver paste on the layer 31 the 1st, can use screen painting method etc., and can only optionally form the 2nd and burn till layer 38 in the part that sets semiconductor element 3.Thus, the use amount of oxidation cream can be cut down, and the manufacturing cost of this power model 1 can be significantly cut down.
In addition, in this execution mode, contain Ag powder and the leadless glass powder that contains ZnO because formation the 1st is burnt till the glass Ag cream that contains of layer 31, the softening temperature of leadless glass powder is set at below 600 ℃, therefore can burn till with lower temperature to contain glass Ag cream.Particularly, can burn till firing temperature among the 1st firing process S24 of layer and be set at more than 350 ℃ below 645 ℃ forming the 1st.Thus, can circuit layer 12 be followed that the degradation problem prevents trouble before it happens under the bond strength of the deterioration of burning till that contains glass Ag cream or circuit layer 12 and ceramic substrate 11, and can produce high-quality power model 1.
In addition; Because containing the viscosity of glass Ag cream is adjusted into below the above 500Pas of 10Pas; More preferably be adjusted into below the above 300Pas of 50Pas; Therefore contain containing among the glass Ag cream painting process S23 of glass Ag cream in circuit layer 12 surface coated, can use screen painting method etc., and can only optionally form the 1st and burn till layer 31 in the part that sets semiconductor element 3.Thus, the use amount that contains glass Ag cream can be cut down, and the manufacturing cost of this power model 1 can be significantly cut down.
More than, execution mode of the present invention is illustrated, but the present invention is not limited to this, in the scope that does not break away from its invention technological thought, can carry out suitable change.
For example, the metallic plate with forming circuit layer and metal level is made as the situation that purity reaches 99.99% fine aluminium calendering plate is illustrated, but be not limited thereto, can constitute by other aluminum or aluminum alloy.In addition, can the metallic plate of forming circuit layer and metal level be made up of fine copper or copper alloy.
In addition, the situation through soldered joint aluminium sheet and ceramic substrate is illustrated, but is not limited thereto, can use transient liquid phase diffusion connection method (transient liquid phase bonding), casting etc.
In addition, when constituting the metallic plate that forms circuit layer and metal level, when will being engaged in ceramic substrate, can use direct bonding method (DBC method), reactive metal method, casting etc. by the metallic plate that copper or copper alloy constitute by copper or copper alloy.
In addition, also be not limited to the content described in the execution mode about raw material and the use level that contains glass Ag cream.For example, the situation of using leadless glass powder is illustrated, contains plumbous glass but also can use.
In addition, the content that is not limited to put down in writing in the execution mode about the raw material and the use level of oxidation silver paste.For example also can not contain organic metallic compound.
In addition, about the 1st burn till glassy layer 32 and the Ag layer 33 of layer in 31 thickness, the 2nd thickness that burns till layer 38 also be not limited to this execution mode.
In addition, be illustrated as the situation of insulating barrier using the ceramic substrate that constitutes by AlN, but be not limited thereto, can use by Si 3N 4Or Al 2O 3Ceramic substrate Deng constituting also can constitute insulating barrier by insulating resin.
In addition; Aluminium sheet to becoming circuit layer is engaged in ceramic substrate, and engage on circuit layer, form behind the cooler the 1st burn till layer situation be illustrated, but be not limited thereto; Can, aluminium sheet perhaps before engaging cooler, form the 1st and burn till layer before be engaged in ceramic substrate.
In addition, the situation that between the top plate portion of cooler and metal level, is provided with by aluminum or aluminum alloy or contain the resilient coating that aluminium composite wood (for example AlSiC etc.) constitutes is illustrated, but also can possess this resilient coating.
In addition, the situation that is made up of the top plate portion of cooler aluminium is illustrated, but can constitutes, also can constitute by other materials by aluminium alloy or the composite wood that contains aluminium etc.In addition, as cooler, the situation of passage with fin and coolant is illustrated, but the structure of cooler is not had special restriction.
In addition, oxidation silver paste deoxygenation silver powder and reducing agent also can contain the Ag particle outward.The Ag particle between silver oxide powder, silver oxide reduction and the Ag and this Ag particles sintering that obtain are made as the more structure of densification thereby can burn till layer with the 2nd thus.Thus, when engaging, can set the moulding pressure of semiconductor element lower.
In addition, the top layer of this Ag particle can comprise organic substance.At this moment, the heat in the time of can utilizing organic substance to decompose improves the agglutinating property under the low temperature.
[embodiment 1]
Below, to for confirming that the affirmation result of experiment that effect of the present invention is carried out describes.
(the present invention's example)
As the present invention's example, prepared the power model of being put down in writing in the aforementioned embodiments 1.Promptly; Reach by purity form on the circuit layer 12 that the aluminium sheet more than 99.99% constitutes by contain glass Ag cream burn till that body constitutes the 1st burn till layer 31; And, the 1st burn till form on the layer 31 by the oxidation silver paste burn till that body constitutes the 2nd burn till layer 38 and come bond semiconductor element 3.
In addition, ceramic substrate 11 use by AlN constitute, 27mm * 17mm, thickness be the ceramic substrate of 0.6mm.
In addition, circuit layer 12 and metal level 13 use by 4N aluminium constitute, 25mm * 15mm, thickness be the layer of 0.6mm.
Semiconductor element 3 is made as igbt (IGBT, Insulated Gate Bipolar Transistor) element, uses 13mm * 10mm, the thickness semiconductor element as 0.25mm.
At this moment, use the Bi that comprises 90.6 quality % as the glass powder that contains glass Ag cream 2O 3, the ZnO of 2.6 quality %, the B of 6.8 quality % 2O 3Leadless glass powder.In addition, use ethyl cellulose, use dibutyl ethylene glycol ether as resin as solvent.In addition, adding dicarboxylic acids is dispersant.
In addition, prepare two kinds of oxidation silver paste.
In the present invention example 1, use following oxidation silver paste: it uses commercially available silver oxide powder (Wako Pure Chemical Industries, Ltd.'s system), as the myristyl alcohol of reducing agent, as 2,2 of solvent; 4-trimethyl-1; 3-pentanediol monoesters (2-methyl propionate) is with silver oxide powder: 80 quality %, reducing agent (myristyl alcohol): 10 quality %, solvent (2,2; 4-trimethyl-1,3-pentanediol list (2-methyl propionate)): the mixed of remainder.
In the present invention's example 2; Use following oxidation silver paste: it uses commercially available silver oxide powder (with the board-like commercial firm of the pure pharmaceutical worker's industry of light system), as the myristyl alcohol of reducing agent, as the silver acetate powder of organo-metallic compound, as 2 of solvent; 2; 4-trimethyl-1,3-pentanediol monoesters (2-methyl propionate), with silver oxide powder:; 75 quality %, reducing agent (myristyl alcohol): 8 quality %, organo-metallic compound (acetic acid Ag): 8 quality %, solvent (2,2,4-trimethyl-1,3-pentanediol list (2-methyl propionate)): the mixed of remainder.
In addition, contain containing among the glass Ag cream painting process S23 of glass Ag cream in circuit layer 12 surface coated, the coating thickness that will contain glass Ag cream is made as 10 μ m.And, in the 1st firing process S24, firing temperature being made as 575 ℃, firing time was made as 10 minutes.
In addition, burn till among the oxidation silver paste painting process S25 of coating oxidation silver paste on the layer 31, the coating thickness of oxidation silver paste is made as 50 μ m the 1st.And, in the 2nd firing process S27, firing temperature being made as 300 ℃, firing time was made as 2 hours.In addition, the moulding pressure with semiconductor element 3 is made as 3MPa.
(example in the past)
As example in the past, prepare following power model: it forms thickness on surface of foregoing circuit layer 12 is the Ni electroplating film of 5 μ m, carry through scolding tin material (Sn-Ag-Cu series lead-free soldering tin) and put semiconductor element 3, and in reduction furnace solder joints.In addition, the moulding pressure with semiconductor element 3 is made as 0MPa.
(comparative example)
As comparative example 1,2, the oxidation silver paste that uses in the present invention's example 1,2 is directly coated the surface of circuit layer 12 and come surface engagement semiconductor element 3 at foregoing circuit layer 12.Firing condition is identical with the present invention's example 1,2.In addition, the moulding pressure with semiconductor element 3 is made as 3MPa.
(SEM observation)
At first, in the power model of the present invention example 1, the joint interface of circuit layer and semiconductor element is carried out the SEM observation with 200 times multiplying powers.The result is shown in Fig. 7.In addition, (a) being the secondary electrons image, (b) is the surface analysis result (Ag map) of sample, (c) is the surface analysis result (Bi map) of sample.
Can confirm that from (c) of Fig. 7 surperficial stratiform at circuit layer is distributed with as the Bi of glass ingredient and is formed with glassy layer.In addition, from Fig. 7 (b) and (c) can confirm to have the Ag layer that is dispersed with glass particle the Ag parent phase at glassy layer.In addition, burn till and be not dispersed with glass particle on the layer can confirming to be formed at the 2nd on the Ag layer under this multiplying power.
(evaluation)
Then, use the present invention's example, the power model of example and comparative example carried out thermal cycling test and power cycle test in the past, and the climbing of the joint rate behind the thermal cycling test, thermal resistance and the climbing of the thermal resistance after the power cycle test are estimated.
Utilize ultrasonic flaw detecting device to estimate for the joint rate, it is calculated by following formula.Wherein, the area of initial engagement area for engaging before engaging, i.e. semiconductor element area.Therefore in the ultrasonic detection image, peel off and represent, the area of this white portion is made as and peels off area by the white portion in the junction surface.
Joint rate=(initial engagement area-peel off area)/initial engagement area
Thermal resistance is measured as follows.Electric power with 100W heats heater chip, utilizes thermocouple that the temperature of heater chip is surveyed.In addition, (ethylene glycol: the temperature of water=9:1) is surveyed to the coolant that in fin, circulates.And, electric power is removed the temperature of heating plate and the temperature gap of coolant is made as thermal resistance.
Thermocycling experiment carries out through the cold cycling to test film load-40 ℃ ← → 110 ℃.In the present embodiment, implement 3000 times this cold cycling.
In the power cycle test, under the power on condition of 15V, 150A, heater chip is implemented 2 seconds conduction time, 8 seconds cooling times repeatedly, the temperature of IGBT element is changed in 30 ℃ to 130 ℃ scope.In the present embodiment, implement this power cycle 200,000 times.
Carry out measuring behind this thermal cycling test the climbing of joint rate and thermal resistance.In addition, carry out the climbing that thermal resistance is measured in power model test back.
Its evaluation result is shown in table 1.
[table 1]
Figure BDA00001690061800201
Directly coating oxidation silver paste comes to have taken place to peel off on the knitting layer between semiconductor element and the circuit layer in the comparative example 1,2 of bond semiconductor element on the circuit layer surface.In addition, the joint rate is also lower, and the climbing of thermal resistance becomes high in thermal cycling test and power cycle test.Learn from the result, even only use oxidation silver paste bond semiconductor element also to fail to obtain sufficient joint strength.
In addition, on the surface of circuit layer, form in the example in the past of Ni electroplating film and soldering semiconductor element, on the knitting layer between semiconductor element and the circuit layer, do not peel off, the joint rate well and in thermal cycling test, also obtain good result.But in power cycle test, the climbing of thermal resistance uprises and reaches 30.2%, fails fully to guarantee joint reliability.
Relative therewith; On the surface of circuit layer, form the body that burns till that contains glass Ag cream; And burning till on the body coating oxidation silver paste at this comes in the present invention's example 1,2 of bond semiconductor element; On the knitting layer between semiconductor element and the circuit layer, do not peel off, the joint rate also illustrates 98.2%, 98.3% high value.In addition, the significantly rising to thermal resistance also unconfirmed in thermal cycling test and power cycle test.
[embodiment 2]
Then; The oxidation silver paste that use contains the Ag particle of particle diameter below the above 800nm of 20nm constitutes power model; It is carried out thermal cycling test and power cycle test, and the climbing of joint rate after the cold cycling and thermal resistance and the climbing of the thermal resistance after the power cycle test are estimated.
The oxidation silver paste that uses in the present invention's example 3~5 is to add the oxidation silver paste of average grain diameter as the Ag powder of 40nm in the oxidation silver paste that in the present invention's example 1 and comparative example 1, uses.In addition, the mixing ratio of silver oxide powder and Ag powder is made as and is silver oxide powder by quality ratio: Ag powder=9:1.
The oxidation silver paste that uses in the present invention's example 6~8 is to add the oxidation silver paste of average grain diameter as the Ag powder of 800nm in the oxidation silver paste that in the present invention's example 2 and comparative example 2, uses.In addition, the mixing ratio of silver oxide powder and Ag powder is made as and is silver oxide powder by quality ratio: Ag powder=9:1.
The oxidation silver paste that uses in the present invention's example 9~11 is to add the oxidation silver paste of average grain diameter as the Ag powder of 40nm in the oxidation silver paste that in the present invention's example 1 and comparative example 1, uses.In addition, the mixing ratio of silver oxide powder and Ag powder is made as and is silver oxide powder by quality ratio: Ag powder=9:1.
About circuit layer 12, use Al in the present invention's example 3~8, use Cu among the present invention's example 9-11.
In addition, made power model with the present invention's example 1,2 identically.The moulding pressure of the semiconductor element 3 as at this moment, as shown in table 2 among change the 2nd firing process S27.Evaluation result is shown in table 2.
[table 2]
Figure BDA00001690061800211
Relatively the present invention's example 3~5 and the present invention's example 6~8 can be confirmed, though the moulding pressure of the semiconductor element 3 among the 2nd firing process S27 be set in 0MPa or 1MPa than low value the time, still can obtain joint reliability equal when moulding pressure is made as 3MPa.That is, contain the oxidation silver paste of the Ag particle of particle diameter below the above 800nm of 20nm, can set the moulding pressure of the semiconductor element 3 among the 2nd firing process S27 lower through use.
Confirm that to sum up example can provide thermal cycle reliability and the excellent power model of power cycle reliability according to the present invention.

Claims (10)

1. power model possesses power module substrate that one side at insulating barrier is equipped with circuit layer and is equipped on the semiconductor element on the said circuit layer, it is characterized in that,
The one side of said circuit layer be formed with by contain glass ingredient contain glass Ag cream burn till that body constitutes the 1st burn till layer,
The 1st burn till that the Ag that is formed with on the layer by silver oxide reduction burns till that body constitutes the 2nd burn till layer.
2. power model as claimed in claim 1 is characterized in that,
The said the 1st burns till layer possesses the glassy layer that the one side that is formed at circuit layer is arranged and is laminated in the Ag layer on this glassy layer,
Be dispersed with glass particle on the said Ag layer.
3. according to claim 1 or claim 2 power model is characterized in that,
The said the 2nd burns till the body that burns till that layer becomes the oxidation silver paste that comprises silver oxide and reducing agent.
4. power model as claimed in claim 3 is characterized in that,
Said oxidation silver paste also contains the Ag particle except that said silver oxide and reducing agent.
5. like each described power model in the claim 1 to 4, it is characterized in that,
Said insulating barrier is for being selected from AlN, Si 3N 4Or Al 2O 3Ceramic substrate.
6. the manufacturing approach of a power model, said power model possess power module substrate that one side at insulating barrier is equipped with circuit layer and are equipped on the semiconductor element on the said circuit layer, it is characterized in that said manufacturing approach possesses:
Through contain in the coating of the one side of said circuit layer glass ingredient contain glass Ag cream and carry out heat treated form the 1st burn till layer operation;
Burn till the operation that is coated with the oxidation silver paste that comprises silver oxide and reducing agent on the layer the said the 1st;
Operation at coated oxidation silver paste laminated semiconductor element; And
With said semiconductor element and said power module substrate with range upon range of state heat come the said the 1st burn till form on the layer the 2nd burn till layer operation,
And, engage said semiconductor element and said circuit layer.
7. the manufacturing approach of power model as claimed in claim 6 is characterized in that,
Form the 2nd burn till the said oxidation silver paste in the operation of layer firing temperature more than 150 ℃ below 400 ℃.
8. like the manufacturing approach of claim 6 or 7 described power models, it is characterized in that,
Form the said the 1st and burn till the said firing temperature that contains glass Ag cream in the operation of layer more than 350 ℃ below 645 ℃.
9. like the manufacturing approach of each described power model in the claim 6 to 8, it is characterized in that,
Burn till in the operation of layer in formation the said the 2nd, said semiconductor element and said power module substrate are heated with the state to the stacked direction pressurization.
10. like the manufacturing approach of each described power model in the claim 6 to 9, it is characterized in that,
Said oxidation silver paste also contains the Ag particle except that said silver oxide and said reducing agent.
CN201210167770.6A 2011-05-31 2012-05-28 Power model and the manufacture method of power model Active CN102810524B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2011-121627 2011-05-31
JP2011121627 2011-05-31
JP2012-011140 2012-01-23
JP2012011140A JP5966379B2 (en) 2011-05-31 2012-01-23 Power module and method for manufacturing power module

Publications (2)

Publication Number Publication Date
CN102810524A true CN102810524A (en) 2012-12-05
CN102810524B CN102810524B (en) 2016-12-14

Family

ID=47234196

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210167770.6A Active CN102810524B (en) 2011-05-31 2012-05-28 Power model and the manufacture method of power model

Country Status (1)

Country Link
CN (1) CN102810524B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105492198A (en) * 2013-08-29 2016-04-13 阿尔发金属有限公司 Composite and multilayered silver films for joining electrical and mechanical components
CN111868900A (en) * 2018-03-23 2020-10-30 三菱综合材料株式会社 Method for manufacturing electronic component mounting module
TWI711141B (en) * 2016-02-29 2020-11-21 日商三菱綜合材料股份有限公司 Semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101156219A (en) * 2005-04-12 2008-04-02 旭硝子株式会社 Ink composition and metallic material
JP2008208442A (en) * 2007-02-28 2008-09-11 Hitachi Ltd Joining method using intermetallic compound
JP2010287869A (en) * 2009-05-15 2010-12-24 Mitsubishi Materials Corp Substrate used for power module, substrate used for power module with cooling device, power module, and method for manufacturing substrate used for power module
US20110012262A1 (en) * 2009-06-30 2011-01-20 Toshiaki Morita Semiconductor device and method of manufacturing the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101156219A (en) * 2005-04-12 2008-04-02 旭硝子株式会社 Ink composition and metallic material
JP2008208442A (en) * 2007-02-28 2008-09-11 Hitachi Ltd Joining method using intermetallic compound
JP2010287869A (en) * 2009-05-15 2010-12-24 Mitsubishi Materials Corp Substrate used for power module, substrate used for power module with cooling device, power module, and method for manufacturing substrate used for power module
US20110012262A1 (en) * 2009-06-30 2011-01-20 Toshiaki Morita Semiconductor device and method of manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105492198A (en) * 2013-08-29 2016-04-13 阿尔发金属有限公司 Composite and multilayered silver films for joining electrical and mechanical components
US11390054B2 (en) 2013-08-29 2022-07-19 Alpha Assembly Solutions Inc. Composite and multilayered silver films for joining electrical and mechanical components
TWI711141B (en) * 2016-02-29 2020-11-21 日商三菱綜合材料股份有限公司 Semiconductor device
CN111868900A (en) * 2018-03-23 2020-10-30 三菱综合材料株式会社 Method for manufacturing electronic component mounting module

Also Published As

Publication number Publication date
CN102810524B (en) 2016-12-14

Similar Documents

Publication Publication Date Title
CN104885214B (en) Power module substrate and manufacturing method
CN104704618B (en) The manufacture method of semiconductor device, ceramic circuit board and semiconductor device
JP5966379B2 (en) Power module and method for manufacturing power module
KR102066300B1 (en) Solder joint structure, power module, heat-sink-attached substrate for power module, method for producing said substrate, and paste for forming solder underlayer
JP5212298B2 (en) Power module substrate, power module substrate with cooler, power module, and method of manufacturing power module substrate
KR101709370B1 (en) Substrate for power module, substrate with heat sink for power module, power module, method for producing substrate for power module, and method for producing substrate with heat sink for power module
JP5304508B2 (en) Conductive composition
JP5707886B2 (en) Power module substrate, power module substrate with cooler, power module, and power module substrate manufacturing method
CN104159872A (en) Joined body and semiconductor module
JP2014187251A (en) Bonding material, and bonded structure
CN102810524A (en) Power module and production method of power module
KR20160102416A (en) Substrate for power module, method for manufacturing same, and power module
JP5915233B2 (en) Solder joint structure, power module, power module substrate with heat sink, and manufacturing method thereof
JP5707885B2 (en) Power module substrate, power module substrate with cooler, power module, and method of manufacturing power module substrate
JP5780191B2 (en) Power module and method for manufacturing power module
CN109075081A (en) Semiconductor device
JP5982954B2 (en) Power module and method for manufacturing power module
JP2013125779A (en) Solder joint structure, power module, substrate for power module with radiation plate, and substrate for power module with cooler
JP6040729B2 (en) Semiconductor device and manufacturing method of semiconductor device
JP5585407B2 (en) Conductive composition
JP2013168240A (en) Paste for formation of solder ground layer
JP2005047731A (en) Low temperature fired ceramic composition, its manufacturing method, and wiring board using the same

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant