CN102804594B - Configurable wide tunable range oscillator core - Google Patents
Configurable wide tunable range oscillator core Download PDFInfo
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- CN102804594B CN102804594B CN201080026846.2A CN201080026846A CN102804594B CN 102804594 B CN102804594 B CN 102804594B CN 201080026846 A CN201080026846 A CN 201080026846A CN 102804594 B CN102804594 B CN 102804594B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1228—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more field effect transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
- H03B5/1212—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
- H03B5/1215—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
- H03B5/1225—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the generator comprising multiple amplifiers connected in parallel
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1237—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator
- H03B5/124—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising a voltage dependent capacitance
- H03B5/1243—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising a voltage dependent capacitance the means comprising voltage variable capacitance diodes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1237—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator
- H03B5/1262—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising switched elements
- H03B5/1265—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising switched elements switched capacitors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1237—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator
- H03B5/1262—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising switched elements
- H03B5/1268—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising switched elements switched inductors
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- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
- Oscillators With Electromechanical Resonators (AREA)
Abstract
A kind of oscillator comprises resonator, the first and second p-type transistor, and the first and second n-type transistor.Described resonator has the first terminal and the second terminal.Described first p-type transistor is switchably connected to described the first terminal, and described second p-type transistor is switchably connected to described second terminal.First drain electrode of described first n-type transistor and the second drain electrode of described second n-type transistor are electrically connected to described the first terminal and described second terminal respectively.Described oscillator and can operate under only NMOS pattern under CMOS pattern.
Description
Technical field
The present invention relates generally to oscillator, and more particularly, relates to configurable wide tunable range oscillator.
Background technology
Oscillator can be used in plurality of communication systems, comprises radio frequency (RF) system and other wireless communication system.In described plurality of communication systems, oscillator can be used in transmitter circuit and acceptor circuit.The oscillator of two kinds of common types is voltage controlled oscillator (VCO) and digital controlled oscillator (DCO).
The evolution technology relevant with wireless communication system and industry standard have caused more flexibly and the needs of more efficient oscillator.Described standard causes the different requirements for phase noise and oscillator amplitude.Needs can the oscillator of level configurations to optimize according to the performance of the wireless communication system of described standard operation.Efficiency considerations comprises and minimizes oscillator current consumption, to increase the air time, and covers the flexibility of multiple frequency band.
The trial of past to these configurable oscillators comprises: (a) provides multiple oscillator, wherein each oscillator covers the fraction of whole frequency range, and wherein each oscillator is optimized for specific criteria in power and phase noise, b () provides with the single oscillator of multiple members and mixes to produce frequency array, c () provides the oscillator based on transformer, such as, visit the danger clarke people such as (Bevilacqua) as given on September 9th, 2008 and title be " oscillator and method (Oscillator and Method for Generating an OscillatorSignal) for generation of oscillator signal " the 7th, 423, discussing in No. 495 United States Patent (USP)s, the full text of described patent is incorporated herein by reference, and (d) provides access LC oscillation circuit and cuts off with multiple effective core with different size of covering wide tuning range from described LC oscillation circuit, as the people such as D Huo Sipi (D.Hauspie) " have frequency band, broadband VCO (the Wideband VCO with simultaneous switchingof frequency band switched while effective core and varactor size, active core and varactor size) " (IEEE solid-state circuit periodical, July the 7th in 2007 phase the 42nd volume) in discussed, the full text of described document is incorporated herein by reference.
The multiple oscillators providing each oscillator to cover the fraction of whole frequency range may need to be exclusively used in the large regions of oscilator system owing to using many inductors.For example, at least one inductor may be needed for each oscillator.
There is provided with the single oscillator of multiple members and mix and may cause overpower consumption to produce frequency array and cause the flexible in programming in power and phase noise to reduce.In addition, unacceptable spurious signal may be there is owing to multistage mixing.
There is provided the oscillator based on transformer may need the transformer with large magnetic coupling (the k factor) that may be difficult to realize, and on chip, embodiment cause lower Q usually.
Access LC oscillation circuit is provided and cuts off from described LC oscillation circuit and may cause increasing at the current drain of the lower end of frequency tuning range when accessing other assembly with multiple effective core with different size of covering wide tuning range.
Although attempted various technology efficiently to meet the different requirements for phase noise and oscillator amplitude, known technology has not been provided for the best solution of configurable wide tunable range oscillator and may have comprised not desirable restriction.Need preferred technique efficiently to meet the different requirements for phase noise in wireless communication system and oscillator amplitude.
Summary of the invention
Disclose herein a kind of new-type and improve configurable wide tunable range oscillator.
According to one side, a kind of equipment comprises: resonator, and it has the first terminal and the second terminal; First p-type transistor, it has the first source electrode, first grid and the first drain electrode, and described first grid is electrically connected to described second terminal, and described first drain electrode is electrically connected to described the first terminal via the first switch; Second p-type transistor, it has the second source electrode, second grid and the second drain electrode, described second source electrode is electrically connected to described first source electrode, and described second grid is electrically connected to described the first terminal, and described second drain electrode is electrically connected to described second terminal via second switch; First n-type transistor, it has the 3rd source electrode, the 3rd grid and the 3rd drain electrode, and described 3rd grid is electrically connected to described second terminal, and described 3rd drain electrode connects via do not comprise switch first and is electrically connected to described the first terminal; And second n-type transistor, it has the 4th source electrode, the 4th grid and the 4th drain electrode, described 4th grid is connected to described the first terminal, and described 4th drain electrode connects via do not comprise switch second and is electrically connected to described second terminal, and described 4th source electrode is electrically connected to described 3rd source electrode.
According to another aspect, a kind of equipment comprises: resonator, and it has the first terminal and the second terminal; First p-type transistor, it has the first source electrode, first grid and the first drain electrode, and described first grid is electrically connected to described second terminal, and described first drain electrode is electrically connected to described the first terminal; Second p-type transistor, it has the second source electrode, second grid and the second drain electrode, and described second source electrode is electrically connected to described first source electrode, and described second grid is electrically connected to described the first terminal, and described second drain electrode is electrically connected to described second terminal; First n-type transistor, it has the 3rd source electrode, the 3rd grid and the 3rd drain electrode, and described 3rd grid is electrically connected to described second terminal, and described 3rd drain electrode is electrically connected to described the first terminal via the first switch; And second n-type transistor, it has the 4th source electrode, the 4th grid and the 4th drain electrode, described 4th grid is electrically connected to described the first terminal, described 4th drain electrode is electrically connected to described second terminal via second switch, and described 4th source electrode is electrically connected to described 3rd source electrode, wherein said 4th source electrode and described 3rd source electrode are electrically connected to ground connection via the 3rd switch.
According on the other hand, a kind of method that operation has the oscillator of resonator comprises: when requiring described oscillator to produce the frequency in higher range, invalid and operate described oscillator in two effective situations of n-type transistor two p-type transistor; And when requiring described oscillator to produce the frequency in lower scope, effective and operate described oscillator in described two effective situations of n-type transistor in described two p-type transistor, one in wherein said two p-type transistor has the first drain electrode, and both in described two p-type transistor have the second drain electrode, and when described first p-type transistor is invalid, described first drain electrode is disconnected from the first terminal of described resonator, and when described second p-type transistor is invalid, described second drain electrode is disconnected from the second terminal of described resonator.
According to an other aspect, a kind of equipment comprises: for operating two n-type transistor and two p-type transistor when requiring oscillator to produce frequency in lower frequency ranges using the device as the active element in described oscillator; For operating the device that described two n-type transistor make described p-type transistor disconnect from the resonator of described oscillator as active element when requiring described oscillator to produce the frequency in lower frequency range; And for operating the device that described two n-type transistor make described p-type transistor disconnect from described resonator as active element when requiring described oscillator minimize phase noise to produce the frequency in described lower frequency ranges simultaneously.
After the following graphic and embodiment of examination, other system of the improvement opportunity for efficiently meeting the difference requirement for phase noise and oscillator amplitude disclosed herein, method, aspect, feature, embodiment and advantage maybe will become apparent for it will be apparent to those skilled in the art that.Expect that all these additional system, method, aspect, feature, embodiment and advantage are included in this description, and within the scope of the appended claims.
Accompanying drawing explanation
Should be understood that graphic only for purposes of illustration.In addition, the assembly in each figure in proportion, but may not focus on explanation equipment disclosed herein and square ratio juris.In the drawings, similar reference number represents corresponding part in all different views.
Figure 1A is the schematic diagram of exemplary digital controlled oscillator (DCO).
Figure 1B is the schematic diagram of another exemplary DCO and the bias system for DCO.
Fig. 1 C is the schematic diagram of another exemplary DCO.
Fig. 2 is the schematic diagram of the switch that can be used in the DCO of Figure 1A, Figure 1B and Fig. 1 C.
Fig. 3 is the band diagram that the operational frequency bands be associated with the DCO of Figure 1A, Figure 1B and Fig. 1 C is described.
Fig. 4 A is the flow chart of the exemplary method of description operation DCO (DCO of Figure 1A, Figure 1B and Fig. 1 C).
Fig. 4 B is the flow chart of another exemplary method of description operation DCO (such as, the DCO of Figure 1A, Figure 1B and Fig. 1 C).
Fig. 4 C is the flow chart of another exemplary method of description operation DCO (DCO of Figure 1A, Figure 1B and Fig. 1 C).
Embodiment
With reference to and be incorporated to described graphic following embodiment and describe and one or more specific embodiments are described.Show and fully describe in detail these embodiments (provide these embodiments not to limit, but only in order to demonstration and teaching) to enable those skilled in the art put into practice advocated content.Therefore, for simplicity, described description can omit some known information of those skilled in the art.
Word " exemplary " is in this article in order to refer to " serving as example, example or explanation ".Be described as herein any embodiment of " exemplary " or variant may not be interpreted as than other embodiment or variant preferred or favourable.This describe described in all embodiments and variant be one exemplary embodiment and variant, it is through providing enable those skilled in the art make and use the present invention, and may not limit the legal protection scope that appended claims provides.
Figure 1A shows exemplary digital controlled oscillator (DCO) 100, and it comprises the first p-type transistor 102a, the second p-type transistor 102b, the first n-type transistor 104a, the second n-type transistor 104b, resonator 106, inductor 108, first switch 110a and second switch 110b.Regulation voltage Vreg is applied to circuit 112.Oscillator 100 can be used in a large amount of device, and such as (but being not limited to) may need honeycomb fashion integrated circuit and the Wireless IC of the wide tunable range oscillator with power save option.Oscillator 100 illustrates the embodiment of operation in complementary metal oxide semiconductors (CMOS) (CMOS) frequency band 304, negative NMOS N-channel MOS N (NMOS) frequency band 308 and NMOS/CMOS frequency band 306 (see Fig. 3).
Resonator 106 has the first terminal being connected to circuit 114a, and is connected to second terminal of circuit 114b.First p-type transistor 102a has the first source S being connected to circuit 112
1, be connected to the first grid G of circuit 114b
1, and first drain D of circuit 114a is switchably electrically connected to via the first switch 110a
1.Second p-type transistor 102b has the second source S being connected to circuit 112
2, be connected to the second grid G of circuit 114a
2, and second drain D of circuit 114b is switchably electrically connected to via second switch 110b
2.
First n-type transistor 104a has the 3rd source S being connected to circuit 116
3, be connected to the 3rd grid G of circuit 114b
3, and be connected to the 3rd drain D of circuit 114a
3.In the example of Figure 1A, the 3rd drain D
3circuit 114a is electrically connected in the mode not comprising switch.Second n-type transistor 104b has the 4th source S being connected to circuit 116
4, be connected to the 4th grid G of circuit 114a
4, and be connected to the 4th drain D of circuit 114b
4.In the example of Figure 1A, the 4th drain D
4circuit 114b is electrically connected in the mode not comprising switch.
For purposes of illustration, resonator 106 is the LC oscillation circuit with variable capacitance in parallel with inductor.The inductor of resonator 106 is shown as has voltage-regulation tap Vreg_Ltap in about center.Under other circumstances, resonator 106 can be known other resonators many of those skilled in the art, such as (but being not limited to) has the LC oscillation circuit of switched capacitor bank, the variable reactor of continuously-tuning, switched capacitor bank and the combination of tunable variable reactor, single inductor, switchable inductor, has the transformer of multiple port (in described port one or more on have capacitor), and based on the resonator of transformer.Circuit 112 receives regulation voltage Vreg.For the example of Figure 1A, circuit 116 is connected to ground connection via inductor 108.In some cases, inductor 108 can be omitted.Under other circumstances, other device can be used to make circuit 116 be electrically connected to ground connection.
In order to configure core under CMOS pattern, Closing Switch 110A and switch 110B, and it is therefore " connection ".The bias voltage of CMOS core is fed to via node Vreg.In this configuration, Vreg_ltap node keeps not connecting or " floating ".With this understanding, resonator tank circuits 106 has occurred whole parasitic capacitances of PMOS transistor (102a 102b), and it can reduce frequency.Because CMOS core has intrinsic preferably current drain, and because the parasitic capacitance occurred on resonator tank circuits is comparatively large, so the lower end expansion of frequency tuning range, current drain reduces simultaneously.In order to configure core under " only NMOS " pattern, open or " shutoff " switch 110A and switch 110B.By disconnecting these switches, minimize the parasitic capacitance from the drain electrode of PMOS transistor 102a and 102b to resonant tank 106.Move node Vreg (112) to ground connection.In some cases, Vreg can keep floating or be connected to Vdd under " only NMOS " pattern.The bias voltage of nmos pass transistor 104a and 104b is supplied via Vreg_ltap node.Because oscillation circuit 106 is swingable with this understanding reach 2*Vreg_ltap, so compared with the Vreg in CMOS situation (and Vreg_ltap in the nmos case can be the value identical with the Vreg in CMOS situation), phase noise can lower than the phase noise in CMOS situation.Therefore, compared with CMOS situation, only NMOS pattern can electric current be that cost realizes upper frequency and comparatively low phase noise.At minimize phase noise and non-key, voltage Vreg_ltap can be reduced to reduce surplus, still keep the advantage of upper frequency tuning range simultaneously.
Figure 1B shows the second exemplary oscillator 150 and the bias system 152 for oscillator 150.Oscillator 150 comprises the assembly discussed about oscillator 100, resonator 154.Resonator 154 comprises fine setting and gathers variable capacitor part 156, and coarse adjustment part 158.Bias system 152 comprises operational amplifier 160, switch 162, transistor 164, switch 166 and transistor 168.
In the example of Figure 1B, the paraphase input to operational amplifier 160 provides reference voltage Vref, and circuit 112 can be the noninvert input of operational amplifier 160.In other embodiments, voltage-regulation tap Vreg_Ltap can be provided to input using the noninvert as operational amplifier 160.
In oscillator 150, switch 110a and 110b can carrying DC electric current.Because the source electrode of switch 110a and 110b may be earth-free, close so comparatively bulky capacitor may be there is.In the example of Figure 1B, the first switch 110a and second switch 110b is nmos switch.In other embodiments, switch 110a and 110b can be the known many switches of those skilled in the art, such as (but being not limited to) p-type metal-oxide semiconductor (MOS) (PMOS), MEMS (micro electro mechanical system) (MEMS), heterojunction bipolar transistor (HBT), and the type illustrated by Fig. 2 can be had.
The operation of the core circuit shown in Figure 1B is the operation of the circuit according to Figure 1A.In addition, the biasing circuit 152 shown in Figure 1B provides an example of the technology maintaining suitable bias level.Under CMOS pattern, switch 110a, switch 110b and switch 162 closes and switch 166 is opened, and is placed in Vdd with the voltage of the grid by transistor 168.As a result, node Vreg_ltap floats, and this is required for the CMOS pattern.Operational amplifier 160 guarantees that node 112 is held in Vref.
For only NMOS pattern, switch 110a, switch 110b and switch 162 are opened.Move the grid of transistor 164 to Vdd.In the case, node 112 (Vreg) keeps floating.Switch 166 also closes.The non-inverting terminal of operational amplifier 160 is organized switch (not shown) via another and is connected to Vreg_ltap.Operational amplifier 160 in this configuration guarantees that Vreg_ltap is held in voltage Vref.
Fig. 1 C shows the 3rd exemplary oscillator 176.Oscillator 176 comprises assembly, resonator 178, inductor 180, switch 182a, switch 182b, switch 184 and the switch 186 discussed about oscillator 100.Oscillator 176 illustrates the embodiment being suitable for especially operating under PMOS pattern.
Fig. 1 C shows the embodiment in order to realize only PMOS pattern and CMOS pattern.The CMOS pattern operation of the core circuit shown in Fig. 1 C is that basis is above referring to the operation that Figure 1A discusses.Switch 182a, switch 182b and switch 184 closes and switch 186 stays open.Under PMOS pattern, switch 186 closes and switch 182a, 182b and 184 stay open.
Fig. 2 is the schematic diagram of the switch 110b that can be used in the DCO of Figure 1A, Figure 1B and Fig. 1 C.Exemplary switch 110b in Fig. 2 comprises transistor 202 and resistor 204.Use resistor 204 can reduce the noise of the bias voltage of the grid from driving transistors 202.Resistor 204 can allow the grid voltage of transistor 202 to maintain proportional response to the source/drain voltage of transistor 202 when switch 110b connects, thus maintains the connection resistance of switch 110b.
The caption of oscillator tuning range 302 of Fig. 3 for oscillator (oscillator such as shown in Figure 1A and Figure 1B) can be utilized realizes.Oscillator tuning range 302 comprises CMOS frequency band 304, NMOS/CMOS frequency band 306 and NMOS frequency band 308.Frequency band 304,306 and 308 comprises multiple passage.CMOS frequency band 304 comprises the lower end of frequency tuning range, and NMOS frequency band 308 comprises the high-end of frequency tuning range.NMOS/CMOS frequency band 306 can allow to operate under NMOS pattern when needs phase noise reduces, and allows CMOS pattern when needs lower power consumption.
In certain embodiments and in some conditions, may need, at only CMOS pattern, only NMOS pattern and only operated oscillator 100,150 and 176 under PMOS pattern, allow along with condition simultaneously and require to change and operate under other pattern.
Fig. 4 A shows the flow chart of the method 400 of operated oscillator (such as, the oscillator 100 of Fig. 1 and the oscillator 150 of Fig. 2).Can manner of execution 400 in a wireless communication device.Method 400 starts with square frame 402, or is required to operate with square frame 402.
In square frame 404, oscillator operates under NMOS pattern.As an example, when operating when the lower end higher than frequency tuning range, such as (but being not limited to), when when higher than frequency tuning range lower end 10% operate time, under NMOS pattern, operation may be useful, wherein the lower end of frequency tuning range can be as lower frequency: when lower than as described in frequency, oscillator can not vibrate, because all available capacity are all in LC oscillation circuit (the LC oscillation circuit such as, be associated with resonator 106 and/or resonator 154).As the example of the NMOS pattern of oscillator 100, first switch (such as, first switch 110a) and second switch is (such as, second switch 110b) can open, and the first n-type transistor (such as, first n-type transistor 104a) and the second n-type transistor is (such as, second n-type transistor 104b) can be used as active element and operate, and the first p-type transistor (such as, first p-type transistor 102a) and the second p-type transistor (such as, the second p-type transistor 102b) be passive component.As the example of the NMOS pattern of oscillator 150, by opening switch 110a, 110b and 162, Closing Switch 166 simultaneously, and force the drain voltage of transistor 164 to be Vdd, NMOS pattern can be realized.
In square frame 406, the oscillator of square frame 404 operates under CMOS pattern.As an example, when operating in the lower end in frequency tuning range, under CMOS pattern, operation may be useful.Under CMOS pattern, the first switch of square frame 404 and second switch can close, and the first n-type transistor of square frame 204, the second n-type transistor, the first p-type transistor and the second p-type transistor can be used as active element operates.As the example of the CMOS pattern of oscillator 150, by Closing Switch 110a, 110b and 162, open switch 166 simultaneously, and provide circuit 112 to input using the noninvert as operational amplifier 160, CMOS pattern can be realized.In square frame 408, method 400 stops.
By only switching between NMOS pattern and CMOS pattern to realize efficient operation and wide tunable range.Specifically, power save can be realized via operation under CMOS pattern.In certain embodiments, a reconfigurable active element grouping described herein only may be needed to realize wanted wide tunable range, provide simultaneously and reduce relevant configurability with power efficiency and phase noise.Wide tunable range can be realized via the relative fixed capacity be associated with efficient apparatus size.Except other advantage operated under CMOS pattern, starting gain can be increased, and this can cause the other gain of tuning range.
When identical oscillator assembly and same power supplies supply, in the system of also permission CMOS pattern as illustrated here, under NMOS pattern, operation can allow oscillator to increase electric current, and meets strict phase noise requirements.Under NMOS pattern, operation can allow oscillator to reach peak frequency efficiently.Power save is allowed when operation can operate in lower frequency under CMOS pattern.
Inductor 108 is second harmonic inductor.When operating under NMOS pattern, inductor 108 can cause flicker noise composition to reduce under lower frequency skew.When operating under CMOS pattern, one-sided symmetry characteristic active element can cause reducing from the flicker noise composition of described active element.
Again referring to Fig. 4 A, method 400 can comprise operation biasing circuit, and such as, biasing circuit 152, wherein the biased of NMOS pattern of square frame 404 is different from the biased of the CMOS pattern of square frame 406.For example, the biased of square frame 404 can comprise as below-center offset, and wherein Closing Switch (such as switch 166) is to be formed transistor (such as, transistor 168) (output stage of amplifier 160).Many supply configurations and bias configuration are possible.For example, when operating under CMOS pattern, oscillator 150 can be biased from the supply of 2.1 volts, and when operating under NMOS pattern, oscillator 150 can be biased from the supply of 1.3 volts or 2.1 volts.Can be relevant with phase noise requirements to the selection of the supply voltage of bias system 152.For example, the supply of 2.1 volts of NMOS pattern can allow oscillator 150 to meet strict phase noise requirements, minimizes the impact of transistor 102a and 102b simultaneously.
The CMOS pattern of square frame 406 can comprise in series use operational amplifier and transistor (such as, amplifier 160 and transistor 164), and wherein the drain electrode of transistor is used as the output stage of biasing circuit 152.Can be fed back from the tap of the inductor of resonator 154, described tap can be the common-mode point of the inductor of resonator 154.In certain embodiments, also can be fed back from circuit 112.
Fig. 4 B shows the second flow chart of the second exemplary method 420 of operated oscillator (such as, the oscillator 100 of Fig. 1 and the oscillator 150 of Fig. 2).Can manner of execution 420 in a wireless communication device.Method 420 starts with square frame 422, or is required to operate from square frame 422.In square frame 406, oscillator operates under CMOS pattern.In square frame 424, determine whether wireless system and/or condition require operation in the high frequency band (such as, the frequency band 308 (see Fig. 3) of scope 302) of oscillator tuning range.When needs operate in the higher frequency band, method 420 moves on to square frame 404 (see Fig. 4 A) and operates under NMOS pattern.If do not need to operate in the high frequency band of oscillator tuning range, then method 420 moves on to square frame 426.
In block 426, determine whether wireless system and/or condition require operation in the lower band (such as, the frequency band 304 of scope 302) of oscillator tuning range.If need to operate in lower band, then method 420 moves on to square frame 406 (see Fig. 4 A) and operates under CMOS pattern.If do not need to operate in the high frequency band and/or lower band of oscillator tuning range, then method 420 moves on to square frame 428.
In block 428, during determining time when needing low noise or condition, whether wireless system and/or condition require (such as, in the frequency band 306 of scope 302) operation under optimum noise pattern.When needs operate under optimum noise pattern, method 420 moves on to square frame 404 and operates under NMOS pattern.If do not need optimum noise pattern, then method 420 moves on to square frame 406, wherein can minimise power consumption.
Fig. 4 C shows the 3rd flow chart of the other exemplary method 420 of operated oscillator (such as, the oscillator 176 of Fig. 1 C).Can manner of execution 440 in a wireless communication device.Method 440 starts with square frame 442, or is required to operate with square frame 442.In square frame 406, oscillator operates under CMOS pattern.As the example of the CMOS pattern of oscillator 176, by Closing Switch 182a and 182b, open switch 184 and 186 simultaneously, CMOS pattern can be realized.
In square frame 424, determine whether wireless system and/or condition require high frequency band (such as, the middle operation of the frequency band 308 (see Fig. 3) of scope 302 at oscillator tuning range.When needs operate in the higher frequency band, method 420 moves on to square frame 444 and operates under PMOS pattern.As the example of the PMOS pattern of oscillator 176, by opening switch 182a and 182b, Closing Switch 184 and 186, can realize PMOS pattern simultaneously.If do not need to operate in the high frequency band of oscillator tuning range, then method 440 moves on to square frame 426.Square frame 426 as operated described by Fig. 4 B.
In block 428, during determining time when needing low noise or condition, whether wireless system and/or condition require to operate under optimum noise pattern.When needs operate under optimum noise pattern, method 440 moves on to square frame 444 and operates under PMOS pattern.If do not need optimum noise pattern, then method 440 moves on to square frame 406, wherein can minimise power consumption.
The module of software and/or firmware code, fragment and/or part can be at least partly used to implement by functional, the operation of the block delineations of illustrated method and framework herein.The module of code, fragment and/or part comprise one or more executable instructions for implementing specified.In some embodiments, the order that mentioned in square frame function can be different from shown order occurs.For example, depending on involved functional, two square frames that adjoining land is shown in Fig. 4 A to Fig. 4 C can be performed simultaneously, or sometimes can perform described square frame by another order.
Those skilled in the art should be further appreciated that various illustrative components, blocks, module, circuit and the algorithm steps described in conjunction with embodiment disclosed herein can be embodied as electronic hardware, computer software or the combination both this at least in part.In order to this interchangeability of hardware and software is clearly described, in functional, describe various Illustrative components, block, module, circuit and step substantially above.This is functional is embodied as hardware or software depending on application-specific and the design constraint forcing at whole system.Those skilled in the art can implement described functional by different way for each application-specific, but this little embodiment decision-making should be interpreted as causing departing from the scope of the present invention.
In one or more one exemplary embodiment, described function can be implemented with hardware, software, firmware or its any combination at least in part.If with implement software, then described function can be used as instruction or code and is stored on one or more computer-readable medias or via computer-readable media and transmits.Computer-readable media comprises computer storage media and communication medium, and communication medium comprises any media promoting computer program to be delivered to another location from a position.Medium can be can by any useable medium of computer access.For example (and unrestricted), this computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage apparatus, disk storage device or other magnetic storage device, or can in order to carrying or store form in instruction or data structure want program code and can by other media any of computer access.And, suitably any connection is called computer-readable media.For example, if use coaxial cable, optical fiber cable, twisted-pair feeder, digital subscribe lines (DSL) or wireless technology (such as infrared ray, radio and microwave) and from website, server or other remote source software, then coaxial cable, optical fiber cable, twisted-pair feeder, DSL or wireless technology (such as infrared ray, radio and microwave) are included in the definition of media.As used herein, disk and CD comprise compact disk (CD), laser-optical disk, optical compact disks, digital versatile disc (DVD), floppy disk and Blu-ray Disc, wherein disk is usually with magnetic means rendering data, and CD laser rendering data to be optically.The combination of above those also should be included in the scope of computer-readable media.
There is provided the above description of disclosed embodiment to enable those skilled in the art make or to use the content defined by appended claims.Appended claims is not intended to be limited to disclosed embodiment.In view of these teachings, those skilled in the art will be easy to expect other embodiment and amendment.Therefore, when considering in conjunction with above specification and accompanying drawing, appended claims is intended to contain all this little embodiment and amendment.
Claims (27)
1. operation has a method for the oscillator of resonator, and it comprises:
When requiring described oscillator to produce frequency in higher range, invalid and operate described oscillator in two effective situations of n-type transistor two p-type transistor; And
When requiring described oscillator to produce frequency in lower scope, effective and operate described oscillator in described two effective situations of n-type transistor in described two p-type transistor;
One in wherein said two p-type transistor has the first drain electrode, and both in described two p-type transistor have the second drain electrode, and when described first p-type transistor is invalid, described first drain electrode is disconnected from the first terminal of described resonator, and when described second p-type transistor is invalid, described second drain electrode is disconnected from the second terminal of described resonator, and the source electrode of wherein said two n-type transistor is electrically connected to ground connection by switch or inductor.
2. method according to claim 1, wherein said resonator comprises the transformer with multiple port, and one or more in wherein said multiple port are electrically connected to capacitor.
3. method according to claim 1, wherein said resonator is LC oscillation circuit.
4. method according to claim 1, wherein said resonator is based on transformer.
5. method according to claim 1, wherein makes described first to drain from described the first terminal to disconnect by opening the switch that is connected between described first drain electrode and described the first terminal.
6. method according to claim 1, it comprises operation biasing circuit further, described one in wherein said two p-type transistor has the first source electrode, and both described in described two p-type transistor have the second source electrode, and described biasing circuit is electrically connected to described first source electrode and described second source electrode.
7. method according to claim 6, wherein said biasing circuit comprises operational amplifier, and the noninvert input of wherein arriving described operational amplifier is electrically connected to described first source electrode.
8. method according to claim 6, wherein said biasing circuit comprises operational amplifier, and the noninvert input of wherein arriving described operational amplifier is electrically connected to voltage-regulation tap Vreg_Ltap.
9. method according to claim 1, it comprises further: when requiring described oscillator minimum noise, invalid and operate described oscillator in two effective situations of n-type transistor two p-type transistor.
10., for operating an equipment for the oscillator with resonator, it comprises:
For operating two n-type transistor and two p-type transistor device as the active element in described oscillator when requiring described oscillator to produce frequency in lower frequency ranges;
For operating the device that described two n-type transistor make described p-type transistor disconnect from the resonator of described oscillator as active element when requiring described oscillator to produce the frequency in lower frequency range; And
For operating the device that described two n-type transistor make described p-type transistor disconnect from described resonator as active element when requiring described oscillator minimize phase noise to produce the frequency in described lower frequency ranges simultaneously, the source electrode of wherein said two n-type transistor is electrically connected to ground connection by switch or inductor.
11. equipment according to claim 10, wherein:
Described two n-type transistor are the first n-type transistor and the second n-type transistor, and described two p-type transistor are the first p-type transistor and the second p-type transistor;
Described resonator has the first terminal and the second terminal;
Described first p-type transistor has the first source electrode, first grid and the first drain electrode, and described first grid is electrically connected to described second terminal, and described first drain electrode is electrically connected to described the first terminal via the first switch;
Described second p-type transistor has the second source electrode, second grid and the second drain electrode, described second source electrode is electrically connected to described first source electrode, described second grid is electrically connected to described the first terminal, and described second drain electrode is electrically connected to described second terminal via second switch;
Described first n-type transistor has the 3rd source electrode, the 3rd grid and the 3rd drain electrode, and described 3rd grid is electrically connected to described second terminal, and described 3rd drain electrode connects via do not comprise switch first and is electrically connected to described the first terminal; And
Described second n-type transistor has the 4th source electrode, the 4th grid and the 4th drain electrode, described 4th grid is electrically connected to described the first terminal, described 4th drain electrode connects via do not comprise switch second and is electrically connected to described second terminal, described 4th source electrode is electrically connected to described 3rd source electrode, and described 3rd source electrode and described 4th source electrode are electrically connected to ground connection by inductor.
12. equipment according to claim 11, wherein said resonator comprises the transformer with multiple port, and one or more in wherein said multiple port are electrically connected to capacitor.
13. equipment according to claim 11, wherein said resonator is LC oscillation circuit.
14. equipment according to claim 11, wherein said resonator is based on transformer.
15. equipment according to claim 11, wherein said equipment is configured to operate under NMOS pattern when described first switch and described second switch are opened.
16. equipment according to claim 11, wherein said equipment is configured to operate under CMOS pattern when described first switch and described second switch close.
17. equipment according to claim 11, it comprises biasing circuit further, and wherein said biasing circuit is electrically connected to described first source electrode and described second source electrode.
18. equipment according to claim 17, wherein said biasing circuit comprises operational amplifier, and the noninvert input of wherein arriving described operational amplifier is electrically connected to described first source electrode.
19. equipment according to claim 17, wherein said biasing circuit comprises operational amplifier, and the noninvert input of wherein arriving described operational amplifier is electrically connected to voltage-regulation tap Vreg_Ltap.
20. equipment according to claim 11, wherein said first switch and/or described second switch comprise transistor and resistor.
21. equipment according to claim 10, wherein:
Described two n-type transistor are the first n-type transistor and the second n-type transistor, and described two p-type transistor are the first p-type transistor and the second p-type transistor;
Described resonator has the first terminal and the second terminal;
Described first p-type transistor has the first source electrode, first grid and the first drain electrode, and described first grid is electrically connected to described second terminal, and described first drain electrode is electrically connected to described the first terminal;
Described second p-type transistor has the second source electrode, second grid and the second drain electrode, and described second source electrode is electrically connected to described first source electrode, and described second grid is electrically connected to described the first terminal, and described second drain electrode is electrically connected to described second terminal;
Described first n-type transistor has the 3rd source electrode, the 3rd grid and the 3rd drain electrode, and described 3rd grid is electrically connected to described second terminal, and described 3rd drain electrode is electrically connected to described the first terminal via the first switch; And
Described second n-type transistor has the 4th source electrode, the 4th grid and the 4th drain electrode, described 4th grid is electrically connected to described the first terminal, described 4th drain electrode is electrically connected to described second terminal via second switch, and described 4th source electrode is electrically connected to described 3rd source electrode, wherein said 4th source electrode and described 3rd source electrode are electrically connected to ground connection via the 3rd switch.
22. equipment according to claim 21, wherein said resonator comprises the transformer with multiple port, and one or more in wherein said multiple port are electrically connected to capacitor.
23. equipment according to claim 21, wherein said resonator is LC oscillation circuit.
24. equipment according to claim 21, wherein said resonator is based on transformer.
25. equipment according to claim 21, wherein said equipment is configured to operate under PMOS pattern when described first switch and described second switch are opened and described 3rd switch closes.
26. equipment according to claim 21, wherein said equipment is configured to operate under CMOS pattern when closed and described 3rd switch opens of described first switch and described second switch.
27. equipment according to claim 21, wherein said first and second source electrodes are electrically connected to inductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410184151.7A CN103916081B (en) | 2009-06-17 | 2010-06-17 | Configurable wide tuning range oscillator core |
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|---|---|---|---|
| US12/486,607 | 2009-06-17 | ||
| US12/486,607 US8018293B2 (en) | 2009-06-17 | 2009-06-17 | Configurable wide tuning range oscillator core |
| PCT/US2010/039089 WO2010148257A1 (en) | 2009-06-17 | 2010-06-17 | Configurable wide tuning range oscillator core |
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| CN201410184151.7A Division CN103916081B (en) | 2009-06-17 | 2010-06-17 | Configurable wide tuning range oscillator core |
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| CN102804594B true CN102804594B (en) | 2015-09-16 |
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| CN201080026846.2A Active CN102804594B (en) | 2009-06-17 | 2010-06-17 | Configurable wide tunable range oscillator core |
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| US20140009236A1 (en) * | 2012-07-03 | 2014-01-09 | Qualcomm Incorporated | Configurable multi-mode oscillators |
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| US8742862B1 (en) * | 2012-11-13 | 2014-06-03 | Qualcomm Incorporated | Current reuse voltage controlled oscillator with improved differential output |
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| US9100026B2 (en) * | 2013-07-10 | 2015-08-04 | Qualcomm Incorporated | Devices and methods for reducing noise in digitally controlled oscillators |
| US9344127B2 (en) * | 2013-11-22 | 2016-05-17 | The Trustees Of Columbia University In The City Of New York | Graphene resonator based mixer-first receiver on CMOS for digitally controlled and widely tunable RF interface |
| KR101607764B1 (en) | 2014-08-27 | 2016-03-31 | 숭실대학교산학협력단 | Oscillator with differential structure |
| CN104852694A (en) * | 2015-04-14 | 2015-08-19 | 苏州卓智创芯电子科技有限公司 | Low noise amplifier for antenna self-tuning |
| EP3154191B1 (en) * | 2015-10-09 | 2020-12-30 | The Swatch Group Research and Development Ltd. | Drive circuit for an oscillator |
| US9673755B1 (en) * | 2016-02-09 | 2017-06-06 | Cognitive Systems Corp. | Controlling a switched capacitor bank in a voltage controlled oscillator for wireless sensor devices |
| US10291237B2 (en) * | 2016-04-11 | 2019-05-14 | Mediatek Inc. | Oscillator circuit with reconfigurable oscillator amplifier and/or hybrid amplitude calibration circuit and associated method |
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| US20100321124A1 (en) | 2010-12-23 |
| EP2755321A3 (en) | 2014-09-03 |
| KR20120028391A (en) | 2012-03-22 |
| EP2755321A2 (en) | 2014-07-16 |
| CN103916081A (en) | 2014-07-09 |
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| IN2014CN04320A (en) | 2015-09-04 |
| JP5869022B2 (en) | 2016-02-24 |
| CN102804594A (en) | 2012-11-28 |
| WO2010148257A1 (en) | 2010-12-23 |
| JP2012531110A (en) | 2012-12-06 |
| JP2014143721A (en) | 2014-08-07 |
| CN103916081B (en) | 2017-04-12 |
| EP2443738A1 (en) | 2012-04-25 |
| EP3068043A1 (en) | 2016-09-14 |
| JP5684251B2 (en) | 2015-03-11 |
| TW201115905A (en) | 2011-05-01 |
| US8018293B2 (en) | 2011-09-13 |
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