CN102789813A - Method and device for controlling use of non-least significant bit page in storage device - Google Patents
Method and device for controlling use of non-least significant bit page in storage device Download PDFInfo
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- CN102789813A CN102789813A CN2012102045281A CN201210204528A CN102789813A CN 102789813 A CN102789813 A CN 102789813A CN 2012102045281 A CN2012102045281 A CN 2012102045281A CN 201210204528 A CN201210204528 A CN 201210204528A CN 102789813 A CN102789813 A CN 102789813A
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- significant bit
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
- G11C16/3495—Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
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- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The invention is suitable for the technical field of data storage of storage devices, and provides a method and a device for controlling the use of a non-least significant bit page in a storage device; the method comprises the following steps: setting a critical value of the use number of a non-least significant bit page, or a critical value of the error correction number; recording the use number or error correction number of each non-least significant bit page; when the ratio of non-least significant bit pages whose use number of the non-least significant bit page reaches the critical value of the use number or whose error correction number reaches the critical value of the error correction number reaches a preset value, correcting the non-least significant bit pages. With the invention, when the non-least significant bit page in the storage device reaches a critical value of its service life, the non-least significant bit page can still be used continuedly, and thus the service life of the storage device is effectively prolonged; and the practicality is strong.
Description
Technical field
The invention belongs to the technical field of data storage of storer, relate in particular to non-least significant bit page uses in a kind of control store equipment method and device.
Background technology
Flash memory according to its internal framework can be divided into the single layer cell flash memory (Single-Level Cell, SLC) and multi-layered unit flash memory (Multi-Level Cell, MLC).Flash memory inside comprises a plurality of storage blocks, and each storage block is formed by a plurality of pages.In SLC, the serviceable life of all pages, (promptly wiping, read and write number of times) all was identical, more than 100,000 times.And in MLC, have only the serviceable life that can reach page or leaf among the SLC serviceable life of least significant bit page, have only about 10,000 times its serviceable life for non-least significant bit page.
Prior art adopts the mode of " balance abrasion " to use MLC, though the time spent guarantee each page as far as possible wipe, read and write the number of times basically identical.Yet, because the erasable number of times of least significant bit page and non-least significant bit page is different among the MLC, when the erasable number of times of non-least significant bit page reaches capacity, will cause whole flash memory to scrap or make mistakes when using, like obliterated data, can not store data etc.
Therefore; Adopt " balance abrasion " mode just to improve in overall utilization rate to flash memory with equal life; Fail to improve the serviceable life of least significant bit page in the flash memory, promptly when the life-span of non-least significant bit page, use reached capacity, the whole flash memory life-span also will reach capacity; But also do not reach capacity the serviceable life of least significant bit page among the MLC, wasted the part serviceable life of least significant bit page.
Summary of the invention
The purpose of the embodiment of the invention is to provide method and the device that non-least significant bit page uses in a kind of control store equipment, to prolong the serviceable life of MLC.
The embodiment of the invention is achieved in that the method that non-least significant bit page uses in a kind of control store equipment, and said method comprises:
The critical value of non-least significant bit page access times or the critical value of error correction number are set;
Write down the access times or the error correction number of each non-least significant bit page;
Access times reach the critical value of said access times in said non-least significant bit page, when the ratio of non-least significant bit page that perhaps error correction number reaches the critical value of said error correction number reaches preset value, revise said non-least significant bit page.
Another purpose of the embodiment of the invention is to provide the device that non-least significant bit page uses in a kind of control store equipment, and said device comprises:
The unit is set, is used to be provided with the critical value of non-least significant bit page access times or the critical value of error correction number;
Counting unit is used to write down the access times or the error correction number of each non-least significant bit page;
Control module; Be used for reaching the critical value of said access times when said non-least significant bit page access times; When the ratio of non-least significant bit page that perhaps error correction number reaches the critical value of said error correction number reaches preset value, revise said non-least significant bit page.
A purpose again of the embodiment of the invention is to provide a kind of memory device, and said memory device comprises the device that non-least significant bit page uses in the said control store equipment.
Can find out from technique scheme; Critical value or the critical value of error correction number of the embodiment of the invention through non-least significant bit page access times are set; Access times reach the critical value of said access times in said non-least significant bit page, when the ratio of non-least significant bit page that perhaps error correction number reaches the critical value of said error correction number reaches preset value, revise said non-least significant bit page; Make revised memory device when its non-least significant bit page reaches the critical value in its serviceable life; Least significant bit page still can continue to use, thereby has effectively prolonged the serviceable life of said memory device, has stronger practicality.
Description of drawings
In order to be illustrated more clearly in the technical scheme in the embodiment of the invention; To do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below; Obviously, the accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work property, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the realization flow figure of non-least significant bit page method of application in the control store equipment that provides of the embodiment of the invention one;
Fig. 2 is the composition structural drawing of non-least significant bit page operative installations in the control store equipment that provides of the embodiment of the invention two.
Embodiment
In order to make the object of the invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
For technical scheme of the present invention is described, describe through specific embodiment below.
Embodiment one:
Fig. 1 shows the realization flow of non-least significant bit page method of application in the control store equipment that the embodiment of the invention one provides, and details are as follows for this procedure:
In step S101, the critical value of non-least significant bit page access times or the critical value of error correction number are set.
In the present embodiment, said access times comprise wipe, number of times such as read-write.The critical value of said error correction number refers to the maximal value that the interior number of errors of any non-least significant bit page surpasses the error-correcting code correctable error.
In step S102, write down the access times or the error correction number of each non-least significant bit page.
In the present embodiment, can be through the access times of each non-least significant bit pages of record such as counting unit, promptly non-least significant bit page is whenever once wiped or read-write operation, and counting unit adds 1.The perhaps error correction number through each non-least significant bit page of record such as counting unit; Non-least significant bit page is when reading and writing repeatedly; Data may be made mistakes, and along with the increase of read-write number of times, number of errors will increase; When number of errors in any non-least significant bit page surpassed the maximal value of error-correcting code correctable error, this non-least significant bit page will be destroyed.Therefore, be destroyed, can write down the error correction number of each non-least significant bit page, when said error correction number reaches the critical value of error correction number, handle accordingly in order to prevent non-least significant bit page.
In step S103; Access times reach the critical value of said access times in said non-least significant bit page; When the ratio of non-least significant bit page that perhaps error correction number reaches the critical value of said error correction number reaches preset value; Revise said non-least significant bit page, so that the least significant bit page in the revised memory device can also continue to use.
Need to prove; Critical value in the present embodiment, the main body that preset value was directed against are not " each " non-least significant bit pages; But the non-least significant bit page of " great majority " in the flash memory; Promptly when the access times of " most of non-least significant bit page ", or the error correction number of times is then revised non-least significant bit pages all in the flash memory when reaching critical value.For example; 100 non-least significant bit pages are arranged in the flash memory; The critical value of each non-least significant bit page access times is 1000, when 90% non-least significant bit page access times in the flash memory reach 1000, then revises non-least significant bit pages all in this flash memory.
Preferably, revising said non-least significant bit page specifically comprises:
Judge whether non-least significant bit page and least significant bit page are separate management in the said memory device;
If not, delete said non-least significant bit page and relevant information thereof;
If, delete said non-least significant bit page corresponding file system, the state position that perhaps will be provided with in advance is in effective status, to stop the operation to non-least significant bit page.
In the present embodiment; When revising said non-least significant bit page; At first judge said memory device volume production pattern first, when volume production pattern first is non-least significant bit page and least significant bit page managed mixed mode, access times reach the critical value of said access times in said non-least significant bit page; When the ratio of non-least significant bit page that perhaps error correction number reaches the critical value of said error correction number reaches preset value; The said memory device of volume production is deleted non-least significant bit page and relevant information (comprising the storage address information of non-least significant bit page correspondence etc.) thereof in the said memory device once more, and non-least significant bit page can not re-use in the said memory device at this moment; The storage space of said memory device diminishes, but least significant bit page still can continue to use in the said memory device.
When the pattern of volume production first is non-least significant bit page and least significant bit page separate management pattern, promptly all least significant bit pages are formed a part, and all non-least significant bit pages are formed a part, and each part all has its corresponding file system.Access times reach the critical value of said access times in said non-least significant bit page; When the ratio of non-least significant bit page that perhaps error correction number reaches the critical value of said error correction number reaches preset value; Delete that a part of pairing file system that said non-least significant bit page is formed; Make interior all the non-least significant bit pages of said memory device not re-use, but least significant bit page still can continue to use in the said memory device.
Perhaps; When the pattern of volume production is non-least significant bit page and least significant bit page separate management pattern first; One mode bit can also be set in said memory device in advance; The original state of said mode bit is a disarmed state, and all non-least significant bit pages and least significant bit page all can use in the said memory device.Access times reach the critical value of said access times in said non-least significant bit page; When the ratio of non-least significant bit page that perhaps error correction number reaches the critical value of said error correction number reaches preset value; With said state position in effective status; At this moment, all non-least significant bit pages can not re-use in the said memory device, but least significant bit page still can continue to use in the said memory device.
Need to prove that it is different that " ratio " described in the present embodiment and " number " exist, " number " is the value of a static state; And " ratio " is a dynamic value; If what for example be provided with is " number ", " number " is 6, and certain memory device, stores space is less; Its non-least significant bit page has only 5; Then the access times in all non-minimum active page positions reach the critical value of said access times, when perhaps error correction number reaches the critical value of said error correction number, still can't satisfy the condition of correction.And if setting is " ratio "; For example " ratio " is 60%; If non-least significant bit page has only 5; As long as wherein the access times of 3 non-least significant bit pages reach the critical value of said access times, when perhaps error correction number reaches the critical value of said error correction number, then can revise so.
As another preferred embodiment of the present invention, in order to protect the data of having stored, make things convenient for the user to storing the management of data, improve the satisfaction that the user uses, before the step of the said non-least significant bit page of said correction, said method also comprises:
Data in the said non-least significant bit page of prompting user ID.
The embodiment of the invention makes that through revising said non-least significant bit page the least significant bit page in the revised memory device can also continue to use, and has effectively prolonged the serviceable life of said memory device, has stronger practicality.
Embodiment two:
Fig. 2 shows the composition structure of non-least significant bit page operative installations in the control store equipment that the embodiment of the invention two provides, and for the ease of explanation, only shows the part relevant with the embodiment of the invention.
Non-least significant bit page operative installations can be applied in the memory device in this control store equipment; Can be to run on the unit that software unit, hardware cell or software and hardware in the memory device combine, also can be used as independently, suspension member be integrated in the memory device or runs in the application system of memory device.
Non-least significant bit page operative installations comprises unit 21, counting unit 22 and control module 23 is set in this control store equipment.Wherein, the concrete function of each unit is following:
Further, said control module 23 comprises:
Preferably, in order to protect the data of having stored, make things convenient for the user to storing the management of data, said control module 23 also comprises:
Non-least significant bit page operative installations can use non-least significant bit page method of application in the control store equipment of aforementioned correspondence in the control store equipment that present embodiment provides; Details repeat no more at this referring to the associated description of non-least significant bit page method of application embodiment one in the above-mentioned control store equipment.
One of ordinary skill in the art will appreciate that to the foregoing description two included each unit and modules are to divide according to function logic, but be not limited to above-mentioned division, as long as can realize function corresponding; In addition, the concrete title of each functional unit and module also just for the ease of mutual differentiation, is not limited to protection scope of the present invention.
In sum; Critical value or the critical value of error correction number of the embodiment of the invention through non-least significant bit page access times are set; Access times reach the critical value of said access times in said non-least significant bit page; When the ratio of non-least significant bit page that perhaps error correction number reaches the critical value of said error correction number reaches preset value, revise said non-least significant bit page in several ways, make that the least significant bit page in the revised memory device can also continue to use; Effectively prolong the serviceable life of said memory device, had stronger practicality.And, make things convenient for the user to storing the management of data in order to protect the data of having stored, and improve the satisfaction that the user uses, before revising said non-least significant bit page, the data in the said non-least significant bit page of prompting user ID.
Above content is to combine concrete preferred implementation to the further explain that the present invention did, and can not assert that practical implementation of the present invention is confined to these explanations.Those of ordinary skill for technical field under the present invention; Under the prerequisite that does not break away from the present invention's design, make some alternative or obvious modification that are equal to; And performance or purposes are identical, all should be regarded as belonging to the scope of patent protection that the present invention is confirmed by claims of being submitted to.
Claims (11)
1. the method that non-least significant bit page uses in the control store equipment is characterized in that said method comprises:
The critical value of non-least significant bit page access times or the critical value of error correction number are set;
Write down the access times or the error correction number of each non-least significant bit page;
Access times reach the critical value of said access times in said non-least significant bit page, when the ratio of non-least significant bit page that perhaps error correction number reaches the critical value of said error correction number reaches preset value, revise said non-least significant bit page.
2. the method for claim 1 is characterized in that, the said non-least significant bit page of said correction specifically comprises:
Judge whether non-least significant bit page and least significant bit page are separate management in the said memory device;
If not, delete said non-least significant bit page and relevant information thereof.
3. the method for claim 1 is characterized in that, the said non-least significant bit page of said correction specifically comprises:
Judge whether non-least significant bit page and least significant bit page are separate management in the said memory device;
If delete said non-least significant bit page corresponding file system.
4. the method for claim 1 is characterized in that, the said non-least significant bit page of said correction specifically comprises:
Judge whether non-least significant bit page and least significant bit page are separate management in the said memory device;
If, with the state position that is provided with in advance in effective status, to stop operation to non-least significant bit page.
5. like each described method of claim 1-4, it is characterized in that, before the step of the said non-least significant bit page of said correction, also comprise:
Data in the said non-least significant bit page of prompting user ID.
6. the device that non-least significant bit page uses in the control store equipment is characterized in that said device comprises:
The unit is set, is used to be provided with the critical value of non-least significant bit page access times or the critical value of error correction number;
Counting unit is used to write down the access times or the error correction number of each non-least significant bit page;
Control module; Be used for reaching the critical value of said access times when said non-least significant bit page access times; When the ratio of non-least significant bit page that perhaps error correction number reaches the critical value of said error correction number reaches preset value, revise said non-least significant bit page.
7. device as claimed in claim 6 is characterized in that, said control module comprises:
Judge module is used to judge whether non-least significant bit page and least significant bit page are separate management in the said memory device;
Control module is used in said judge module judged result deleting said non-least significant bit page and relevant information thereof for not the time.
8. device as claimed in claim 6 is characterized in that, said control module comprises:
Judge module is used to judge whether non-least significant bit page and least significant bit page are separate management in the said memory device;
Control module is used in said judge module judged result when being, deletes said non-least significant bit page corresponding file system.
9. device as claimed in claim 6 is characterized in that, said control module comprises:
Judge module is used to judge whether non-least significant bit page and least significant bit page are separate management in the said memory device;
Control module is used in said judge module judged result when being, with the state position that is provided with in advance in effective status, to stop operation to non-least significant bit page.
10. like each described device of claim 6-9, it is characterized in that said control module also comprises:
Backup module is used for before revising said non-least significant bit page, the data in the said non-least significant bit page corresponding stored of the prompting user ID address.
11. a memory device is characterized in that, said memory device comprises the device that non-least significant bit page uses in each described control store equipment of claim 6-10.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210204528.1A CN102789813B (en) | 2012-06-20 | 2012-06-20 | Method and device for controlling use of non-least significant bit page in storage device |
| PCT/CN2013/075272 WO2013189212A1 (en) | 2012-06-20 | 2013-05-07 | Method and device for controlling use of non-least-significant bit page in storage device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201210204528.1A CN102789813B (en) | 2012-06-20 | 2012-06-20 | Method and device for controlling use of non-least significant bit page in storage device |
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| CN102789813A true CN102789813A (en) | 2012-11-21 |
| CN102789813B CN102789813B (en) | 2015-03-18 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013189212A1 (en) * | 2012-06-20 | 2013-12-27 | 深圳市江波龙电子有限公司 | Method and device for controlling use of non-least-significant bit page in storage device |
| WO2015058652A1 (en) * | 2013-10-23 | 2015-04-30 | Tencent Technology (Shenzhen) Company Limited | Wear leveling method and apparatus and storage medium cross-reference to related applications |
| CN104733032A (en) * | 2013-12-19 | 2015-06-24 | 爱思开海力士有限公司 | Address detection circuit and memory device including the same |
| CN111370048A (en) * | 2018-12-25 | 2020-07-03 | 北京兆易创新科技股份有限公司 | Method and device for processing programming state of nonvolatile memory |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110517719A (en) * | 2019-08-27 | 2019-11-29 | 江苏华存电子科技有限公司 | A kind of method of dynamic N andFlash danger block screening |
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| CN102789813B (en) * | 2012-06-20 | 2015-03-18 | 深圳市江波龙电子有限公司 | Method and device for controlling use of non-least significant bit page in storage device |
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2012
- 2012-06-20 CN CN201210204528.1A patent/CN102789813B/en active Active
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- 2013-05-07 WO PCT/CN2013/075272 patent/WO2013189212A1/en active Application Filing
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| CN102214143A (en) * | 2010-04-06 | 2011-10-12 | 深圳市江波龙电子有限公司 | Method and device for managing multilayer unit flash memory, and storage equipment |
| CN102298543A (en) * | 2011-09-15 | 2011-12-28 | 成都市华为赛门铁克科技有限公司 | Memory management method and memory management device |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2013189212A1 (en) * | 2012-06-20 | 2013-12-27 | 深圳市江波龙电子有限公司 | Method and device for controlling use of non-least-significant bit page in storage device |
| WO2015058652A1 (en) * | 2013-10-23 | 2015-04-30 | Tencent Technology (Shenzhen) Company Limited | Wear leveling method and apparatus and storage medium cross-reference to related applications |
| US10061646B2 (en) | 2013-10-23 | 2018-08-28 | Tencent Technology (Shenzhen) Company Limited | Wear leveling method and apparatus and storage medium |
| CN104733032A (en) * | 2013-12-19 | 2015-06-24 | 爱思开海力士有限公司 | Address detection circuit and memory device including the same |
| CN104733032B (en) * | 2013-12-19 | 2019-03-26 | 爱思开海力士有限公司 | Address detection circuit and memory device including it |
| CN111370048A (en) * | 2018-12-25 | 2020-07-03 | 北京兆易创新科技股份有限公司 | Method and device for processing programming state of nonvolatile memory |
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| Publication number | Publication date |
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| CN102789813B (en) | 2015-03-18 |
| WO2013189212A1 (en) | 2013-12-27 |
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