CN102769869B - Message rapid forwarding system of control and provisioning of wireless access point - Google Patents

Message rapid forwarding system of control and provisioning of wireless access point Download PDF

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Publication number
CN102769869B
CN102769869B CN201210282888.3A CN201210282888A CN102769869B CN 102769869 B CN102769869 B CN 102769869B CN 201210282888 A CN201210282888 A CN 201210282888A CN 102769869 B CN102769869 B CN 102769869B
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message
tuple
list item
parallel data
hash
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CN102769869A (en
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马奔利
李西昆
范成龙
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Beijing Autelan Technology Co ltd
Beijing Hua Xinaotian Network Technology Co ltd
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Beijing Autelan Technology Co Ltd
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Abstract

The invention provides a message rapid forwarding system of a control and provisioning of wireless access point (CAPWAP). The rapid forwarding system comprises an Ethernet switching chip, a wide area network (WAN) port, a field-programmable gate array (FPGA) unit, and a processor unit, wherein the field-programmable gate array unit is used for receiving the message from the Ethernet switching chip or the WAN port, searching a list item corresponding to a quintuple of the message from a hash table, if corresponding list item is found out, transmitting the message to the processor unit, receiving packaged message from the processor unit and transmitting the message to the Ethernet switching chip or the WAN port, and building a new list item corresponding to the quintuple of the packaged message in the hash table, if corresponding list item is found out, packaging the message according to the searched list item, and transmitting the e packaged message to the Ethernet switching chip or the WAN port, and the processor unit is used for packaging the message transmitted by the FPGA unit, and transmitting the packaged message to the FPGA unit.

Description

The control of WAP (wireless access point) and configuration message fast-forwarding system
Technical field
The application relates to wireless communication technology, more specifically, relates to one and at the scene programmable gate array (FPGA) realizes the control of WAP (wireless access point) and the system of configuration (CAPWAP) message fast-forwarding.
Background technology
Wireless controller (AC) is a kind of network equipment, is the core of wireless network, is in charge of the thin WAP (wireless access point) (AP) in wireless network.Wireless network of today covers, and the mode adopting an AC to add multiple AP, is conducive to the centralized management of wireless network more.AC carrys out control AP by wireless access point control and configuration protocol (CAPWAP), under concentrated forward mode, the all messages of (STA) of standing all are packaged into CAPWAP message by AP and forward by after AC deblocking, the realization of current CAPWAP function is mainly under three-layer network transmission mode, all CAPWAP message are all packaged into User Datagram Protocol (UDP) form and transmit in Internet protocol (IP) network, and CAPWAP tunnel is also safeguarded by the IP address of the interface IP address of AC and web tool platform (WTP).
In AC, the technology of most critical is exactly the process of CAPWAP business datum, because tunnel quantity many (nearly millions of simultaneous tunnels), service traffics large (service traffics up to 20 ~ 30Gbps) are very high to the performance requirement of AC.
Current AC many employings high-performance multi-core CPU processor as data retransmission platform, and uses the dynamic random access memory (DRAM) of such as Double Data Rate Synchronous Dynamic Random Access Memory (DDR) 2 or DDR3 carry out stored messages and transmit.But following shortcoming can be there is in such scheme:
1, undesirable for short bag process;
2, CPU forwards linear speed exchange capacity deficiency in the application, particularly short message, and hydraulic performance decline is more serious;
3, high-performance multi-core CPU power consumption is very large, high to system radiating Capability Requirement;
4, the DRAM handling capacity of DDR2/3 is limited, and multiple DRAM interface concurrent must be used just to raise the efficiency;
5, the process of CPU to a message needs repeatedly access memory, further degrade performance.
Summary of the invention
The object of the present invention is to provide a kind of control and configuration (CAPWAP) message fast-forwarding system of WAP (wireless access point), comprising: Ethernet switching chip, wide area network (WAN) port, field programmable gate array (FPGA) unit, for receiving message from Ethernet switching chip or WAN port, and from Hash table, search the list item corresponding to the five-tuple of message, if do not find corresponding list item, then message is sent to processor unit, receive the message of encapsulation from processor unit subsequently and be sent to Ethernet switching chip unit or WAN port, and the new list item corresponding to the five-tuple of the message of encapsulation is set up in Hash table, if find corresponding list item, then according to the list item found, message is encapsulated, and the message of encapsulation is sent to Ethernet switching chip unit or WAN port, processor unit, encapsulates for the message sent FPGA unit, and the message of encapsulation is sent to FPGA unit.
The five-tuple of message can comprise the source IP address of message, object IP address, source port number, destination slogan and IP agreement.
Each list item of Hash table can comprise five-tuple and source MAC, the target MAC (Media Access Control) address of message.
For the CAPWAP message from WAP (wireless access point) (AP), do not find the list item corresponding to the five-tuple of message can comprise can not obtain five-tuple, five-tuple is searched unsuccessfully, message needs are recombinated or message is non-CAPWAP message; For the IP message from the Internet, do not find the list item corresponding to the five-tuple of message can comprise can not obtain five-tuple, five-tuple searches failure or message needs burst.
FPGA unit can comprise: message receiver module, receives message, carry out data syn-chronization and be converted to parallel data message to message from processor unit, Ethernet switching chip or WAN port, and stores the parallel data message of conversion; Packet parsing module, reads the parallel data message from Ethernet switching chip or WAN port, resolves to extract five-tuple to parallel data message; Hash lookup module, uses the five-tuple extracted to calculate Hash ID by hash algorithm, obtains Hash table, and in Hash table, search the list item corresponding to the five-tuple extracted according to Hash ID; Packet forwarding module, when Hash lookup module searches is to the list item corresponding to the five-tuple extracted, packet forwarding module encapsulates parallel data message according to list item corresponding to the five-tuple of parallel data message in Hash table, and the parallel data message of encapsulation is sent to message sending module, when Hash lookup module does not find the list item corresponding to the five-tuple extracted, parallel data message is directly sent to message sending module by packet forwarding module; Message sending module, is converted to serial data by the parallel data message of encapsulation and is sent to Ethernet switching chip or WAN port, parallel data message is sent to processor unit; Study and forwarding module, read the parallel data message of the encapsulation from processor unit, send it to message sending module, and create the hash table of the parallel data message about encapsulation.
When there is hash-collision, study and forwarding module also can upgrade the hash table of the parallel data message about encapsulation.
Also creation-time item can be comprised in each list item of Hash table, when there is hash-collision, if the value of the creation-time item of current entry is greater than predetermined update time, then study and forwarding module can by the five-tuple of the parallel data message of current encapsulation write current entry.
Also can comprise ageing time item in each list item of Hash table, when there is hash-collision, if the value of creation-time item of certain list item and the difference of current time are greater than the value of ageing time item, then certain list item described can be deleted by study and forwarding module.
Part in ensuing description is set forth the present invention other in and/or advantage, some will be clearly by describing, or can learn through enforcement of the present invention.
Accompanying drawing explanation
By the detailed description of carrying out below in conjunction with accompanying drawing, above and other objects of the present invention and feature will become apparent, wherein:
Fig. 1 is the block diagram that CAPWAP message fast-forwarding system is according to an exemplary embodiment of the present invention shown;
Fig. 2 is the block diagram of the FPGA unit that CAPWAP message fast-forwarding system is according to an exemplary embodiment of the present invention shown;
Embodiment
Now, describe exemplary embodiment of the present invention in detail, its example represents in the accompanying drawings, and wherein, identical label represents identical parts all the time.
Fig. 1 is the block diagram that CAPWAP message fast-forwarding system is according to an exemplary embodiment of the present invention shown.
As shown in Figure 1, CAPWAP message fast-forwarding system can comprise processor unit 110, FPGA unit 120, Ethernet switching chip 130 and wide area network (WAN) port one 40 according to an exemplary embodiment of the present invention.
FPGA unit 120 receives message from Ethernet switching chip 130 or WAN port 140, and the list item corresponding to the five-tuple of message is searched in Hash (Hash) table, here, five-tuple comprises the source IP address of message, object IP address, source port number, destination slogan and IP agreement.If FPGA unit 120 does not find the list item corresponding to the five-tuple of message, then message is sent to processor unit 110 by FPGA unit 120, encapsulated by processor unit 110 pairs of messages, FPGA unit 120 receives the message of encapsulation from processor unit 110 and sends it to Ethernet switching chip 130 or WAN port 140 according to its encapsulation subsequently, and the new list item corresponding to the five-tuple of the message of encapsulation is set up in Hash table, like this, if again receive the message with identical five-tuple, then FPGA unit 120 can directly process message, and do not need processor unit 110 to intervene.If FPGA unit 120 finds the list item corresponding to the five-tuple of message, then FPGA unit 120 directly can encapsulate message according to list item corresponding to the five-tuple of message in Hash table, and the message of encapsulation is sent to Ethernet switching chip 130 or WAN port 140.Here, each list item of Hash table can comprise the five-tuple of message and the packaging information of such as source MAC, target MAC (Media Access Control) address etc., but is not limited thereto.In addition, only exemplarily, send by Ethernet Attachment Unit Interface (XAUI) or receive message between unit.
CAPWAP (the CAPWAP from AP) message from AP or IP (IP from Internet) message two type from the Internet (Internet) can be divided into from the message that Ethernet switching chip 130 or WAN port 140 receive by FPGA unit 120.For the message of CAPWAP from AP type, do not find the list item corresponding to the five-tuple of message can comprise can not obtain five-tuple, five-tuple is searched unsuccessfully, message needs are recombinated or message is non-CAPWAP message.For the message of IP from Internet type, do not find the list item corresponding to the five-tuple of message can comprise can not obtain five-tuple, five-tuple searches failure or message needs burst.
WAN port 140 connects outer net, for message being sent to FPGA unit 120 or receiving message from FPGA unit 120.
Ethernet switching chip 130 is for being sent to FPGA unit 120 or receiving message from FPGA unit 120 by message.Here, the ether swap operation of Ethernet switching chip 130 belongs to prior art in this area, in order to avoid fuzzy theme of the present invention, is not therefore described in detail at this.
The FPGA unit 120 of the CAPWAP message fast-forwarding system shown in Fig. 1 is further described below with reference to Fig. 2.
Fig. 2 is the block diagram of the FPGA unit 120 that CAPWAP message fast-forwarding system is according to an exemplary embodiment of the present invention shown.
With reference to Fig. 2, FPGA unit can comprise message receiver module 210, packet parsing module 220, Hash lookup module 230, packet forwarding module 240, message sending module 250 and study and forwarding module 260 according to an exemplary embodiment of the present invention.
Message receiver module 210 receives message from processor unit 110, Ethernet switching chip 130 or WAN port 140, carries out data syn-chronization and be converted to parallel data message to message, and stores the parallel data message of conversion.Here, only exemplarily, message can be converted to the parallel data message of 128 bits by message receiver module 210.
Packet parsing module 220 reads from Ethernet switching chip 130 or WAN port 140 and by data syn-chronization, conversion and the parallel data message obtained, resolves to extract five-tuple to parallel data message.Here, bag can be grown up in 1900 bytes or the packet loss being less than 60 bytes by packet parsing module 220, and the five-tuple of extraction can be cached in fifo buffer (FIFO).In addition, for the message of CAPWAP from AP type, five-tuple can be extracted from internal layer IP head, for the message of IP fromInternet type, five-tuple can be extracted from IP head.
Hash lookup module 230 uses the five-tuple extracted to calculate Hash ID by hash algorithm, obtains Hash table, and in Hash table, search the list item corresponding to the five-tuple of the extraction of parallel data message according to Hash ID.Here, Hash ID is by the memory address of the Hash table searched.In addition, only exemplarily, each list item of Hash table can comprise: five-tuple, 802.3 frame heads, VLAN OUT, VLAN IN, IP heading, UDP heading, CAPWAP message head, 802.11 frame heads.
If (namely Hash lookup module 230 finds the list item corresponding to the five-tuple of the extraction of parallel data message, Hash mates), then packet forwarding module 240 encapsulates parallel data message according to list item corresponding to the five-tuple of parallel data message in Hash table, and the parallel data message of encapsulation is sent to message sending module 250; Otherwise parallel data message is directly sent to message sending module 250 by packet forwarding module 240.Here, packet forwarding module 240 can support the forwarding of four kinds of patterns, that is, Internet to Internet (Internet to Internet), AP to Internet (AP toInternet), AP to AP (AP to AP), Internet to AP (Internet to AP).For the message of to Internet, the encapsulation operation of packet forwarding module 240 can comprise to be removed outer envelope, add 802.3 frame heads, the TTL in IP heading is subtracted 1 and recalculate School Affairs.For the message of to AP, the encapsulation operation of packet forwarding module 240 can comprise adds successively or upgrades LLC/SNAP head, 802.11 frame heads, CAPWAP head, UDP head, IP heading, 802.3 frame heads, the TTL of IP heading is subtracted 1, recalculate School Affairs, fragment (Fragment) ID of outer IP heading is increased progressively, the FragmentID of CAPWAP head is increased progressively, sequence (sequence) ID of 802.11 frame heads is increased progressively.In addition, packet forwarding module 240 supports the configuration of QOS_EN when transferring out soon simultaneously, and when QOS_EN is 1,802.11 frame heads of output are 28 bytes of band QOS information, and when QOS_EN is 0,802.11 frame heads of output are 24 bytes not with QOS information.Should be appreciated that, the concrete forwarding of above-mentioned message and encapsulation operation are only examples, and those skilled in the art can make a change above-mentioned concrete forwarding operation completely according to actual needs.
The parallel data message of encapsulation is converted to serial data message by message sending module 250, and sends it to Ethernet switching chip 130 or WAN port 140 according to its encapsulation.In addition, parallel data message also can be directly sent to processor unit 110 by message sending module 250.
Study and forwarding module 260 read from processor unit 110 and by data syn-chronization, conversion and the parallel data message of encapsulation that obtains, send it to message sending module 250, and create the hash table about the parallel data message encapsulated.More specifically, the five-tuple of the parallel data message of encapsulation, source MAC, target MAC (Media Access Control) address can be created in Hash table as new list item by FPGA unit 120, but this is only example, those skilled in the art can change according to actual needs by the content of the hash table created.
In addition, for two different five-tuples, if the Hash ID calculated is identical, then this situation is exactly hash-collision, therefore, Hash table space is occupied for a long time for avoiding a kind of message, also can be upgraded by study and forwarding module 260 pairs of Hash tables, more specifically, following two kinds of process can be carried out: 1) comprise a creation-time item (setup_time) at each list item of Hash table, when there is hash-collision, when there is hash-collision, if the value of the setup_time of current entry is greater than predetermined update time (update_time), then current entry is upgraded, 7 five-tuples of the parallel data message of write current encapsulation, 2) arrange aging polling mechanism, that is, timing is carried out aging (deletion) Hash table, specifically, comprises an ageing time item (aging_time) at each list item of Hash table.When there is hash-collision, if the value of the setup_time of certain list item and the difference of current time are greater than the value of aging_time, then certain list item described is deleted.
In addition, as optional module, FPGA unit 120 also can comprise memory module, and for the parallel data message storing Hash table and changed by message receiver module 210, or the modules of FPGA unit 120 may have access to or reads and is stored in Hash table in external memory storage and parallel data message.
Should understand, the modules that FPGA unit shown in Fig. 2 comprises is only example, those skilled in the art can carry out function fractionation or combination to modules completely according to actual needs, such as, a module can be used to realize the function etc. of message receiver module 210 and packet parsing module 220, do not repeat them here.
According to exemplary embodiment of the present invention, the pipeline design is have employed in FPGA unit, the data flow of message is a way flow not having to feed back, the output of previous step is the input of a rear step, therefore the operating frequency of system can be improved, this is a kind of imbody that area exchanges speed for.In addition, FPGA unit can also realize many pipeline and parallel designs, greatly improves CAPWAP message forwarding performance, support the linear speed exchange capacity of 30G data traffic, and the message that length is below 256 bytes also can reach surface speed forwarding.Owing to employing FPGA, thus more convenient in debugging, and there is compatible and scalability preferably.
Although illustrate and describe the present invention with reference to certain exemplary embodiments, but it will be apparent to one skilled in the art that the various changes can made when not departing from the spirit and scope of the present invention of scope by claim and equivalents thereof in form and details.

Claims (7)

1. the control of WAP (wireless access point) and configuration (CAPWAP) message fast-forwarding system, comprising:
Ethernet switching chip;
Wide area network (WAN) port;
Field programmable gate array (FPGA) unit, comprising:
Message receiver module, receives message from processor unit, Ethernet switching chip or WAN port, carries out data syn-chronization and be converted to parallel data message to message, and stores the parallel data message of conversion;
Packet parsing module, reads the parallel data message from Ethernet switching chip or WAN port, resolves to extract five-tuple to parallel data message;
Hash lookup module, uses the five-tuple extracted to calculate Hash ID by hash algorithm, obtains Hash table, and in Hash table, search the list item corresponding to the five-tuple extracted according to Hash ID;
Packet forwarding module, when Hash lookup module searches is to the list item corresponding to the five-tuple extracted, packet forwarding module encapsulates parallel data message according to list item corresponding to the five-tuple of parallel data message in Hash table, and the parallel data message of encapsulation is sent to message sending module, when Hash lookup module does not find the list item corresponding to the five-tuple extracted, parallel data message is directly sent to message sending module by packet forwarding module;
Message sending module, is converted to serial data by the parallel data message of encapsulation and is sent to Ethernet switching chip or WAN port, parallel data message is sent to processor unit;
Study and forwarding module, read the parallel data message from the encapsulation of processor unit, send it to message sending module, and create the hash table of the parallel data message about encapsulation, if make again to receive the message with identical five-tuple, then FPGA unit directly processes message and does not need processor unit intervention
Wherein, in FPGA unit, one or more the pipeline design is adopted;
Processor unit, encapsulates for the message sent FPGA unit, and the message of encapsulation is sent to FPGA unit.
2. CAPWAP message fast-forwarding system as claimed in claim 1, wherein, the five-tuple of message comprises the source IP address of message, object IP address, source port number, destination slogan and IP agreement.
3. CAPWAP message fast-forwarding system as claimed in claim 1, wherein, each list item of Hash table comprises five-tuple and source MAC, the target MAC (Media Access Control) address of message.
4. CAPWAP message fast-forwarding system as claimed in claim 1, wherein,
For the CAPWAP message from WAP (wireless access point) (AP), do not find the list item corresponding to the five-tuple of message comprise can not obtain five-tuple, five-tuple is searched unsuccessfully, message needs are recombinated or message is non-CAPWAP message;
For the IP message from the Internet, do not find the list item corresponding to the five-tuple of message comprise can not obtain five-tuple, five-tuple searches failure or message needs burst.
5. CAPWAP message fast-forwarding system as claimed in claim 1, wherein, when hash-collision occurs, study and forwarding module also upgrade the hash table of the parallel data message about encapsulation.
6. CAPWAP message fast-forwarding system as claimed in claim 5, wherein, creation-time item is also comprised in each list item of Hash table, when there is hash-collision, if the value of the creation-time item of current entry is greater than predetermined update time, then study and forwarding module are by the five-tuple of the parallel data message of current encapsulation write current entry.
7. CAPWAP message fast-forwarding system as claimed in claim 6, wherein, ageing time item is also comprised in each list item of Hash table, when there is hash-collision, if the value of creation-time item of certain list item and the difference of current time are greater than the value of ageing time item, then certain list item described is deleted by study and forwarding module.
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