CN102741801A

CN102741801A - Storage control device and control method of storage control device

Info

Publication number: CN102741801A
Application number: CN2010800631691A
Authority: CN
Inventors: 葛城荣寿
Original assignee: Hitachi Ltd
Current assignee: Hitachi Ltd
Priority date: 2010-04-14
Filing date: 2010-04-14
Publication date: 2012-10-17
Anticipated expiration: 2030-04-14
Also published as: JPWO2011128936A1; CN102741801B; US8984352B2; JP5451874B2; US20130024734A1; WO2011128936A1; EP2560089A4; EP2560089B1; EP2560089A1

Abstract

Disclosed is a storage control device which suppresses lengthening of response time of the storage control device even if the response time of a storage device is long. A disk adapter (DKA), upon receiving a read message from a channel adapter (CHA), sets a timeout time on the basis of a predetermined condition, and attempts reading of data from a storage device (4). One of either a normal value or a shortened value is selected as the timeout time. If a timeout error occurs, the read job is reset and a collection read is started.

Description

The control method of memory control device and memory control device

Technical field

The present invention relates to the control method of a kind of memory control device and memory control device.

Background technology

Users such as enterprise use memory control device that data are managed.The physical storage areas that memory control device has a plurality of memory storages separately is as (Redundant Array of Independent Disks: the storage area of redundancy RAID) divides into groups based on RAID.Storage area formation logic volume after memory control device uses and divides into groups also offers principal computer (following be main frame).

Memory control device is when when request of reading that receives from main frame, to reading of hard disk designation data.Carry out being stored the flash memory behind the address mapping from the data that hard disk reads out, and be sent to main frame.

Hard disk has produced some problem and can't under the situation of recording medium reading of data, want the spended time retry at recording medium or magnetic head.Also can't be under the situation of recording medium reading of data even handle at the execution retry, memory control device is carried out set and is duplicated the data that generate from host requests.Set is duplicated and is meant that other each hard disk reading of data and the PB that is subordinated to the parity group identical with the hard disk that fault has taken place makes the method (patent documentation 1) of data recovery.

Patent documentation 1: TOHKEMY 2007-213721 communique

Summary of the invention

Handle if in hard disk, carry out retry, the time that the request of reading of then sending from main frame is processed is elongated.Therefore, the response performance variation of memory control device, the quality of the service that is provided by the application program on the main frame descends.

If the application program of moving on the main frame is not minded the response time, then can not produce special problem.But, must handle at short notice under the situation from the application program of a large amount of visits of client computer in that kind such as for example ticketing program, subscription procedure, moving image transmission, if the response time of memory control device is elongated, then service quality descends.

Therefore, the object of the present invention is to provide the control method of a kind of memory control device and memory control device, even its response time that under the situation of the response time of memory storage than length, also can suppress memory control device response epigyny device is elongated.Other purpose of the present invention from after will become clear the record of the embodiment stated.

In order to address the above problem, data to be imported, exported in response to request according to the memory control device of first viewpoint of the present invention from epigyny device, this memory control device possesses: a plurality of memory storages, these a plurality of memory storages are stored data; And controller, it is connected with epigyny device and each memory storage, in response to the request from epigyny device; The memory storage that data are stipulated in each memory storage carries out input and output; Wherein, controller is set at second value of than first value lacking with time-out time when when epigyny device receives access request under the situation of regulation; And the specified data corresponding with access request read in the memory storage request of the regulation in each memory storage; In the time-out time that sets, can't obtain under the data conditions from the memory storage of regulation, detect to time-out error takes place, first management department is used to manage the fault that in each memory storage, takes place; Detecting under the situation of time-out error; To the managing of time-out error, and other the memory storage request that is associated to the memory storage with regulation reads the data with corresponding other of predetermined data by second management department that is different from this first management department, the data of other that obtains according to the memory storage from other; Generate predetermined data, and the predetermined data that is generated is transferred to epigyny device.

Second viewpoint is on the basis of first viewpoint, it is characterized in that controller possesses: first communication control unit, and it is used for communicating with epigyny device; The second communication control part, it is used for communicating with each memory storage; And storer; It is used by first communication control unit and second communication control part; In storer, store time-out time and set the information of using; This time-out time sets to be used for judging which value that time-out time is set at first value and second value with information, and time-out time is set and used information, comprises the quantity that each memory storage is made as the formation of object; FIFO when the queuing pattern is set to the FIFO pattern is used threshold value; And the queuing pattern is set to according to logical address and uses threshold value less than FIFO with the ordering of threshold value from closely to sequencing model that order far away sorts the time; When first communication control unit receives the access request from epigyny device; The second communication control part is set the information of using according to time-out time; The memory storage with regulation be made as object formation quantity for the pairing FIFO of queuing pattern that the memory storage of regulation is set with threshold value with sort with any situation more than the value in the threshold value under; Time-out time when selecting first value to read predetermined data as memory storage from regulation; The quantity of formation that is made as object at memory storage with regulation less than the pairing FIFO of queuing pattern that the memory storage of regulation is set with under threshold value and the situation about sorting with any value in the threshold value; Time-out time when selection is read predetermined data less than second value of first value as the memory storage from regulation; The second communication control part reads predetermined data to the memory storage request of regulation; The second communication control part can't obtain under the situation of predetermined data from the memory storage of regulation in the time-out time that sets; Detect the generation of time-out error; The second communication control part is detecting under the situation of time-out error, makes second management department that is different from first management department that is used to manage the fault that in each memory storage, takes place to the managing of time-out error, and is used to make the recovery of the regulation relevant with the memory storage that fault has taken place to handle the value of the recovery of beginning with threshold value; Be set to second management department greater than first management department; The second communication control part is set selecteed other the time-out time of first value, and the data with corresponding other of predetermined data are read in the memory storage request of other that comes to be associated to the memory storage with regulation, and the data of other that obtains according to the memory storage from other generate predetermined data; The predetermined data that is generated is transported to epigyny device; The second communication control part can't obtain other data and select and under the situation of second value as time-out time time-out time changed to first value from other memory storage in other time-out time, and read predetermined data to the memory storage request of regulation once more.

The 3rd viewpoint is on the basis of first viewpoint; It is characterized in that; The quantity of the fault that first management department will take place in each memory storage is handled the recovery that begins with the recovery that is used to make the regulation relevant with the memory storage that fault has taken place and is managed accordingly with threshold value; The quantity of the time-out error that second management department will take place in each memory storage is handled other recovery that begins with the recovery that is used to make the regulation relevant with the memory storage that time-out error has taken place and is managed accordingly with threshold value, and other recovery of being managed by second management department is configured to use threshold value greater than the recovery of being managed by first management department with threshold value.

The 4th viewpoint is on the basis of first viewpoint; It is characterized in that; Controller is being set the memory storage of regulation under the situation of the Assured Mode that is used to guarantee the response in the stipulated time, and the time-out time in the time of will reading predetermined data from the memory storage of regulation is set at second value.

The 5th viewpoint is on the basis of first viewpoint; It is characterised in that; Controller is being under the situation of FIFO pattern with the relevant queuing mode initialization of memory storage with regulation, and the time-out time in the time of will reading predetermined data from the memory storage of regulation is set at second value.

The 6th viewpoint is on the basis of first viewpoint; It is characterized in that; Memory storage in regulation is under the situation of the memory storage beyond the memory storage of preassigned low speed, and the time-out time when controller will read predetermined data from the memory storage of regulation is set at second value.

The 7th viewpoint is on the basis of first viewpoint; It is characterized in that; Under the situation of quantity less than the threshold value of regulation of the formation that the memory storage of stipulating is made as object, the time-out time when controller will read predetermined data from the memory storage of regulation is set at second value.

The 8th viewpoint is on the basis of first viewpoint; It is characterized in that; Controller possesses time-out time and sets the information of using; It is to be used for judging that which the time-out time setting that time-out time is set at first value and second value uses information that this time-out time is set with information; And comprise with each memory storage be made as the quantity of the formation of object, FIFO when the queuing pattern is set to the FIFO pattern is set to according to logical address with threshold value and queuing pattern and uses threshold value less than FIFO with the ordering of threshold value from closely to sequencing model that order far away sorts the time; And controller the memory storage with regulation be made as object formation quantity for the FIFO corresponding with the queuing pattern that the memory storage of regulation is set with threshold value with under sorting with any situation more than the value in the threshold value; Time-out time when selecting first value to read predetermined data as memory storage from regulation; With under threshold value and the situation of ordering with any value in the threshold value, selection is less than second value conduct of first value time-out time when the memory storage of stipulating reads predetermined data less than the FIFO corresponding with the queuing pattern that the memory storage of regulation is set for the quantity of formation that is made as object at the memory storage with regulation.

The 9th viewpoint is on the basis of first viewpoint; It is characterized in that; Controller is detecting under the situation of time-out error; Set selecteed other the time-out time of first value, the data with corresponding other of predetermined data are read in the memory storage request of other that comes to be associated to the memory storage with regulation.

The tenth viewpoint is on the basis of first viewpoint; It is characterized in that; Controller is detecting under the situation of time-out error; Set selecteed other the time-out time of second value, the data with corresponding other of predetermined data are read in the memory storage request of other that comes to be associated to the memory storage with regulation.

The 11 viewpoint is on the basis of the tenth viewpoint; It is characterized in that; Controller can't obtain from other memory storage under other the data conditions in other time-out time, and time-out time is changed to first value, reads predetermined data to the memory storage request of regulation once more.

The 12 viewpoint is on the basis of the tenth viewpoint, it is characterized in that, controller can't obtain from other memory storage under other the data conditions in other time-out time, to this situation of user notification.

The present invention also can grasp as the control method of memory control device.And at least a portion of structure of the present invention can constitute computer program.This computer program can be fixed in the storage medium and issue, perhaps distribute via communication network.And other combination beyond the combination of above-mentioned viewpoint is also contained in the scope of the present invention.

Description of drawings

Fig. 1 is the key diagram of expression embodiment global concept of the present invention.

Fig. 2 is the integrally-built key diagram that expression comprises the system of memory control device.

Fig. 3 is the block diagram of memory control device.

Fig. 4 is the key diagram of the matching status of expression slot and memory storage.

Fig. 5 is the key diagram of the difference of expression queuing pattern.

Fig. 6 is the table that the relation of memory storage and virtual disk (RAID group) is managed.

Fig. 7 is the table that virtual disk is managed.

Fig. 8 is the table that the pattern that can set from the office terminal is managed.

Fig. 9 is the table that is used for management operations.

Figure 10 is that the process flow diagram of processing is read in expression.

Figure 11 is the process flow diagram of expression treatment by stages.

Figure 12 is that the process flow diagram of processing is read in the expression set.

Figure 13 is the process flow diagram that the expression error count is handled.

Figure 14 representes table that error count is managed.

Figure 15 is the key diagram of the expression method that is used for setting time-out time shorter than typical values.

Figure 16 relates to second embodiment, is the table that the threshold value that is used to set time-out time is managed.

Figure 17 relates to the 3rd embodiment, is that the process flow diagram of processing is read in the expression set.

Figure 18 relates to the 4th embodiment, is the table that the state of treatment by stages is managed.

Figure 19 is the process flow diagram of expression treatment by stages.

Figure 20 is the process flow diagram after Figure 19.

Figure 21 is that the process flow diagram of processing is read in set.

Figure 22 relates to the 5th embodiment, is the process flow diagram of expression treatment by stages.

Figure 23 is the table that the response time of each memory storage is managed.

Figure 24 is the one-piece construction figure of the related system of the 6th embodiment.

Figure 25 is the process flow diagram of treatment by stages.

Figure 26 is the process flow diagram after Figure 25.

Embodiment

Below, according to description of drawings embodiment of the present invention.At first summary of the present invention is described, then with reference to the later description of drawings embodiment of Fig. 2 with reference to Fig. 1.Fig. 1 is with understanding of the present invention and implement needed degree and put down in writing.Scope of the present invention is not limited to the structure that Fig. 1 puts down in writing.Fig. 1 do not have record characteristic will after become clear among the embodiment that states.

Fig. 1 representes whole summary.The structure of computer system is shown in the left side of Fig. 1, the summary of processing is shown on its right side.Computer system possesses memory control device 1 and as the main frame 2 of epigyny device.Memory control device 1 possesses controller 3 and memory storage 4.Controller 3 possesses channel adapter 5 as first communication control unit, storer 6 and as the disk adapter 7 of second communication control part.In the explanation below, be DKA for CHA, with the disk adapter brief note with the channel adapter brief note.The contents processing of representing DKA7 with the scope of the dotted line among Fig. 1.

As memory storage 4, for example can utilize the various devices that can read and write data of hard disk unit, semiconductor memory system, optical disc apparatus, magneto-optical disc apparatus, magnetic tape equipment, diskette unit etc.

Using under the situation of hard disk unit as memory storage, for example can use FC (Fibre Channel: optical-fibre channel) dish, SCSI (Small Computer System Interface: small computer system interface) dish, SATA dish, ATA (AT Attachment) dish, SAS (Ser ial Attached SCSI) dish etc.Using under the situation of semiconductor memory system, for example can utilize flash memory, FeRAM (Ferroelectric Random Acc ess Memory), MRAM (Magnetoresistive Random Access Memory), Ovonics unified memory (Ovonic Unified Memory), RRAM (Resistance RAM), PRAM various storage arrangements such as (Phase change RAM) as memory storage.

The application program of operation is sent access request (among the figure " IO ") to memory control device 1 on main frame 2.In access request, read and ask and write request.The request of reading is used for request from memory storage 4 reading of data.The request of writing is used for request and writes data to memory storage 4.Write under the situation of request in memory control device 1 processing, the situation about reading of at first carrying out data with existing is also more.That is to say, write in processing under the situation of request, in memory control device 1, carry out reading of data.

CHA5 generates the operation (S1) that is used to obtain the data of being asked when the access request (for example reading request) that receives from main frame 2.

DKA7 sends the request of reading (S2) to the memory storage 4 of the regulation that stores the data that main frame 2 asked when detecting the operation of being created by CHA5.The memory storage 4 that receives the request of reading will be from storage medium reading of data (S3).

The needed upper limit time (time-out time) (S4) till the DKA7 setting got access to data from memory storage 4.Below, sometimes the time-out time brief note is TOV (Time Out Value).

A plurality of TOV have been prepared in advance.Be as the TOV1 of first value with as the TOV2 of second value.TOV1 is the value that is set usually.TOV2 is the value that under the situation of paying attention to response performance, is set, and is set to the value shorter than TOV1.Thereby, also can TOVl be referred to as typical values, TOV2 is referred to as the shortening value.

In an example, TOVl is set to 4-6 about second.TOV2 is set to about 1 second, for example about 0.9 second.TOV2 is configured to gather the aggregate value that reads needed time of processing and TOV2 and converges on the for example stipulated time about 2 seconds.

DKA7 is according to predetermined conditions, and time-out time is set at some among TOV1 and the TOV2.Record and narrate details after a while, for example under the situation of the pattern of having set the response time that guarantees memory control device 1, select TOV2.Be set under the situation of FIFO (FIFO:First In First Out) pattern with the memory storage 3 relevant queuing patterns (disposal route of formation) of reading object, selecting TOV2.Memory storage 4 in reading object is under the memory storage situation in addition of low speed, selects TOV2.And, also can select any among TOV1 and the TOV2 according to the operation conditions (load condition) of the memory storage 4 of reading object.

Under the situation of existence from the response of memory storage 4, the data that read out from memory storage 4 send to main frame 2 through CHA5 in the time-out time that sets.Therewith relatively, taken place in the inside of memory storage 4 that some is wrong and under the situation that can't in time-out time, respond, DKA7 is judged as time-out error (S5) takes place.

DKA7 is used in the generation of management department (second management department) the storage time-out error (overtime fault) of management time-out error.Be stored the management department (first management department) of the ordinary failures that is used for managing storage from the common fault of memory storage 4 report.

DKA7 is when detecting time-out error, and reading of will in S3, sending asks to reset (S7).DKA7 begins to gather and reads processing (S8).Set is read to handle and is meant that other each memory storage 4 that is subordinated to the parity group identical with the memory storage that detects time-out error 4 reads other data (and PB) and the processing through the initial reading object data of logical operation generation of the strip row that belong to identical with initial reading object data.Set is read processing and also is called as set replication.

DKA7 is sent to flash memory (S9) with the data that are resumed.Though omitted diagram, the data that CHA5 will be sent to flash memory send to main frame 2.Thus, finishing dealing with of the request of reading (reading order) that receives from main frame 2.

In this embodiment that constitutes like this; DKA7 is satisfying under the situation of defined terms, sets short time-out time TOV2 to the request of reading of sending to memory storage 4, under the situation that has produced time-out error; The request of reading is resetted, carry out set and read processing.

Thereby, even, can prevent also that therefore the response performance of memory control device 1 from descending because high load capacity etc. is former thereby cause reading processing owing to when having passed through TOV2, gather under the situation that the response performance of the memory storage 4 of reading object descends.The response time of memory control device 1 can be sent data to main frame 2 for set being read the value that needed time of processing and TOV2 addition obtain in the response time of regulation.

In this embodiment; For example be the situation of FIFO, be not that situation, the memory storage of the memory storage of low speed is not under the situation of high load capacity that the time-out time in the time of will be from memory storage 4 reading of data is set at the value TOV2 shorter than general case in the situation of having set the response time Assured Mode, queuing pattern.Thereby, in this embodiment, can prevent that the response performance of storing control 1 from descending according to situation.

In this embodiment, by the management department management time-out error different with the management department that the fault of common memory storage is managed.Thereby; In this embodiment, can be split up into time-out error and control the startup of handling (processing that for example data of this memory storage 4 is copied to the processing of the memory storage of preparation, perhaps through set replication the data in this memory storage 4 recovered) with the memory storage that fault has taken place 4 relevant recoveries with common fault.

That is to say that in this embodiment, for the decline of the response performance that prevents memory control device 1, and under rated condition, the time-out time in the time of will be from memory storage 4 reading of data is set at the short value TOV2 of value TOV1 than in the past.Thereby, according to the state of memory storage 4, many time-out errors might take place.When time-out error and common fault are jointly managed, two sides are added the possibility that together failure count surpasses threshold value uprise, thereby the number of times that recovers to handle increases.When recovering to handle continually, the load of memory control device 1 increases, and might bring harmful effect to the response performance of memory control device 1.Therefore, in this embodiment, time-out error separated with common memory storage fault manage.

Embodiment 1

Fig. 2 representes to comprise the one-piece construction of the system of the related memory control device of present embodiment 10.This system for example can comprise at least one memory control device 10, one or more main frame 20 and at least one office terminal 30.

The corresponding relation of the embodiment that explanation is recorded and narrated in Fig. 1.The memory control device 1 of memory control device 10 corresponding diagram 1; The memory storage 4 of memory storage 210 corresponding diagram 1; The main frame 2 of main frame 20 corresponding diagram 1, the controller 3 of controller 100 corresponding diagram 1, the CHA5 of channel adapter 110 corresponding diagram 1; The DKA7 of disk adapter 120 corresponding diagram 1, the storer 6 of flash memory 130 and shared storage 140 corresponding diagram 1.

Main frame 20 and office terminal 30 at first are described, memory control device 10 is described then.Main frame 20 for example is constituted as host computer or server computer.Main frame 20 is connected with memory control device 10 via communication network CN1.Communication network CN1 for example can constitute FC-SAN (Fibre Channel-Storage Area Network) or the such communication network of IP-SAN (Internet Protocol SAN).

Office terminal 30 is connected with memory control device 10 interior service processors 160 via communication network CN3.Service processor 160 is connected with CHA110 etc. via internal network CN4.Communication network CN3, CN4 for example are constituted as the communication network as LAN (Local Area Network).The various information that collect in the memory control device 10 through service processor (following is SVP) 160 office terminal 30.And office terminal 30 can be through the various settings in the SVP160 indication memory control device 10.

The structure of memory control device 10 is described.Memory control device 10 can roughly be divided into controller 100 and memory storage loading part 200.Controller 100 for example constitutes the CHA110 that possesses at least more than one, at least more than one DKA120, at least more than one flash memory 130, at least more than one shared storage 140, connecting portion (" SW " among the figure) 150 and SVP160.In addition, also can be through the interconnective structure of switch with a plurality of controllers 100.For example also can constitute bunch by a plurality of controllers 100.

CHA110 be used to control and main frame 20 between data communication, for example be constituted as the computer installation that possesses microprocessor and local storage etc.Each CHA110 possesses at least more than one COM1.

DKA120 be used to control and each memory storage 210 between data communication, likewise be constituted as the computer installation that possesses microprocessor and local storage etc. with CHA110.

Each DKA120 for example is connected through the communication path CN2 according to fiber channel protocol with each memory storage 210.It is the data transmission of unit that each DKA120 and each memory storage 210 carry out with the piece.

The path of controller 100 each memory storage 210 of visit is by tediously longization.Even in a certain side's DKA120 or communication path CN2, produced under the situation of fault, controller 100 also can utilize the opposing party's DKA120 or communication path CN2 access to storage device 210.Likewise the path between main frame 20 and the controller 100 also can be by tediously longization.The structure of CHA110 and DKA120 is recorded and narrated in Fig. 3 after a while.

The action of CHA110 and DKA120 is described simply.CHA110 stores this reading order in the shared storage 140 into when receiving from reading order that main frame 20 sends.DKA120 is at any time with reference to shared storage 140, when finding untreated reading order, from memory storage 210 reading of data and store flash memory 130 into.CHA110 reads the data that are transferred to flash memory 130, and sends to main frame 20.The processing that the data that DKA120 is read out from memory storage 210 are sent to flash memory 130 is called treatment by stages.Record and narrate treatment by stages after a while in detail.

On the other hand, CHA110 stores write command into shared storage 140 when receiving from write command that main frame 20 sends.What in addition, CHA110 will receive writes data storage to flash memory 130.CHA110 writes completion to main frame 20 reports after flash memory 130 having been stored write data.DKA120 reads the data that are stored in the flash memory 130 according to the write command that is stored in the shared storage 140, and stores the memory storage 210 of regulation into.

Flash memory 130 is for example stored user data that receives from main frame 20 etc.Flash memory 130 for example is made up of volatile memory or nonvolatile memory.Shared storage 140 for example is made up of nonvolatile memory.The various table T that in shared storage 140, state after the storage, management information etc.

Shared storage 140 can mix with flash memory 130 and is arranged on the same storer substrate.Perhaps, also can the part of storer be used as cache area, another part is used as the control area.

Connecting portion 150 makes each CHA110, each DKA120 and flash memory 130 be connected respectively with shared storage 140.Thus, all CHA110, DKA120 can visit flash memory 130 and shared storage 140 respectively.Connecting portion 150 for example can constitute crossbar switch etc.

SVP160 is connected with each DKA120 with each CHA110 respectively via internal network CN4.In addition, SVP160 is connected with office terminal 30 via communication network CN3.SVP160 collects the various states of memory control device 10 inside, and offers office terminal 30.In addition, SVP160 also can be only be connected with a certain side among the DKA120 with CHA110.This is because SVP160 can collect various status informations through shared storage 140.

The structure of controller 100 is not limited to above-mentioned structure.For example also can be provided with respectively on one or more control basal plate carry out and main frame 20 between data communication function, carry out and memory storage 210 between data communication function, temporarily preserve the function of data and can preserve the various functions of showing class with rewriteeing.

Structure to memory storage loading part 200 describes.Memory storage loading part 200 possesses a plurality of memory storages 210.Each memory storage 210 for example is constituted as hard disk unit.Be not limited to hard disk unit, also have the situation that to use flash memory device, optomagnetic memory storage, holographic memory device etc.

Though the difference according to RAID structure etc. also there are differences, for example the memory storage 210 by specified quantities such as two one group or tetrads constitutes parity group 220.Parity group 220 is virtual obtaining of physical storage areas that each memory storage 210 in the parity group 220 is had separately.

Thereby parity group 220 is virtual physical storage areas that obtain.Sometimes this virtual physical storage areas that obtains is called VDEV in the present embodiment.Can in this virtual physical storage areas that obtains, one or more logical storage devices (LDEV) 230 be set.Logical storage devices 230 is corresponding with LUN (Logical Unit Number), is provided for main frame 20.Logical storage devices 230 also is called as logical volume.

Fig. 3 is the block diagram of the structure of expression CHA110 and DKA120.CHA110 for example possesses protocol chip 111, dma circuit 112 and microprocessor 113.Protocol chip 111 is the circuit of communicating by letter that are used to carry out with main frame 20.The molar behavior of microprocessor 113 control CHA110.Dma circuit 112 is to be used for carrying out the circuit that the data between protocol chip 111 and the flash memory 130 transmit through DMA (Direct Memory Access) mode.

DKA120 and CHA110 likewise for example possess protocol chip 121, dma circuit 112 and microprocessor 123.And DKA120 also possesses parity checking generative circuit 124.

Protocol chip 121 is to be used for the circuit that communicates with each memory storage 210.The molar behavior of microprocessor 123 control DKA120.Parity checking generative circuit 124 is through generating the circuit of parity data according to being stored in logical operation that the data in the flash memory 130 stipulate.Dma circuit 122 is to be used for carrying out the circuit that the data between memory storage 210 and the flash memory 130 transmit through dma mode.

Fig. 4 is the key diagram that schematically shows the matching status of slot 300 and memory storage 210.The situation of (a) expression RAID5 of Fig. 4, the situation of (b) expression RAID1 of Fig. 4.

(a) expression of Fig. 4 is made up of the situation of the RAID5 of 3D+1P three data disks (#0, #1, #2) and a parity disk (#3).Configuration slot # 0～slot # 7 in data disk (#0), configuration slot # 8～slot # 15 in data disk (#1), configuration slot # 16～slot # 23 in data disk (#2), configuration PB #0～#7 in the parity disk (#3) on right side.That is, dispose eight continuous slots respectively at each data disk.

With PB is that (size of #0～#7) is called the parity checking circulation to eight slot amounts.In the next parity checking circulation of illustrated parity checking round-robin, storage parity position in the adjacent disk (#2) in the left side of disk (#3).And, in next parity checking circulation, storage parity position in disk (#1).Like this, the disk of storage parity position all moves in each parity checking circulation.Can know that from Fig. 4 (a) quantity of the slot that parity checking circulation is comprised can multiply by 8 to be obtained through the quantity of data disk.

Fig. 5 schematically shows the disposal route of formation.(a) of Fig. 5 shows seven formations of total of No. seven, number one to the.The transverse axis of Fig. 5 (a) is represented the logical address on the storage area of memory storage 210.The reception order that the numbering of formation is represented to order.Between formation apart from the distance on the counterlogic address.

The disposal route (pattern) of (b) expression formation of Fig. 5.As the queuing pattern, for example known have fifo mode and a sequencing model.In fifo mode, the before formation that receives begins to handle.Thereby, handle successively in order from No. seven formations of number one formation to the.Therewith relatively, in sequencing model, for shorten to rotate as much as possible the stand-by period with searching the stand-by period with queue reordering.In embodiment illustrated, handle with the order of number one formation, No. six formation, No. three formation, No. five formation, No. four formation, No. second formation.Though No. second formation generated in period early, it is handled to be postponed and carries out.If received No. seven formation before finishing dealing with of No. four formation, then and then handle No. seven formation after No. four formation, handle No. second formation at last.

Such visit as shown in Figure 5 concentrates on specific narrow zone, under rare occasion, receive away from the position conduct interviews order the time, this away from the order that constantly received afterwards of process of commands surmount.This away from order for a long time (for example about one second) be not processed.Like this, sequencing model is compared average response time with fifo mode and accelerated, and is big but the maximal value of response time also becomes.

Fig. 6 representes table T10 that the corresponding relation of device ID and VDEV is managed.This admin table T10 is stored in the shared storage 140.CHA110, DKA120 can copy at least a portion of table T10 in the local storage in CHA110, the DKA120 and use.

Device ID-VDEV corresponding relation admin table T10 manages logical volume 230 and the corresponding relation as the VDEV220 of virtual intermediate storage mean.Admin table T10 for example will install ID hurdle C11, VDEV numbered bin C12, beginning slot hurdle C13 and slot count hurdle C14 and manage accordingly.

Storage is used for the information of recognition logic volume 230 in device ID hurdle C11.Storage is used to discern the information of VDEV220 in VDEV numbered bin C12.The slot numbering that storage representation logical volume 230 from which slot in the VDEV220 begins in beginning slot hurdle C13.Storage constitutes the slot count of logical volume 230 in slot count hurdle C14.

Fig. 7 representes to be used to manage the table T20 of VDEV220.Admin table T20 is stored in the shared storage 140.CHA110 and DKA120 can copy at least a portion of admin table T20 in the local storage and use.

VDEV admin table T20 for example counts hurdle C24, parity checking circulation slot count hurdle C24, disk type hurdle C26, queuing pattern hurdle C27 and response time Assured Mode hurdle C28 with VDEV numbered bin C21, slot size hurdle C22, RAID grade hurdle C23, data-driven and manages accordingly.

The information of each VDEV220 of storage identification in VDEV numbered bin C21.The quantity of storage and the corresponding slot of VDEV in slot size hurdle C22.The kinds of information of the expression RAID of storage as RAID1～RAID6 in RAID grade hurdle C23.Count the quantity that the memory storage 210 of data is preserved in storage among the hurdle C24 in data-driven.

The quantity of the slot that parity checking circulation of storage is comprised in parity checking circulation slot count hurdle C24.This slot count is illustrated in what slots, to turn under the situation that disposes slot in the memory storage 210 and moves to next memory storage 210.Storage constitutes the kind of the memory storage 210 of VDEV220 in disk type hurdle C25.

Storage is applied to the kind of the queuing pattern of VDEV220 in queuing pattern hurdle C27.In queuing pattern hurdle C27, setting " 0 " under the situation of fifo mode, in queuing pattern hurdle C27, setting " 1 " under the situation of sequencing model.The setting value of response time Assured Mode hurdle C28 memory response time Assured Mode.The response time Assured Mode is meant that assurance converges on the pattern in the stipulated time with the response time of VDEV220.Under the situation of having stored " 1 ", expression response time Assured Mode is set.

Fig. 8 representes mode initialization table T30.Mode initialization table T30 is set by office terminal 30 through SVP160.Mode initialization table T30 is to memory control device 10 set overall queuing pattern and response time Assured Mode.Mode initialization table T30 possesses project hurdle C31 and setpoint column C32.Store queue pattern and response time Assured Mode in project hurdle C31.Whether storage representation sets the value of each pattern in setpoint column C32.

In addition, as long as the queuing pattern hurdle C27 of mode initialization table T30 and VDEV admin table T20 and a certain side among the response time Assured Mode hurdle C28 are set, do not need memory control device 10 to possess two sides' table T20, T30.

That is to say that the queuing pattern is that unit sets (C27), perhaps memory control device 10 integral body set (T30) with VDEV.The response time Assured Mode also is that unit sets (C28), perhaps memory control device 10 integral body set (T30) with VDEV.

In addition, also can be the structure that makes VDEV admin table T20 and the common existence of mode initialization table T30.As long as for example be made as following structure: the setting value of mode initialization table T30 is applied to all VDEV220, sets queuing pattern or response time Assured Mode individually to each VDEV220 afterwards.

Fig. 9 representes to be used for the table T40 of management operations.Task management table T40 also is called as operation control module (JCB).Task management table T40 management is by the state of interior caryogenic operation.

Task management table T40 for example manages JCB numbered bin C41, job state hurdle C42, WAIT hurdle finish time C43, startup banner C44, fault generation banner C45, inherited information hurdle C46 accordingly.

Storage is used to discern the numbering of the JCB that each operation is controlled in JCB numbered bin C41.Storage is by the state of the operation of JCB management in job state hurdle C42.

As job state, " RUN ", " WAIT ", " not using " are for example arranged." RUN " expression operation is in starting state.When DKA120 received the message from CHA110, the interior karyogenesis operation of DKA120 was to untapped JCB of this job assignment.The job state hurdle C42 that DKA120 will distribute to the JCB of operation does not change to " RUN " from " using ".The state of finishing dealing with of operation is waited in " WAIT " expression." do not use " and represent that its JCB does not distribute to operation.

The value that storage obtains processing latency (time-out time) and current time addition in WAIT hurdle finish time C43.Current time obtains from system timer.For example current time is " 0000 ", setting under " 1000 " situation as time-out time, WAIT be 1000 the finish time (=0000+1000).

Storage is used to judge whether restart the value of the sign of operation in starting banner C44.When the data input and output normal termination of memory storage 210 or abnormal ending, will start sign through Interrupt Process and be set at " 1 ".

Whether storage representation has produced the value of the sign of fault in memory storage 210 in fault generation banner C45.In memory storage 210, taken place under the situation of fault, in fault generation banner C45, set " 1 ".

In inherited information hurdle C46, store information required when restarting operation.As such information, VDEV numbering, slot numbering etc. have for example been enumerated.

When beginning, become " WAIT " from " RUN " through receiving the state that reads the operation that message generates from memory storage 210 reading of data.Kernel keep watch on termly in the operation that whether has " WAIT " state, set the operation of " 1 " or the operation that WAIT has surpassed current time the finish time to starting sign.

Set the operation of " 1 ", or passed through under the situation of operation of the WAIT finish time starting sign having found, the kernel of DKA120 restarts this operation.The state of the operation of being restarted is changed to " RUN " from " WAIT ".The operation of being restarted is handled with reference to inherited information.When operation was accomplished, its state changed to " not using " from " RUN ".

Action with reference to the flowchart text memory control device 10 of Figure 10-Figure 13.Each summary of handling of each flowcharting is different with actual calculation machine program sometimes.If so-called those skilled in the art, then can change or delete illustrated step a part, or append new step.

Figure 10 is the process flow diagram of being carried out by CHA110 that reads processing.CHA110 reads in the computer program that is stored in the regulation in the CHA110 through microprocessor and carries out and realize function shown in Figure 10.

CHA110 is when when main frame 20 receives reading order (S10), will be transformed to the combination (S11) of VDEV numbering and slot numbering by the logical address of this reading order appointment.

CHA110 judges whether to hit high-speed cache (S12).Sublevel section in the logic module scope of guaranteeing cache area corresponding with the reading object slot numbering and reading object is set under the situation of connection, is judged as and hits high-speed cache.

(S12: not), CHA110 sends to DKA120 and reads message (S13) under the situation of not hitting high-speed cache.This reads message and comprises beginning module numbering and object module number in VDEV numbering, slot numbering, the slot.

CHA110 sent to DKA120 read message after, wait for by the processing (treatment by stages) of DKA120 reading of data and accomplish (S14).CHA110 is when receiving (S15) when accomplishing report from DKA120, judge from the data of memory storage and read whether normal termination (S16).

Read in the data from memory storage under the situation of normal termination (S16: be), the data that CHA110 will be stored in the flash memory 130 send to main frame 20 (S17), and finish this processing.Read in data under the situation of failure that (S16: not), CHA110 is to main frame 20 notification errors (S18), and finishes this processing from memory storage.

Figure 11 is the process flow diagram of treatment by stages.Treatment by stages is meant from the memory storage reading of data and is sent to the processing of flash memory, carried out by DKA120.

DKA120 guarantees to be used to preserve the zone of data, and will be physical address (S21) through the address mapping of message appointment when the message that receives from CHA110 (S20) on flash memory.That is to say that the address mapping that DKA120 will read the destination is the combination of memory storage numbering, logical address and logic module number, thereby to memory storage 210 requests data reading (S22).

DKA120 sets time-out time (being TOV among the figure) to memory storage 210 requests data reading the time, change holding state (S23) into.DKA120 is set at time-out time with a certain side among the shortening value TOV2 of the typical values TOV1 of long time and relatively short time.In Figure 15, record and narrate the system of selection of time-out time after a while.

As Fig. 9 records and narrates, be used for becoming " WAIT " state from the operation of memory storage 210 reading of data.Having set under the situation of " 1 ", perhaps passed through under the situation of the WAIT finish time, restart operation and handle (S24) starting sign.

The DKA120 judgment data read normal termination or abnormal ending (S25).Transmitting under the data conditions to flash memory 130, be judged as normal termination from memory storage 210.Under the situation of normal termination, DKA120 is set at connection (S26) with the sublevel section, to the CHA110 report data read normal termination implication (S27).

Therewith relatively, read in the data from memory storage 210 under the situation of abnormal ending, DKA120 judges whether to have produced time-out error (S28).Time-out error is meant in the time-out time that sets the mistake can't be from memory storage 210 reading of data the time.

Under the situation that time-out error has taken place (S28: be), DKA120 sends reset command (S29) to memory storage 210.Through reset command, cancellation is to the data read request of memory storage 210.

DKA120 carries out set and reads processing (S30) after having cancelled data read request.In Figure 12, record and narrate set after a while in detail and read processing.Produced in memory storage 210 that (S28: not), DKA120 skips S29 and transfers to S30 under the situation of the fault except that time-out error.

Then, DKA120 judges that set is read and handles whether normal termination (S31).Read under the situation of handling normal termination (S31: be) in set, DKA120 reads the implication (S27) of request normal termination to the CHA110 report.Read in set and to handle that (S31: not), DKA120 reads processing of request abnormal ending (S32) to the CHA110 report under the situation do not have normal termination.

Figure 12 is that the process flow diagram of processing is read in the set that is expressed as S30 among Figure 11.The RAID grade (S40) of VDEV220 under the memory storage 210 of DKA120 judgement reading object.In the present embodiment, as an example, which among RAID1 and RAID5 or the RAID6 judgement be.

In the RAID grade is under the situation of RAID5 or RAID6, the numbering (S41) of each slot of other that DKA120 confirms to be associated with wrong slot.The mistake slot be meant can't reading of data slot, be the slot that has produced some fault.Each slot of other that is associated with wrong slot is meant other the slot that is included in the strip row identical with wrong slot.

DKA120 has guaranteed to be used in flash memory 130 to preserve after the zone of the data of obtaining from other each slot, sends the request of reading (S42) to having other each memory storage 210 of each slot of in S41, confirming.And the time-out time when DKA120 will be from each memory storage 210 reading of data is set at typical values (S43).In the present embodiment, in order to obtain the required data of data in the restore errors slot more reliably, and time-out time is set at typical values.

On the other hand, be under the situation of RAID1 in the RAID grade, DKA120 is to forming right memory storage 210 and send the request of reading (S44) with wrong memory storage 210 has taken place, and transfers to S43.

With read the request relevant operation become the WAIT state.Be set, perhaps during the finish time, restart operation (S45) when starting sign through WAIT.The DKA120 judgment data read whether normal termination (S46).Do not having under the situation of normal termination, DKA120 makes this processing abnormal ending.

Under the situation that reads normal termination of data, DKA120 judges RAID grade (S47).Under the situation that is RAID5 or RAID6, DKA120 comes restore data according to the data and the PB that read out from each memory storage 210, and the data storage that is resumed is arrived the cache area (S48) corresponding with wrong slot.DKA120 is set at connection (S49) with the sublevel section relevant with its slot.Under the situation of RAID1, DKA120 skips S48 and transfers to S49.

Figure 13 is the process flow diagram that error count is handled.This processing is carried out by DKA120.DKA120 keeps watch on whether wrong (fault) has taken place (S60) in memory storage 210.(S60: be) under the wrong situation taking place, and DKA120 judges whether to be time-out error (S61).

The mistake that in memory storage 210, takes place is (S61: be) under the situation of time-out error, and DKA120 records this time-out error among the overtime fault hurdle C53 of error count admin table T50 shown in Figure 14 (S62).

The mistake that in memory storage 210, takes place is that (S61: not), DKA120 is with this error logging (S63) in the HDD fault hurdle C52 of error count admin table T50 under the situation of the memory storage mistake beyond the time-out error.

With reference to Figure 14 error count admin table T50 is described.The quantity of the mistake that error count admin table T50 management takes place in memory storage 210 and the threshold value that is used to carry out the recovery processing.Mismanage table T50 is stored in the shared storage 140, and DKA120 can copy to its part in the local storage and use.

Error count admin table T50 for example manages HDD numbered bin C51, HDD fault hurdle C52 and overtime fault hurdle C53 accordingly.HDD numbered bin C51 storage is used to discern the information of each memory storage 210.

The common fault that HDD fault hurdle C52 management produces in memory storage 210.HDD fault hurdle C52 possesses error count hurdle C520, is used to begin the threshold value hurdle C521 that duplicates to subsequent use memory storage and is used to begin to gather the threshold value hurdle C522 that duplicates.

Error count hurdle C520 stores the number of times of the common fault that in memory storage, produces.Threshold value hurdle C521 storage is used to begin with data from having produced the threshold value TH1a of " subsequent use (Sparing) handles " that wrong memory storage copies to the memory storage of preparation.Other threshold value hurdle C522 storage is used to begin the threshold value TH1b of set replication.

Overtime fault hurdle C53 manages the time-out error that in memory storage 210, produces, and possesses error count C530, is used to begin the threshold value hurdle C531 of subsequent use processing and is used to begin to gather the threshold value hurdle C532 that duplicates.

That is to say that the frequency of the frequency of common fault (error count value) and time-out error separates respectively to be managed.And, be used for carrying out and also set dividually respectively in common fault and time-out error as the subsequent use processing that recovers to handle and the threshold value of set replication.And in the present embodiment, the threshold value TH1b relevant with time-out error, TH2b are configured to greater than the threshold value TH1a relevant with common fault, TH2a (for example TH1b=TH1a * 2, TH2b=TH2a * 2).

Thereby, in the present embodiment,,, also can reduce the chance of the recovery processing of carrying out as subsequent use processing or process of aggregation even time-out error frequently takes place as being set at short result from the time-out time under the situation of memory storage 210 reading of data.In the present embodiment, through suppressing to recover the startup of processing, prevent that the load of memory control device 10 from increasing.

Figure 15 is illustrated in the system of selection of the time-out time of setting under the situation of memory storage 210 reading of data.As stated, in the present embodiment, a plurality of time-out time TOV1, TOV2 have been prepared.The first time-out time TOV1 for example is set to the long time about the several seconds, also is called as typical values.The second time-out time TOV2 for example is set to the time relatively shorter below one second, also is called as the shortening value.Under the situation that satisfies rated condition as follows, DKA120 can be set at short value TOV2 with time-out time.

(rated condition 1)

The response time Assured Mode hurdle C28 of VDEV admin table T20 shown in Figure 7 has been set the situation of " 1 ".That is to say, under the situation of the pattern of having selected to respond at the appointed time, select the shortening value as time-out time.

(rated condition 2)

The response time Assured Mode of mode initialization table T30 shown in Figure 8 has been set the situation of " 1 ".Identical with rated condition 1.But, in rated condition 1, can be that unit sets the response time Assured Mode with VDEV, in rated condition 2, can set the response time Assured Mode to whole memory control device 10.

(rated condition 3)

The memory storage 210 of reading object is not the situation of the memory storage of the low speed as SATA.Be (situation that response performance is lower) under the situation of low speed at the memory storage of reading object,, might do not produce time-out error though then break down if shorten time-out time.

(rated condition 4)

In any of the queuing pattern hurdle C27 of VDEV admin table T20 and mode initialization table to the queuing mode initialization under the situation of " 1 " (queuing pattern=fifo mode).Under the situation of FIFO, by sending the sequential processes formation, the situation of very long time is waited in the processing of formation therefore can the occurrence logic address not far away by delay.Therewith relatively, under the situation of sequencing model, the formation in independent place is wait as long for possibly, if therefore shorten time-out time, though the possibility that produces time-out error that then do not break down uprises.

(rated condition 5)

The load condition of the memory storage 210 of reading object is the situation below the setting.Load at memory storage 210 is that reading of data needs the time under the situation more than the setting, might not produce time-out error though break down.Thereby, at memory storage 210 be not under the situation of higher load condition time-out time is set at shorter.

In the present embodiment that constitutes like this; DKA120 is satisfying under the situation of defined terms, sets short time-out time TOV2 to the request of reading that sends to memory storage 210, under the situation that has produced time-out error; The request of will reading resets, and carries out set and reads processing.

Thereby, even the response performance of the memory storage of reading object 210 has descended, when having passed through time-out time, also can gather and read processing.The response performance that therefore can prevent memory control device 10 descends.

In the present embodiment; For example be the situation of FIFO, be not that situation, the memory storage of the memory storage of low speed is not under the situation of high load capacity that the time-out time in the time of will be from memory storage 210 reading of data is set at the value shorter than general case in the situation of having set the response time Assured Mode, queuing pattern.Thereby, in the present embodiment, can prevent that the response performance of memory control device 10 from descending according to situation.

In the present embodiment, manage time-out error dividually with the fault of common memory storage.Thereby, even time-out time is set at than the general case weak point, also can suppresses recoveries processing such as subsequent use processing or set replication and be performed.Therefore, thus the load that can prevent the memory control device 10 owing to carry out to recover handle increases response performance to descend.

Embodiment 2

With reference to Figure 16 second embodiment is described.Each the following embodiment that comprises present embodiment is equivalent to the variation of first embodiment.Therefore be that the center is recorded and narrated with difference with first embodiment.In the present embodiment, the load condition with queuing pattern and memory storage 210 correspondingly is set at time-out time shorter.Present embodiment is recorded and narrated the application examples of (rated condition 5) in first embodiment.

Figure 16 is the table T70 that storage is used to set the threshold value of time-out time.The threshold value hurdle C74 of threshold value table T70 during for example with HDD numbered bin C71, threshold value hurdle C73 and sequencing model when queued command is counted hurdle C72, fifo mode manages accordingly.

Storage is used to discern the information of each memory storage 210 in HDD numbered bin C71.Counting among the hurdle C72 storage in queued command is the untreated command number of object with memory storage 210.Store the threshold value TH3 when the queuing pattern is set to fifo mode among the threshold value hurdle C73 when fifo mode.Store the threshold value TH4 of queuing pattern when being set to sequencing model among the threshold value hurdle C74 when sequencing model.

Reached under the situation of threshold value TH3 that the queuing pattern is made decision or TH4 in the quantity that with memory storage 210 is the untreated order of object, this memory storage 210 has been set to common value as the time-out time of the request of reading of reading object.

The value of threshold value TH4 when the threshold value TH3 during fifo mode is set to greater than sequencing model (for example TH3=TH4 * 4).Be set in the queuing pattern under the situation of fifo mode, owing to do not produce the order of handling by too postponing, the TH4 when therefore being set at threshold value TH3 greater than ordering.In the queuing pattern is under the situation of sequencing model, and foundation is made as the logical address of the object of order, might handle to be postponed the TH3 when therefore being set at threshold value TH4 less than fifo mode.

In memory storage 210, be detained under the situation of a lot of untreated orders, might have irrespectively produced time-out error with fault.According to the difference of the method that untreated order is handled, the possibility that produces time-out error changes.

Therefore, in the present embodiment,, set time-out time according to untreated command number and queuing pattern.Thus, can suppress to produce and the irrelevant time-out error of fault.Present embodiment also plays the effect identical with first embodiment.

Embodiment 3

With reference to Figure 17 the 3rd embodiment is described.Time-out time when in the present embodiment, set being read is set at short value.Figure 17 is that the process flow diagram of processing is read in set.This processing possesses step S40-S42, the S44-S49 identical with processing shown in Figure 12.This processing is S43A with the difference of Figure 12.That is to say, read in the processing, time-out time is set at the value shorter than general case comes from each memory storage 210 reading of data and PB in the set of present embodiment.

The present embodiment that constitutes so also plays the effect identical with first embodiment.And, in the present embodiment,, can prevent further that therefore the response performance of memory control device 10 from descending because that the time-out time when set read is set at is shorter.

Embodiment 4

With reference to Figure 18-Figure 21 the 4th embodiment is described.In the present embodiment, read under the situation of handling failure, require memory storage 210 reading of data again from initial reading object in set.

Figure 18 is the condition management table T80 that is used to manage the progress situation of treatment by stages.Condition management table T80 for example possesses bullets hurdle C81, content bar C82 and value hurdle C83.In content bar C81, illustrated from memory storage 210 reading of data and be sent to each stage of the treatment by stages of flash memory 130.When treatment by stages arrives each stage, in value hurdle C83, set " 1 ".One of each stage of treatment by stages for example descends.

(stage 1)

In the phase one, time-out time is set at shortening value TOV2, to memory storage 210 requests data reading.

(stage 2)

In subordinate phase, about the initial request of reading time-out error takes place.

(stage 3)

In the phase III, attempt set and read the processing failure.

(stage 4)

In stage, time-out time is set at typical values TOV1, to the memory storage 210 request reading of data second time of reading object.

Figure 19 and Figure 20 are the process flow diagrams of treatment by stages.The treatment by stages that this processing is corresponding shown in Figure 11.This processing is S70-S76 with the difference of processing shown in Figure 11.

Shown in figure 19, DKA120 is when receiving (S20) when reading message from CHA110, and the value hurdle C83 of condition management table T80 is carried out initialization (S83).DKA120 sends the request of reading (S22) to memory storage 210 after having carried out address mapping etc. (S21).

DKA120 is set at the value TOV2 (S71) shorter than general case with this time-out time that reads request.In addition, will be from same memory storage 210 once more under the situation of reading of data, time-out time be set to typical values TOV1 (S71).

DKA120 is being set at time-out time under the situation of shortening value TOV2, and the value in stage 1 of condition management table is set at " 1 " (S72).Thus, start-of-record carries out the initial content that reads in table T80.

Transfer to Figure 20.When for the first time from the overtime and failure of memory storage 210 reading of data (S28: be), DKA120 sends reset command and cancels the request of reading (S29).DKA120 is set at " 1 " (S73) with the value in the stage 2 of condition management table T80.Thus, read being recorded among the condition management table T80 of the relevant time-out error of request with primary.

DKA120 judges with reference to condition management table T80 whether treatment by stages has arrived the phase III (S74).At this, do not read processing owing to also begin set, therefore be judged as the no show phase III (S74: not).Therefore, DKA120 carries out set and reads processing (S75).

Read under the situation of handling normal termination (S31: be) in set, DKA120 to the normal termination of CHA110 notice read the implication (S27) of request.Read (S31: deny) under the situation of handling not normal termination in set, DKA120 judges with reference to condition management table T80 whether the progress situation of treatment by stages has arrived subordinate phase (S76).

At this, in the S73 of the S72 of Figure 19 and Figure 20, phase one and the subordinate phase of condition management table T80 have been set " 1 " respectively.Thereby DKA120 is judged as and has arrived subordinate phase (S76: be), and turns back to the S22 of Figure 19.DKA120 sends the request of reading (S22) to the memory storage 210 of reading object once more.At this moment, DKA120 is with being set at typical values TOV1 (S71) with secondary relevant timeout value of request that reads.Because be to read request for the second time, timeout value is not shortened, therefore skip S72.

Can be in time-out time according to secondary request of reading from memory storage 210 normally under the situation of reading of data, DKA120 is set at connection (S26) with the sublevel section, to CHA110 report normal termination (S27).

Also fail and taken place under the situation of time-out error (S28: be) in secondary request of reading, DKA120 is with secondary request of reading reset (S29).In addition, because the subordinate phase of condition management table T80 has been set " 1 ", therefore in S73, do not set " 1 " once more and transfer to S73.

DKA120 judges whether to have arrived the phase III (S74) with reference to condition management table T80.At this, read processing failure (S74: be) owing to attempt set, DKA120 reads the implication (S32) of processing of request failure to the CHA110 notice.That is to say, under the situation that secondary request of reading is failed, do not carry out secondary set and read processing and finish this processing.

Figure 21 is that the process flow diagram of processing is read in set.This processing is compared with processing shown in Figure 12, and difference is S80 and S81.DKA120 is set at the time-out time (S80) of set when reading with typical values.Read under the situation of handling abnormal ending in set, DKA120 sets " 1 " to the phase III of condition management table T8, and set of records ends reads the content (S81) of failure.

The present embodiment that constitutes so also plays the effect identical with first embodiment.And, in the present embodiment, read in set under the situation of failure, in common time-out time, attempt once more from memory storage 210 reading of data.Thereby, can improve from the possibility of memory storage 210 reading of data, and can improve the reliability of memory control device 10.

Embodiment 5

With reference to Figure 22 and Figure 23 the 5th embodiment is described.In the present embodiment, according to the state of each memory storage 210 of the object that reads as set, the execution of processing is read in the control set.

Figure 22 is the process flow diagram of treatment by stages.The processing of Figure 22 is compared difference with the processing of Figure 11 and is S90 and S91.Under the situation that has produced time-out error (S28: be), DKA120 judges with reference to response time admin table T90 (S90) whether the response time of all memory storages 210 of the object that reads as set grows (S91) than reference value.

Under long situation of the response time of each memory storage 210 of set reading object (S91: be), DKA120 does not carry out set and reads processing, reads the implication (S32) of request failure to the CHA110 notice.

In the response time of each memory storage 210 of gathering reading object is not that (S91: not), the DKA120 request of will reading resets (S29), carries out set and reads processing (S30) under the situation more than the reference value.

In addition; Be not limited to gather the situation of response time delay of all memory storages 210 of reading object; Also can be following structure: the response time of pen recorder 210 more than the stated number in all memory storages 210 of set reading object is under the situation more than the reference value, or the response time of the more than one memory storage 210 in all memory storages 210 of set reading object be under the situation more than the reference value, do not gather and read processing.

Figure 23 representes table T90 that the response time of each memory storage 210 is managed.Response time admin table T90 for example manages VDEV numbered bin C91, HDD numbered bin C92, response time hurdle C93 and judgement hurdle C94 accordingly.

The up-to-date response time of each memory storage 210 of record in response time hurdle C93.Record compares the result who obtains with the response time and the specified reference value of each memory storage 210 in judging hurdle C94.In the response time is to be recorded as " delay " under the situation more than the reference value, under the situation of not enough reference value of response time, is recorded as " normally ".

Through using response time admin table T90, can judge whether to accomplish at short notice set and read.In addition, also can be direct managing response time and manage untreated command number about each memory storage.And, also can be to read according to estimations such as the type set of untreated command number and memory storage 210 to handle the needed time.

Embodiment 6

With reference to Figure 24-Figure 26 the 6th embodiment is described.In the present embodiment, read the situation of handling failure, switch to the memory control device 10 (2) of standby system to the user notification set.

Figure 24 is the system construction drawing of present embodiment.In the present embodiment, possess the memory control device 10 (1) of current use system and the memory control device 10 (2) of standby system.Under general case, the user uses the memory control device 10 (1) of current use system.

Figure 25 and Figure 26 are the process flow diagrams of treatment by stages.The process flow diagram of Figure 25 is compared difference with the process flow diagram of Figure 19 and is not comprise connector 2.The process flow diagram of Figure 26 is compared difference and is to gather and reads the processing of handling after the failure with the process flow diagram of Figure 20.

In the present embodiment, read under the situation of handling failure (S31: not, S76: be) in set, to user notification and finish this processing (S100).This notice is given the user through office terminal 30 by notice.The user can determine to send the request of reading once more, or switch to standby system memory control device 10 (2) from current use system memory control device 10 (1) to current use system memory control device 10 (1) from main frame 20.The present embodiment that constitutes so also plays the effect identical with first embodiment.

In addition, the present invention is not limited to the above embodiments.If those skilled in the art, for example can above-mentioned each embodiment of appropriate combination wait, carry out within the scope of the invention variously to append, change etc.

The explanation of Reference numeral

1 memory control device, 2 main frames, 3 controllers, 4 memory storages, 5 channel adapters (CHA), 6 storeies, 7 disk adapters (DKA), 10 memory control devices, 20 main frames, 30 office terminals, 100 controllers, 110CHA, 120DKA, 130 flash memories, 140 shared storages, 210 memory storages, 220 parity group (VDEV), 230 logical volumes (LDEV).

Claims

1. memory control device, it carries out input and output in response to the request from epigyny device to data, and this memory control device possesses:

A plurality of memory storages, these a plurality of memory storages are stored data; And

Controller, it is connected with above-mentioned epigyny device and above-mentioned each memory storage, and in response to the request from above-mentioned epigyny device, the memory storage that data are stipulated in above-mentioned each memory storage carries out input and output,

Wherein, Above-mentioned controller is when when above-mentioned epigyny device receives access request; Under the situation of regulation, time-out time is set at second value shorter than first value, and the specified data corresponding with above-mentioned access request read in the memory storage request of the afore mentioned rules in above-mentioned each memory storage

In the above-mentioned time-out time that sets, can't obtain under the data conditions, detect time-out error be to take place from the memory storage of afore mentioned rules,

First management department is used to manage the fault that in above-mentioned each memory storage, takes place, detecting under the situation of above-mentioned time-out error, by second management department that is different from this first management department to the managing of above-mentioned time-out error, and

Read the data with corresponding other of the data of afore mentioned rules to other the memory storage request that is associated with the memory storage of afore mentioned rules,

According to above-mentioned other the data of obtaining from above-mentioned other memory storage, generate the data of afore mentioned rules, and with the data transmission of the afore mentioned rules that is generated to above-mentioned epigyny device.

2. memory control device according to claim 1 is characterized in that,

Above-mentioned controller possesses: first communication control unit, and it is used for communicating with above-mentioned epigyny device; The second communication control part, it is used for communicating with above-mentioned each memory storage; And storer, it is used by above-mentioned first communication control unit and above-mentioned second communication control part,

In above-mentioned storer, store time-out time and set the information of using, this time-out time sets to be used for judging which value that time-out time is set at above-mentioned first value and above-mentioned second value with information,

Above-mentioned time-out time is set and is used information, comprises the quantity that above-mentioned each memory storage is made as the formation of object; FIFO when the queuing pattern is set to the FIFO pattern is used threshold value; And the queuing pattern is set to according to logical address and uses threshold value less than above-mentioned FIFO with the ordering of threshold value from closely to sequencing model that order far away sorts the time,

When above-mentioned first communication control unit receives the access request from above-mentioned epigyny device,

Above-mentioned second communication control part is set the information of using according to above-mentioned time-out time,

The memory storage with afore mentioned rules be made as object above-mentioned formation quantity for the pairing above-mentioned FIFO of queuing pattern that the memory storage of afore mentioned rules is set with threshold value and above-mentioned ordering with any situation more than the value in the threshold value under; Time-out time when selecting above-mentioned first value to read the data of afore mentioned rules as memory storage from afore mentioned rules

The memory storage with afore mentioned rules be made as object above-mentioned formation quantity less than the pairing above-mentioned FIFO of queuing pattern that the memory storage of afore mentioned rules is set with threshold value and the situation of above-mentioned ordering with any value in the threshold value under; Time-out time when selection is read the data of afore mentioned rules less than above-mentioned second value of above-mentioned first value as the memory storage from afore mentioned rules

Above-mentioned second communication control part reads the data of afore mentioned rules to the memory storage request of afore mentioned rules,

Above-mentioned second communication control part can't obtain under the data conditions of afore mentioned rules from the memory storage of afore mentioned rules in the above-mentioned time-out time that sets, and detects the generation of above-mentioned time-out error,

Above-mentioned second communication control part is detecting under the situation of above-mentioned time-out error, makes second management department that is different from first management department that is used to manage the fault that in above-mentioned each memory storage, takes place to the managing of above-mentioned time-out error,

Be used to make the recovery of the regulation relevant to handle the value of the recovery of beginning, be set to above-mentioned second management department greater than above-mentioned first management department with threshold value with the memory storage that fault has taken place,

Above-mentioned second communication control part is set selecteed other the time-out time of above-mentioned first value, comes to read the data with corresponding other of the data of afore mentioned rules to other the memory storage request that is associated with the memory storage of afore mentioned rules,

Generate the data of afore mentioned rules according to above-mentioned other the data of obtaining from above-mentioned other memory storage, with the data delivery of the afore mentioned rules that is generated to above-mentioned epigyny device,

Above-mentioned second communication control part in above-mentioned other time-out time can't from above-mentioned other memory storage obtain above-mentioned other data and selected under the situation of above-mentioned second value as above-mentioned time-out time; Above-mentioned time-out time is changed to above-mentioned first value, and read the data of afore mentioned rules to the memory storage request of afore mentioned rules once more.

3. memory control device according to claim 1 is characterized in that,

The quantity of the fault that above-mentioned first management department will take place in above-mentioned each memory storage is handled the recovery that begins with the recovery that is used to make the regulation relevant with the memory storage that fault has taken place and is managed accordingly with threshold value,

The quantity of the time-out error that above-mentioned second management department will take place in above-mentioned each memory storage is handled other recovery that begins with the recovery that is used to make the afore mentioned rules relevant with the memory storage that time-out error has taken place and is managed accordingly with threshold value,

Above-mentioned other recovery of being managed by above-mentioned second management department is configured to use threshold value greater than the above-mentioned recovery of being managed by above-mentioned first management department with threshold value.

4. memory control device according to claim 1 is characterized in that,

Above-mentioned controller is under the situation of the memory storage of afore mentioned rules having been set the Assured Mode that is used to guarantee the response in the stipulated time, and the time-out time in the time of will reading the data of afore mentioned rules from the memory storage of afore mentioned rules is set at above-mentioned second value.

5. memory control device according to claim 1 is characterized in that,

Above-mentioned controller is being under the situation of FIFO pattern with the queuing mode initialization relevant with the memory storage of afore mentioned rules, and the time-out time in the time of will reading the data of afore mentioned rules from the memory storage of afore mentioned rules is set at above-mentioned second value.

6. memory control device according to claim 1 is characterized in that,

Be under the situation of the memory storage beyond the memory storage of preassigned low speed at the memory storage of afore mentioned rules, the time-out time when above-mentioned controller will read the data of afore mentioned rules from the memory storage of afore mentioned rules is set at above-mentioned second value.

7. memory control device according to claim 1 is characterized in that,

Be made as at the memory storage with afore mentioned rules under the situation of threshold value of quantity less than regulation of formation of object, the time-out time when above-mentioned controller will read the data of afore mentioned rules from the memory storage of afore mentioned rules is set at above-mentioned second value.

8. memory control device according to claim 1 is characterized in that,

Above-mentioned controller possesses time-out time and sets the information of using; It is to be used for judging that which the time-out time setting that time-out time is set at above-mentioned first value and above-mentioned second value uses information that this time-out time is set with information; And comprise with above-mentioned each memory storage be made as the quantity of the formation of object, FIFO when the queuing pattern is set to the FIFO pattern is set to according to logical address with threshold value and queuing pattern and uses threshold value less than above-mentioned FIFO with the ordering of threshold value from closely to sequencing model that order far away sorts the time, and

Above-mentioned controller the memory storage with afore mentioned rules be made as object above-mentioned formation quantity for the above-mentioned FIFO corresponding with the queuing pattern that the memory storage of afore mentioned rules is set with threshold value and above-mentioned ordering with any situation more than the value in the threshold value under; Time-out time when selecting above-mentioned first value to read the data of afore mentioned rules as memory storage from afore mentioned rules

The memory storage with afore mentioned rules be made as object above-mentioned formation quantity less than the above-mentioned FIFO corresponding with the queuing pattern that the memory storage of afore mentioned rules is set with threshold value and the situation of above-mentioned ordering with any value in the threshold value under, selection is less than above-mentioned second value conduct of above-mentioned first value time-out time when the memory storage of afore mentioned rules reads the data of afore mentioned rules.

9. memory control device according to claim 1 is characterized in that,

Above-mentioned controller is detecting under the situation of above-mentioned time-out error; Set selecteed other the time-out time of above-mentioned first value, come to read the data with corresponding other of the data of afore mentioned rules to other the memory storage request that is associated with the memory storage of afore mentioned rules.

10. memory control device according to claim 1 is characterized in that,

Above-mentioned controller is detecting under the situation of above-mentioned time-out error; Set selecteed other the time-out time of above-mentioned second value, come to read the data with corresponding other of the data of afore mentioned rules to other the memory storage request that is associated with the memory storage of afore mentioned rules.

11. memory control device according to claim 10 is characterized in that,

Above-mentioned controller can't obtain under above-mentioned other the data conditions from above-mentioned other memory storage in above-mentioned other time-out time; Above-mentioned time-out time is changed to above-mentioned first value, read the data of afore mentioned rules once more to the memory storage request of afore mentioned rules.

12. memory control device according to claim 10 is characterized in that,

Above-mentioned controller can't obtain under above-mentioned other the data conditions, to this situation of user notification from above-mentioned other memory storage in above-mentioned other time-out time.

13. the control method of a memory control device, it is to controlling with the memory control device that a plurality of memory storages are connected with epigyny device, in the method,

When above-mentioned epigyny device receives access request, under the situation of regulation, time-out time is set at second value of lacking than first value, and the memory storage request of the afore mentioned rules in above-mentioned each memory storage reads the specified data corresponding with above-mentioned access request,

First management department is used to manage the fault that in above-mentioned each memory storage, takes place, detecting under the situation of above-mentioned time-out error, by second management department that is different from above-mentioned first management department to the managing of above-mentioned time-out error, and