CN102740083A - Intelligent digital micro-mirror driving time sequence configuration method and device - Google Patents
Intelligent digital micro-mirror driving time sequence configuration method and device Download PDFInfo
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- CN102740083A CN102740083A CN2012101917574A CN201210191757A CN102740083A CN 102740083 A CN102740083 A CN 102740083A CN 2012101917574 A CN2012101917574 A CN 2012101917574A CN 201210191757 A CN201210191757 A CN 201210191757A CN 102740083 A CN102740083 A CN 102740083A
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Abstract
The invention discloses an intelligent digital micro-mirror driving time sequence configuration method and device. The device comprises a PC (Personal Computer) machine, a digital micro-mirror driving plate and a digital micro-mirror device DMD (Digital Micro-Mirror Device), wherein the digital micro-mirror driving plate is connected with the PC machine and the digital micro-mirror device DMD respectively; the digital micro-mirror driving plate comprises an ARM microcontroller, an FPGA (Field Programmable Gate Array) and a color wheel; the ARM microcontroller is connected with the FPGA and the color wheel, respectively; the FPGA is connected with the color wheel and the digital micro-mirror device DMD, wherein the FPGA is internally provided with a driving circuit; the driving circuit comprises an SPI (Serial Peripheral Interface) interface module, a driving sequence table storage and a general state machine; the SPI interface module is connected with the driving time sequence table storage; and the general state machine is connected with the driving time sequence table storage, and is capable of reading the content in the driving sequence table storage and then generating a corresponding driving time sequence. With the adoption of the intelligent digital micro-mirror driving time sequence configuration method and device, the problem that the digital micro-mirror device has high difficulty in the driving of time sequence can be solved; the DMD driving time sequence can be flexibly configured; the DMD driving time sequence is convenient and flexible to be modified; and the development efficiency of the DMD driving is greatly improved.
Description
Technical field
The present invention relates to be used for the micro mirror element DMD drive development field of display image, is that a kind of micro mirror of intelligence drives sequential collocation method and device.
Background technology
Among the present topmost shadow casting technique, advantage such as DLP (digital light processing) optical projection system has little, the compact conformation of volume, and is in light weight.Simultaneously, its images displayed rich color, brightness are high, contrast is high, definition good, and this makes based on optical projection system competitiveness of DLP technology stronger.
Began invention as the DMD DMD of DLP core component in 1977 by Larry doctor Hornbeck of American TI Company, be born at first DMD in 1987.In ensuing 10 years, the performance of digital micro-mirror is always constantly by perfect, and up to 1996, DMD began commercialization with the form of DLP technology.2002, nearly 1,500,000 cover DLP systems got into the projection markets, and the DLP optical projection system becomes by well accepted reflecting light modulation technique since then.DMD DMD is mainly used in the optical projection system at present, but TI company was devoted to excavate and enlarge its range of application always in recent years, such as stereo display, offset printing, little demonstration and wide spectrum of use etc.
DMD produces image with the method for light modulation.An one chip DLP consists of the following components: (1) mainboard that has DMD is used to handle vision signal and drives DMD; (2) colour wheel and high-pressure mercury lamp are formed the light source of optical projection system; (3) light path system is used to guide light.On DMD DMD, have thousands of structures consistent can be reflective micro mirror, each micro mirror has only " opening " and " pass " two states.The micro mirror drive circuit can be controlled the on off state that DMD goes up each micro mirror accurately.
After the DLP optical projection system was started working, colour wheel began uniform rotation, and high-pressure mercury lamp sends high-intensity white light, and was radiated on the colour wheel of high speed rotating.Colour wheel is special parts; It one week the section of being divided into; Each section only allows that a kind of light of color passes through in the three primary colors, thus during the colour wheel uniform rotation, the light that sees through colour wheel according to the changing of look section order rule (such as: R-G-B-R-G-B).The light that sees through colour wheel guides through light path system and is radiated on the DMD; Those micro mirrors that are controlled as " opening " will reflect away light and be incident upon on the projection screen; And that the micro mirror that is controlled as " pass " shows on screen is black, image has so just been arranged, because the colour wheel of high speed rotating has not homochromy section; Human eye can not differentiated these, and what on screen, see is the synthetic coloured images of three primary colors.
The light intensity control of micro mirror reflection realizes through the binary pulse width modulated technology.Video processing circuits receives after the vision signal form (being the bit-planes that the same bits position of all pixels in the piece image is formed) that the data transaction of each color component is become bit-plane; Each bit all has weight; The time span that on behalf of this bit-plane, weight show; The lowest bit face shows that the time is the shortest, and higher bit face shows that the time is the longest.The demonstration time in that a two field picture will be fixed in the time is distributed to each bit-plane according to weight proportion, lets these bit-planes show successively.Numeral in the bit-plane " 1 " expression places micro mirror " opening " state, digital " 0 " to represent micro mirror placed " pass " state.Control constantly is opened and closed through bit-plane with a micro mirror, and after all bit-planes all showed, the human visual system got up the time integral that micro mirror is in out state, and the final light intensity that forms is directly proportional with the pixel value at this pixel place.
Though DMD has a lot of application advantages, development difficulty is bigger, and this is mainly reflected in the generation aspect of sequential.Each last micro mirror of DMD is represented a pixel, and the micro mirror on the entire device has been formed two-dimentional pel array (like the 1024*768 specification).DMD drives by bit-plane, and the basic operation of DMD is had: (1) is written into, and writes the bit-plane data to DMD, but does not show at once, is just preserved by DMD; (2) reset, the bit-plane data that write are shown; (3) empty, micro mirror is placed " pass " state.These operations can also can be pressed block operations to the part to all micro mirror global operations of device.Wherein consuming time many be to be written into operation, carry out reset operation in the moment that needs show after being written into data, so the demonstration time of bit-plane begins to calculate after resetting.Let the correct display image of DMD, need the time and the pairing bit-plane of accurate these operations of control.These operate in temporal arrangement and have just formed the bit-plane sequence.The simplest bit-plane sequence lets each bit-plane show from high to low by weight order exactly, and all uses global operation, but this is not optimal sequence.For the display effect of improving image or reasonable use data bandwidth more, people have proposed various driven algorithm.Final these algorithms of discovery can be summarized as the bit-plane sequence.But whenever change the bit-plane sequence one time, design driven sequential again, this is a complicacy and the low work of flexibility.
Summary of the invention
A kind of intelligent digital micro mirror that the objective of the invention is to be directed against the deficiency of prior art and provide drives sequential collocation method and device; This device can drive sequential to DMD and dispose flexibly; It is convenient and flexible that the modification that makes DMD drive sequential becomes, and improved the development efficiency that DMD drives greatly.
The concrete technical scheme that realizes the object of the invention is:
A kind of intelligent digital micro mirror drives the sequential collocation method; This method is: the sequential of representing to drive digital micro-mirror with the drive sequences table; And let the micro mirror drive circuit can resolve this drive sequences table, the digital micro-mirror that produces expectation drives sequential, specifically may further comprise the steps:
A, the grey scale accuracy that can realize with respect to phase difference and each look section of colour wheel feedback signal according to the angle of each look section of colour wheel, initial look section are put out the bit-plane operating process in a colour wheel cycle in order; Whole process is represented with the drive sequences table; These sequence table bit wide 32 bits; Indefinite length, its 32 Bit Allocation in Discrete are given different territories: the operation name comprises and is written into, resets and empty; With respect to the operating time in the initial initial moment of look section; The bit-plane numbering; The look segment number;
B, a memory space is set in the digital micro-mirror drive circuit drive sequences table is set; Digital micro-mirror drive circuit receiving video signals is an area dividing according to bit-plane, is buffered in the dynamic memory; Adopt universal state machine controlling and driving sequential, state machine reads and carries out the drive sequences table one by one, and the digital micro-mirror that produces expectation drives sequential.
A kind of intelligent digital micro mirror drives the sequential inking device; This device comprises PC, digital micro-mirror drive plate, DMD DMD and light source; The digital micro-mirror drive plate connects PC and DMD DMD respectively, and light source irradiation is on DMD DMD; Said digital micro-mirror drive plate comprises ARM microcontroller, FPGA and colour wheel, and the ARM microcontroller connects FPGA and colour wheel respectively, and FPGA connects colour wheel and DMD DMD; Wherein: be provided with drive circuit among the FPGA; This circuit comprises SPI interface module, drive sequences table memory and universal state machine; The SPI interface module connects driving time-scale memory; Universal state machine connects driving time-scale memory, and universal state machine reads the content in the drive sequences table memory, produces corresponding driving sequential.
The FPGA that uses among the present invention (field programmable gate array) is a kind of digital device, utilizes FPGA to be carrier, can realize the digital circuit of various designs.
The invention solves and realize that DMD drives the big problem of sequential difficulty, it can drive sequential to DMD and dispose flexibly, and it is convenient and flexible that the modification that makes DMD drive sequential becomes, and has improved the development efficiency that DMD drives greatly.
Description of drawings
Fig. 1 is apparatus of the present invention structural representation;
Fig. 2 is a digital micro-mirror drive plate structured flowchart in apparatus of the present invention;
Fig. 3 is apparatus of the present invention colour wheel structural representation;
Fig. 4 is a kind of driving sequential corresponding with Fig. 3 colour wheel;
Fig. 5 and Fig. 6 are the Application Program Interfaces that is used for configuration parameter on the PC.
Embodiment
Consult Fig. 1, operation is used for the application program of configuration parameter on PC, and the ARM of micro mirror drive plate is connected the reception parameter through USB with application program on the PC; ARM drives colour wheel uniform rotation (as 60 revolutions per seconds) in the digital micro-mirror drive plate; And will pass to the drive circuit in the FPGA from the parameter that the PC application program receives; Drive circuit receives time sequence parameter; And convert vision signal to bit-plane and store in the dynamic memory in order to calling, for driving and the colour wheel that makes DMD DMD keeps synchronous, drive circuit also will receive the feedback signal of colour wheel.
The UHP lamp is as the light source of DMD DMD in this device, and colour wheel is as the colour filter of light source, and the white light that each moment light source sends has only single colored light to impinge upon on the DMD through colour wheel.
Consulting Fig. 3, is one three look segment color wheel, and three look sections are respectively red 120
o, green 120
o, blue 120
oIf with 60 revolutions per seconds rotating speed uniform rotation, three times that continue in each week of look section are respectively red 5.56ms, green 5.56ms, blue 5.56ms to colour wheel so under the control of ARM microcontroller.Colour wheel produces feedback signal in uniform rotation, can learn that from feedback signal the real-time phase of colour wheel, the driving of DMD utilize feedback signal to make to drive sequential synchronous with the colour wheel maintenance.
Consult Fig. 4; Be a kind of typical driving sequential to Fig. 3 colour wheel, (5.56ms) will realize the pulse-width modulation of 4 bit-planes in each look section of colour wheel, and the time of establishing the demonstration of lowest bit face is t; The demonstration time of each bit-plane is followed successively by t, 2t, 4t, 8t so; Wherein being written into the required time of operation is Tload, and the required time of reset operation is Treset, and the required time of clear operation is Tclear (these parameters are relevant with concrete DMD).5.56ms time remove that first bit-plane is written into and the required time that resets, the remaining time is proportionally distributed to 4 bit-planes.If the initial moment of red color segment was 0 moment.The execution reset operation showed it after FPGA was written into DMD with each bit-plane; Convert sequential to the drive sequences table according to said process, as follows.
| Constantly | Operation | Bit-plane | Color component |
| 0 | Be written into | 0 | Red |
| Tload | Reset | ---------- | --------- |
| t | Be written into | 1 | Red |
| t+Tload | Reset | ---------- | ---------- |
| t+2t | Be written into | 2 | Red |
| t+2t+Tload | Reset | ----------- | ----------- |
| t+2t+4t | Be written into | 3 | Red |
| t+2t+4t+Tload | Reset | ------------ | ------------ |
| t+2t+4t+8t+Tload+Treset-Tclear | Empty | ------------ | ------------ |
| 5.56ms | Be written into | 0 | Green |
| 5.56ms+Tload | Reset | ------------ | ------------- |
| 5.56ms+t | Be written into | 1 | Green |
| …… | …… | …… | …… |
The process that sequential is converted to the drive sequences table realizes with program, and is embedded in the application program on the PC, and application program has had the function of automatic calculating sequential to this process like this.For the irregular sequential of following, can be in application program manual editing's drive sequences table, and its form with file preserved in order to using next time.
Consult Fig. 5, Fig. 6, the parameter configuration application program of on PC, moving can be with MFC or other similar language.In dialog box shown in Figure 5, can insert information, can calculate automatically, so just can rely on the application computes sequential if required sequential just in time is an application program about colour wheel.If sequential can not be calculated by application program automatically, so can image pattern 6 in manual editing's time-scale, editor is that clauses and subclauses of clauses and subclauses are carried out; Each clauses and subclauses is wanted the kind of input operation; Operating time, and the bit-plane that will be written into, will drive time-scale after editting and preserve into file.Sequential just can be downloaded into the digital micro-mirror drive plate afterwards.
Consult Fig. 2, the drive circuit among the FPGA of the present invention comprises: SPI interface module, drive sequences table memory and a universal state machine (the general driving sequential that is meant that this state function produces is not unique).Drive circuit receives various parameters and the drive sequences table is kept at the drive sequences table memory from the ARM microcontroller through the SPI interface; A genbank entry address counter is arranged, the clear address of genbank entry in sequence table that will carry out of this counters table in the universal state machine.Universal state machine detects after the red look section original position of colour wheel Counter Value clear 0; Just begin to carry out from first clauses and subclauses; Whenever execute a count value and add 1, carry out next bar, genbank entry is carried out successively under the synchronous situation of maintenance and colour wheel; Execute up to all clauses and subclauses, go round and begin again again.If the operation that state machine is read is to be written into, just the bit-plane with correspondence is written into DMD, if the operation of reading is to reset, just DMD is carried out reset operation, if what read is to empty operation, just empties DMD.So, change the driving sequential if desired, need not change drive circuit more again, and can be by the application program update sequence table-drive memory on the PC, sequential can realize.
Claims (2)
1. an intelligent digital micro mirror drives the sequential collocation method; It is characterized in that this method is: the sequential of representing to drive digital micro-mirror with the drive sequences table; And let the micro mirror drive circuit can resolve this drive sequences table, the digital micro-mirror that produces expectation drives sequential, specifically may further comprise the steps:
A, the grey scale accuracy that can realize with respect to phase difference and each look section of colour wheel feedback signal according to the angle of each look section of colour wheel, initial look section are put out the bit-plane operating process in a colour wheel cycle in order; Whole process is represented with the drive sequences table; These sequence table bit wide 32 bits; Indefinite length, this 32 Bit Allocation in Discrete are given different territories: the operation name comprises and is written into, resets and empty; With respect to the operating time in the initial initial moment of look section; The bit-plane numbering; The look segment number;
B, a memory space is set in the digital micro-mirror drive circuit drive sequences table is set; Digital micro-mirror drive circuit receiving video signals is an area dividing according to bit-plane, is buffered in the dynamic memory; Adopt universal state machine controlling and driving sequential, state machine reads and carries out the drive sequences table one by one, and the digital micro-mirror that produces expectation drives sequential.
2. device of implementing the said method of claim 1; It is characterized in that this device comprises PC, digital micro-mirror drive plate, DMD DMD and light source; The digital micro-mirror drive plate connects PC and DMD DMD respectively, and light source irradiation is on DMD DMD; Said digital micro-mirror drive plate comprises ARM microcontroller, FPGA and colour wheel, and the ARM microcontroller connects FPGA and colour wheel respectively, and FPGA connects colour wheel and DMD DMD; Wherein: be provided with drive circuit among the FPGA; This circuit comprises SPI interface module, drive sequences table memory and universal state machine; The SPI interface module connects driving time-scale memory; Universal state machine connects driving time-scale memory, and universal state machine reads the content in the drive sequences table memory, produces corresponding driving sequential.
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Cited By (6)
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| CN103139493A (en) * | 2013-03-19 | 2013-06-05 | 浙江宇视科技有限公司 | Charge coupled device (CCD) driving schedule processing device |
| CN103402060A (en) * | 2013-08-14 | 2013-11-20 | 中国科学院长春光学精密机械与物理研究所 | Synchronizing method for DMD grayness scene player and image acquisition system |
| CN105578179A (en) * | 2016-01-04 | 2016-05-11 | 厦门理工学院 | System and method for detecting display frame rate of DMD (Digital Micro-mirror Device) |
| CN106708457A (en) * | 2016-12-22 | 2017-05-24 | 合肥工业大学 | FPGA (Field Programmable Gate Array) processing module and method used for DMD (Digital Micromirror Device) dynamic area selection |
| CN113452977A (en) * | 2021-06-15 | 2021-09-28 | 华东师范大学 | Digital micromirror chip driving method based on FPGA |
| CN116609993A (en) * | 2023-04-11 | 2023-08-18 | 深圳市科金明电子股份有限公司 | Color wheel synchronous driving method and system based on FPGA |
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| CN103402060B (en) * | 2013-08-14 | 2016-08-10 | 中国科学院长春光学精密机械与物理研究所 | DMD gray scale scene player and the synchronous method of image capturing system |
| CN105578179A (en) * | 2016-01-04 | 2016-05-11 | 厦门理工学院 | System and method for detecting display frame rate of DMD (Digital Micro-mirror Device) |
| CN105578179B (en) * | 2016-01-04 | 2018-11-13 | 厦门理工学院 | The system and method for detecting DMD display frame rates |
| CN106708457A (en) * | 2016-12-22 | 2017-05-24 | 合肥工业大学 | FPGA (Field Programmable Gate Array) processing module and method used for DMD (Digital Micromirror Device) dynamic area selection |
| CN106708457B (en) * | 2016-12-22 | 2019-05-31 | 合肥工业大学 | FPGA processing module and its method for DMD dynamic constituency |
| CN113452977A (en) * | 2021-06-15 | 2021-09-28 | 华东师范大学 | Digital micromirror chip driving method based on FPGA |
| CN116609993A (en) * | 2023-04-11 | 2023-08-18 | 深圳市科金明电子股份有限公司 | Color wheel synchronous driving method and system based on FPGA |
| CN116609993B (en) * | 2023-04-11 | 2024-03-26 | 深圳市科金明电子股份有限公司 | Color wheel/fluorescent wheel synchronous driving method and system based on FPGA |
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Application publication date: 20121017 |