CN102739245A

CN102739245A - Discrete frequency adjusting method of multi-pass ring oscillator

Info

Publication number: CN102739245A
Application number: CN201110093453XA
Authority: CN
Inventors: 潘杰
Original assignee: Beijing CEC Huada Electronic Design Co Ltd
Current assignee: HUADA SEMICONDUCTOR CO., LTD.
Priority date: 2011-04-14
Filing date: 2011-04-14
Publication date: 2012-10-17

Abstract

The invention relates to a discrete frequency adjusting method of a multi-pass ring oscillator. The drive capabilities of auxiliary gain stages in delay units are adjusted to adjust the oscillation frequency of the multi-pass ring oscillator, wherein the drive capabilities of auxiliary gain stages are adjusted by a negative feedback resistor of a source electrode thereof; and the source electrode negative feedback resistor is realized by an equivalent resistance network controlled by a switch array.

Description

A kind of discrete frequency control method of multipass ring oscillator

Technical field:

The present invention relates to chip design; Especially a kind of discrete frequency control method of multipass ring oscillator when the delay cell of design multipass ring oscillator, is designed to fixedly secondary ring and variable secondary ring with secondary ring; And rely on control circuit to come the supply voltage of control lag unit and the common-mode point voltage of variable secondary ring; According to the actual test frequency of chip, optionally the control point in the control switching circuit is come the operating frequency range of chip is regulated with this.

Background technology:

In logical circuit and wireless communication system, the quality of clock or carrier wave is a key factor of guaranteeing that can system operate as normal. as far as clock, time jitter (Jitter) is to estimate the major criterion of its quality; For carrier wave; Phase noise (Phase Noise) is a major criterion of estimating its quality. in fact; Time jitter and phase noise all are the random noises that is attached on the ideal sinusoidal signal. therefore; How to reduce this additional noise and be one of aspect that the designer pays close attention to the most. along with the continuous lifting of chip performance; Requirement to clock frequency is also increasingly high, and for example the dominant frequency of PC has reached GHz already and improved constantly. and brought the dwindling of device size except relying on the technology progress, also must satisfy demand through structure Design to hyperfrequency clock generating module. in the CMOS logic process; Ring oscillator is the common form of clock generation circuit; It has the characteristics of multi-phase differential output and area compact, but operating frequency and phase noise are all more limited. and therefore, the frequency of oscillation of enhancing ring oscillator is the direction that the chip design personnel make great efforts with optimizing its phase noise.

Multipass ring oscillator (Multi-pass Ring Oscillator) is a kind of structure of having considered that frequency upgrading and phase noise are optimized. its principle can simply be described below: oscillating loop is made up of the delay cell of cascade; Each delay cell comprises main oscillations loop and auxiliary oscillating loop; Assist oscillating loop prior to the main oscillations loop start, and then dwindle the time of delay of delay cell; Because the periodic short time conducting of gain stage transistor, noise can only be injected in the oscillating loop slightly, adds oscillator signal near the full amplitude of oscillation, therefore can reach to promote frequency of oscillation and the dual purpose of optimizing phase noise.

List of references:

[1]C.H.Park，and?B.Kim，“A?Low-Noise，900-MHz?VCO?in?0.6-mm?CMOS，”IEEE?J.Solid?State?Circuits，vol.34，pp.586-591，May?1999.

[2]Yalcin?Alper?Eken，and?John?P.Uyemura，“A?5.9-GHz?Voltage-Controlled?Ring?Oscillator?in0.18μm?CMOS，”IEEE?J.Solid?State?Circuits，vol.39，pp.230-233，Jan.2004.

Summary of the invention:

In general; When producing chip in batches; There is more consistent skewed popularity in same batch wafer; Be that the frequency of oscillation integral body of chip is up floated or integral body is down floated. based on the current design level and the level of production, the design surge frequency range of ring oscillator and actual test result are difficult to accomplish identical, though reason is the stability and the limited design of Simulation means of technology. ring oscillator has the interior continuous tunability of certain frequency scope; But still face the higher or problem of lower of frequency range. for guaranteeing yield; Being preferably in the design phase adds the consideration to frequency adjustment, increases the amount of redundancy in the design. and this scheme must have and is easy to realize and bidirectional modulation ability that performance impact is little, promptly can carry out globality ground to frequency of oscillation and promote or reduce. in the multipass ring oscillator; The parameter that can supply regulate is very limited, has caused the design difficulty of bidirectional modulation ability.

For addressing the above problem; Main purpose of the present invention is to provide a kind of method of discrete adjustment frequency of multipass ring oscillator. when design multipass ring oscillator; Change the driving force of above-mentioned adjustable assist gain level through the equivalent feedback resistance of adjustable assist gain level common-mode point in the control circuit control lag unit, with time of delay of this control lag unit and then realize discrete adjustment to frequency of oscillation.

For obtaining above-mentioned purpose; The discrete frequency control method of multipass ring oscillator of the present invention; Come the frequency of oscillation of multipass ring oscillator is regulated through the driving force of assist gain level in the control lag unit; And the driving force of this assist gain level is regulated by the negative feedback resistor of its source electrode, and this source negative feedback resistance is realized by the equivalent resistance network of switch arrays control.

Rely on multipass ring oscillator of the present invention to get the discrete frequency control method, can make the multipass ring oscillator produce many discrete tuning curves, enlarged the coverage of frequency, strengthened the ability of anti-technological fluctuation, can effectively improve the yield of chip.

Description of drawings:

Fig. 1 is the schematic diagram of traditional multipass ring oscillator;

Fig. 2 is the structure chart of delay cell in the multipass ring oscillator device;

Fig. 3 is the schematic diagram of the assist gain level of enforcement according to the present invention;

Fig. 4 is the schematic diagram of the multipass ring oscillator that possesses the discrete frequency regulating power of enforcement according to the present invention;

Fig. 5 is the variable-resistance schematic diagram of implementing according to the present invention;

Fig. 6 is the frequency coverage of the multipass ring oscillator of enforcement according to the present invention.

Component parameters explanation among the figure:

The 113 continuous regulating loads of 11 delay cells, 111 assist gain levels, 112 master gain levels

12 variable resistors

The common-mode point Rs equivalence adjustable resistance R1/R2/Rn resistance of FC assist gain level

SW1/SW2/SWn control switch P+/P-master gain level port signal S+/S-assist gain level port signal

Embodiment:

As shown in Figure 1; Traditional N level multipass ring oscillator is cascaded into a closed hoop (N >=2) by N identical delay cell. wherein; As shown in Figure 2; Delay cell 11 is differential configuration (the output signal is OUT+ and OUT-); Above-mentioned delay cell is by continuous regulating load 113 (control signal is VCTRL), and master gain level 112 (control signal is P+ and P-) and assist gain level 111 (control signal is S+ and S-) are common to be formed. above-mentioned continuous regulating load has the ability of regulating frequency of oscillation with VCTRL continuously; Above-mentioned master gain level is driven by the output of the previous stage delay cell of this delay cell; Above-mentioned assist gain level is driven by the output of the preceding two-stage delay cell of this delay cell. during operate as normal; With delay cell 11 is example; Because the control signal pulse of its master gain level 112 of control signal pulse ratio of its assist gain level 111 arrives earlier; Cause assist gain level 111 to start in advance than master gain level 112, assist gain level 111 has been accelerated the switch speed of this delay cell 11 output port level Q1+ and Q1-, and (time scale that precipitous rising/trailing edge makes noise inject oscillating loop reduces not only to have reduced the phase noise of loop; And then phase noise performance is improved); Also promoted loop oscillation frequency (be Tdelay the time of delay of delay cell 11, and the frequency of oscillation of loop equals 1/2/N/Tdelay, obviously the rising that reduces to cause the ring oscillator frequency of oscillation of Tdelay). according to above-mentioned analysis; Be easy to further inference: when parameter constant, strengthen the assist gain level and can promote frequency of oscillation.

What Fig. 3 provided is the concrete implementation of the assist gain level of delay cell in the above-mentioned multipass ring oscillator, adopt respectively be based on PMOS differential pair of transistors structure with based on nmos pass transistor differential pair structure. the driving force of this difference structure for amplifying becomes the forward proportionate relationship with its effective mutual conductance.

The multipass ring oscillator schematic diagram that possesses the discrete frequency regulating power that is based on the present invention's enforcement that Fig. 4 provides; Compare with multipass ring oscillator traditional shown in Fig. 1; The common-mode point of assist gain level no longer is a fixed level, but the variable resistor that can control 12. Fig. 5 have provided three kinds of concrete implementations of variable resistor 12: the parallelly connected PMOS transistor array of (1) switch control; (2) the parallelly connected nmos pass transistor array of switch control; (3) resistor network of the connection in series-parallel mixed structure of switch control. the equivalent resistance of variable resistor 12 is Rs; The source negative feedback resistance that above-mentioned equivalent resistance Rs is above-mentioned assist gain level 111; The waveform of above-mentioned multipass ring oscillator is the periodic voltage pulse that approaches the full amplitude of oscillation; Be the waveform of large-signal, when the grid-source voltage difference of above-mentioned assist gain level 111 is very big, effective mutual conductance ∝ 1/Rs. of this assist gain level 111

In conjunction with above-mentioned analysis conclusion, the frequency of oscillation of oscillating loop can rely on the adjusting to variable resistor 12 to realize. and when variable resistor 12 increased, frequency of oscillation descended; When variable resistor 12 reduced, frequency of oscillation rose. so, can realize many discrete frequency tuning curveses, and as shown in Figure 6.

Further; The same point FC that among the present invention the assist gain level common-mode point of all delay cells all is connected to helps stablizing the level of above-mentioned assist gain level common-mode point FC, and is helpful to the phase noise performance of loop. in addition; Because variable-resistance common mode characteristic; Do not worry between itself and certain one-level delay cell cross talk effects, therefore in view of layout design, variable-resistance layout and position can be gone realization very flexibly. after the mentioned method of designer's embodiment of the present invention; Can effectively increase the frequency coverage of multipass ring oscillator, and regulative mode is simple.

Listed a kind of concrete detailed sketch map among the present invention; But it is not to define scope of the present invention, and any IC design person is not breaking away from the spirit and scope of the present invention; When can doing a little change, so protection scope of the present invention is as the criterion when defining with claims.

Claims

1. the discrete frequency control method of a multipass ring oscillator is characterized in that: realize the adjusting of the discrete frequency of this multipass ring oscillator through the adjusting to the driving force of delay cell assist gain level in the multipass ring oscillator.

2. the discrete frequency control method of a kind of multipass ring oscillator as claimed in claim 1; It is characterized in that: the assist gain level is made up of transistorized differential pair amplifying circuit, and the adjusting of the driving force of assist gain level is realized by the adjusting of effective mutual conductance of differential pair amplifying circuit.

3. according to claim 1 or claim 2 a kind of discrete frequency control method of multipass ring oscillator, it is characterized in that: effectively mutual conductance realizes through the adjusting of source negative feedback resistance in the differential pair amplifying circuit.

4. the discrete frequency control method of a kind of multipass ring oscillator as claimed in claim 3 is characterized in that: transistor array or the electric resistance array of series-multiple connection mixed form through switch control of source negative feedback resistance through the parallel form of switch control realized.