CN102736651A - Design method for eliminating Ground noise - Google Patents

Abstract

The invention provides a design method for eliminating a Ground noise. The method comprises the steps of: 1) directly connecting a negative pin of a decoupling capacitor with a ground pin of a power supply conversion chip when placing a PCB (Printed Circuit Board) apparatus, thereby, eliminating oversized noise caused by inappropriate placement of the decoupling capacitor, and effectively reducing the parasitic inductance and resistance values generated by a long trace path as well as reducing unstability of system voltage caused by ground bounce; 2) adding GNDVIA near the horizontal of the decoupling capacitor C2677/C2678 to reduce the horizontal impedance, effectively reducing the voltage noise within 1mV after adding the GNDVIA, and ensuring the stability of a power supply; and 3) directly connecting the ground pin of the decoupling capacitor directly with a plurality of ground pins of a power supply converter to cut off a coupling path, thereby effectively reducing the current circuit impedance, reducing the ground noise and increasing the stability of voltage.

Description

A kind of method for designing of eliminating the Ground noise

Technical field

The present invention relates to the Computer Applied Technology field, specifically a kind of method for designing of eliminating the Ground noise.

Background technology

At present the Power circuit is more in the Server product, is stability and the system performance that improves Power voltage, often on the input pin of power supply and connect many decoupling capacitors and reach this target.Yet feasible in the scheme circuit design; Be not the just ability efficient stable work of PCB profiled sheeting, in certain server special project product design, just occur because the electric capacity putting position is improper; Cause the system voltage no-output; Through analogue simulation and real plate debug checking, successfully eliminate electric capacity and put improperly, cause the excessive system voltage problem of unstable that causes of ground noise.

When certain Server special project is designed and developed, find the output of one tunnel voltage transitions chip no-voltage, through following wiring diagram and PCB layout figure (shown in Tu1 &2) are analyzed, assert that tentatively the problem reason is following:

Because the integrated mosfet pipe of voltage transitions chip internal; And comprised the LC filtering circuit in the circuit; Therefore confirm that this voltage transitions chip is an on-off circuit; Have slope variation sawtooth current faster at chip internal, this change in current will make input capacitance C2677/C2678 produce and discharge and recharge, and it is stable to satisfy input direct current 5V voltage with this.

Find that in inspection Layout wiring the ground level path that links to each other with coupling capacitance is narrower, cause on this ground level noise excessive, and can't effectively propagate on the adjacent large tracts of land reference horizontal plane of manufacturing.The filter capacitor C2679 on coupling capacitance C2677/C2678 next door is the parts that bias voltage Vbias joins over the ground, and therefore, bigger noise arrives the stable of Vbias voltage through the C2679 capacitive effect, thereby causes the output of voltage transitions chip no-voltage.

Summary of the invention

The method for designing that the purpose of this invention is to provide a kind of Ground of elimination noise.

The objective of the invention is to realize, comprise following content by following mode:

1) when the PCB device is put; Directly the negative pin of decoupling capacitor is linked to each other with the ground pin of power conversion chip; Can eliminate by the incorrect excessive phenomenon of ground noise that causes of decoupling capacitor putting position; Also can effectively reduce stray inductance and resistance value that long trace path produces, significantly reduce the unsettled phenomenon of system voltage that the ground bullet causes;

2) near decoupling capacitor C2677/C2678 ground level, add and beat GND VIA,, add and effectively reduce voltage noise in 1mV after beating GND VIA, guaranteed the stability of power supply to reduce the ground level impedance;

3) decoupling capacitor ground pin is directly linked to each other with a plurality of ground pin of power supply changeover device,, can effectively reduce the current return impedance, reduce the ground noise, increase the stability of voltage with the excision coupling path.

The invention has the beneficial effects as follows: when the present invention is based on certain server product design at present; Certain road power supply breaks down and carries out simulation analysis and real board test checking; Its main thought to the PCB of many Power circuit design the time, with rationally the putting and be connected of electric capacity position, can significantly eliminate noise; Improve the stability of power supply, increase competitiveness of product.

Design philosophy of the present invention has been able to checking in certain Server product P ower Debug, and may be used in the more electronic product of other Power circuits, and well the stability of resolution system power supply promotes competitiveness of product.

Description of drawings

Fig. 1 is voltage transitions chip connection line figure;

Fig. 2 is a voltage transitions chip PCB Layout screenshot capture;

Fig. 3 is the two-dimensional time-domain noise audiogram;

Fig. 4 is three-dimensional spatial noise distribution screenshot capture;

Fig. 5 adds the realistic model screenshot capture of beating GND VIA;

Fig. 6 adds the two-dimensional time-domain oscillogram of beating GND VIA;

Fig. 7 adds the distributed in three dimensions screenshot capture of beating GND VIA;

Fig. 8 is improved PCB Layout screenshot capture;

Fig. 9 improves the realistic model screenshot capture;

Figure 10 is the two-dimensional time-domain simulation waveform figure after the improvement project;

Figure 11 is the actual measurement voltage waveform screenshot capture after the improvement project.

Embodiment

Explanation at length below with reference to Figure of description design of the present invention being done.

Verified through above-mentioned emulation and the source of power quality problem to have utilized emulation to carry out quality of voltage optimization now, its improvement project is following:

1) shown in Fig. 1-4; When the PCB device is put; Directly the negative pin of decoupling capacitor is linked to each other with the ground pin of power conversion chip; Can eliminate by the incorrect excessive phenomenon of ground noise that causes of decoupling capacitor putting position, also can effectively reduce stray inductance and resistance value that long trace path produces, significantly reduce the unsettled phenomenon of system voltage that the ground bullet causes;

2) near decoupling capacitor C2677/C2678 ground level, add dozen GND VIA,, be illustrated in fig. 5 shown below to reduce the ground level impedance:

Find through emulation, add and effectively reduce voltage noise in 1mV after beating GND VIA, guaranteed the stability of power supply, but there are two shortcomings in the method:

(1) must the GND of beating VIA if want to reduce the ground noise, and VIA itself also exists stray inductance and resistance more, though and pcb board thickness increase and increase, therefore, when thickness of slab was big, the noise amplitude that is caused by VIA also increased thereupon;

(2) add to beat GND VIA for reducing the ground noise, possibly cause the VIA high density to distribute, poor heat radiation when causing PCB to make causes PCB layering plate bursting;

3) decoupling capacitor ground pin is directly linked to each other with a plurality of ground pin of power supply changeover device, with the excision coupling path, shown in following Fig. 8 and 9:

Can know by simulation waveform,, can effectively reduce the current return impedance, reduce the ground noise, increase the stability of voltage, and also need not increase the layering plate bursting problem that too much GND VIA causes through electric capacity ground pin and power conversion chip ground pin is direct-connected.After it utilized improvement project, the actual measurement voltage waveform was shown in figure 11:

Except that the described technical characterictic of instructions, be the known technology of those skilled in the art.

Claims (1)

1. method for designing of eliminating the Ground noise is characterized in that comprising following content:

1) when the PCB device is put; Directly the negative pin of decoupling capacitor is linked to each other with the ground pin of power conversion chip; Can eliminate by the incorrect excessive phenomenon of ground noise that causes of decoupling capacitor putting position; Also can effectively reduce stray inductance and resistance value that long trace path produces, significantly reduce the unsettled phenomenon of system voltage that the ground bullet causes;

2) near decoupling capacitor C2677/C2678 ground level, add and beat GND VIA,, add and effectively reduce voltage noise in 1mV after beating GND VIA, guaranteed the stability of power supply to reduce the ground level impedance;

3) decoupling capacitor ground pin is directly linked to each other with a plurality of ground pin of power supply changeover device,, can effectively reduce the current return impedance, reduce the ground noise, increase the stability of voltage with the excision coupling path.

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