CN102735263A - Whole-course real-time detection system of spatial stereoscopic plotting camera time synchronization accuracy and method thereof - Google Patents
Whole-course real-time detection system of spatial stereoscopic plotting camera time synchronization accuracy and method thereof Download PDFInfo
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Abstract
Disclosed are a whole-course real-time detection system of spatial stereoscopic plotting camera time synchronization accuracy and a method thereof. The invention relates to a spatial stereoscopic plotting camera and solves the problem that dynamic change of camera time synchronization errors during the spatial stereoscopic plotting camera operation process can not be detected at real time for a long time by the use of a present common device. The system comprises: a second pulse and line/frame synchronising signal input cable, a second pulse and line/frame synchronising signal transfer unit, a second pulse and line/frame synchronising signal output cable, a FPGA time setting unit, a data collection card, a bus watching cable, a bus communication card and a data handling machine system. According to the method, image time setting information is directly received from internal bus through a bus watching mode, thus substantially reducing the time of separating image data and extracting image time setting information. By the adoption of the system, real-time measurement, recording and display of spatial stereoscopic plotting camera time synchronization accuracy are realized. According to the invention, real-time detection and whole-course recording of dynamic changes of camera time synchronization errors can be realized during the photographing process of the spatial stereoscopic plotting camera.
Description
Technical field
The present invention relates to the space multistory mapping camera, be specifically related to omnidistance real-time detecting system of space multistory mapping camera timing tracking accuracy and method.
Background technology
The space multistory mapping camera is platform with the satellite; Through stereopsis and the information of obtaining such as attitude, orbital position; Survey numerical map, digital elevation figure and the digital orthophoto map on the system earth and other celestial body surfaces, play a significant role in fields such as military affairs, disaster relief mitigation, city planning, resource investigations.Because satellite awing position and attitude constantly changes; If the camera timing tracking accuracy is not high; Even tracks positioned precision and attitude measurement accuracy are very high; Can be not corresponding and cause the reduction of space multistory mapping camera mapping precision because of image and position, attitude etc. yet, so the camera timing tracking accuracy is the important factor in order of space multistory mapping camera mapping precision.
The space multistory mapping camera receives the GPS pulse per second (PPS) and the time scale information of the transmission of GPS receiver and sets up the camera time system; In photographic process the timing acquiring image to the time information, image to the time information by row/frame number, this row/two field picture of certain delegation/two field picture make public the initial moment second value and the microsecond value form.The camera time synchronization error be image to the time certain delegation/two field picture of writing down in the information time and the difference of the actual time (is benchmark with time synchronized source GPS receiver time system) in the initial moment of exposure.When the image-generating unit of space multistory mapping camera adopts line array CCD, return line synchronizing signal, when adopting area array CCD, return frame synchronizing signal, the edge representative initial moment of exposure of line synchronizing signal or frame synchronizing signal.
The phase machine controller of space multistory mapping camera is except setting up the high precision time system; To accomplish simultaneously complicated image drift speed calculation, with the multi-tasks such as Star Service host communication, control image-generating unit and focusing, it is therefore general that to adopt CPU (CPU) or digital signal processor (DSP) be the core processing element.Because the phase machine controller is realized time synchronized with the mode of software; And to accomplish multinomial complex task; To the time, punctual and time spent process in can introduce multiple error, the time synchronization error of space multistory mapping camera is the result of multiple error synthesis effect.This causes time synchronization error to change with the variation of phase machine controller work schedule; The omnidistance dynamic change that detects time synchronization error in the space multistory mapping camera course of work in real time is prerequisite and the basis that guarantees space multistory mapping camera timing tracking accuracy in ground test.
Because the space multistory mapping camera at work can sequence photography dozens of minutes even several hrs, conventional instrument such as oscillograph, logic analyser etc. since the restriction of storage depth can't detect for a long time with high SF.And since camera timing tracking accuracy final body insert now in the image auxiliary data image to the time information on, also be difficult to realize the real-time detection of timing tracking accuracy in the camera course of normal operation through conventional instrument.
Summary of the invention
The present invention provides omnidistance real-time detecting system of a kind of space multistory mapping camera timing tracking accuracy and method for solving the problem that existing conventional instrument can't Long-term Real-time detects the dynamic change of camera time synchronization error in the space multistory mapping camera course of work.
The omnidistance real-time detecting system of space multistory mapping camera timing tracking accuracy, this system comprise pulse per second (PPS) and row/frame synchronizing signal input cable, pulse per second (PPS) and row/frame synchronizing signal adapter unit, pulse per second (PPS) and row/frame synchronizing signal output cable, FPGA to the time unit, data collecting card, bus monitoring cable, bus communication card and data handling machine system;
Said pulse per second (PPS) is connected with row/frame synchronizing signal adapter unit with pulse per second (PPS) with row/frame synchronizing signal input cable; Said pulse per second (PPS) and row/frame synchronizing signal adapter unit receives the GPS pps pulse per second signal and the row/frame synchronizing signal of pulse per second (PPS) and row/frame synchronizing signal input cable input; And GPS pps pulse per second signal and row/frame synchronizing signal be divided into two-way; One road GPS pps pulse per second signal and row/frame synchronizing signal deliver to FPGA to the time unit, another road GPS pps pulse per second signal and row/frame synchronizing signal are delivered to pulse per second (PPS) and row/frame synchronizing signal output cable; Said pulse per second (PPS) and row/frame synchronizing signal output cable is sent to space multistory mapping camera controller with GPS pps pulse per second signal and row/frame synchronizing signal;
Said FPGA to the time unit and data acquisition card connection, FPGA to the time unit form by level transferring chip, FPGA and high stability crystal oscillator, level transferring chip converts GPS pps pulse per second signal and row/frame synchronizing signal into the Transistor-Transistor Logic level signal; Said FPGA receives the clock signal of Transistor-Transistor Logic level signal and the generation of high stability crystal oscillator; FPGA according to the GPS pps pulse per second signal, OK/frame synchronizing signal and clock signal produce FPGA to the time data; Every row produce one group of FPGA to the time data send trigger pip with data, said FPGA to the time unit with FPGA to the time data and data transmission trigger pip be sent to data collecting card;
Said data acquisition card receiver FPGA to the time FPGA that sends of unit to the time data and data transmission trigger pip, and be sent to the data handling machine system;
Said bus monitoring cable is connected on the communication bus between space multistory mapping camera image-generating unit and the space multistory mapping camera controller; The bus monitoring cable receive image that space multistory mapping camera controller sends to space multistory mapping camera image-generating unit to the time information, and be sent to the bus communication card;
The image that said bus communication card receiver bus monitoring cable transmits to the time information, and with the image that receives to the time information be sent to the data handling machine system;
Said data handling machine system and data collecting card and bus communication card connection; The data handling machine system is made up of data handling machine, Data Receiving storing software and data processing software, said data handling machine and Data Receiving storing software receive FPGA that data collecting card transmits to the time data and the transmission of bus communication card image to the time information with the stored in form of file on hard disk; Said data processing software from hard disk reading images to the time information and FPGA to the time data, calculate the corresponding camera time synchronization error of each row, and with the outcome record that obtains in hard disk, and show in real time with the form of curve.
The omnidistance real-time detection method of space multistory mapping camera timing tracking accuracy may further comprise the steps:
GPS pulse per second (PPS) stube cable between steps A, disconnection GPS receiver or GPS emulator and the space multistory mapping camera controller breaks off the cable that comprises row/frame synchronizing signal between space multistory mapping image-generating unit and the space multistory mapping camera controller; The input end of pulse per second (PPS) and row/frame synchronizing signal input cable is connected in the GPS pulse per second (PPS) output interface of GPS receiver or GPS emulator and the row/frame synchronizing signal output interface of space multistory mapping image-generating unit; The output terminal of pulse per second (PPS) and row/frame synchronizing signal input cable is connected on pulse per second (PPS) and the row/frame synchronizing signal adapter unit; The input end of pulse per second (PPS) and row/frame synchronizing signal output cable is connected on pulse per second (PPS) and the row/frame synchronizing signal adapter unit; The output terminal of pulse per second (PPS) and row/frame synchronizing signal output cable is connected in the pulse per second (PPS) and row/frame synchronizing signal input interface of space multistory mapping camera controller, gets into step B;
Step B, to FPGA to the time unit reset; Be provided with GPS receiver or GPS emulator send to space multistory mapping camera controller the time scale value with to send to pulse per second (PPS) corresponding one by one with the pulse per second (PPS) number of row/frame synchronizing signal adapter unit; Then GPS receiver or GPS emulator begin to send the GPS pulse per second (PPS) and the time scale value, get into step C;
Step C, pulse per second (PPS) and row/frame synchronizing signal adapter unit is divided into two-way with GPS pps pulse per second signal and row/frame synchronizing signal; Will be wherein one road GPS pps pulse per second signal and row/frame synchronizing signal deliver to FPGA to the time unit; Another road GPS pps pulse per second signal and row/frame synchronizing signal are delivered to space multistory mapping camera controller through pulse per second (PPS) and row/frame synchronizing signal output cable, get into step D;
Step D, FPGA to the time unit at three counters of FPGA internal structure; OK/the frame synchronization counter produces row/frame number to the negative edge of row/frame synchronizing signal counting; Second, counter was worth the second of the negative edge counting generation system time of GPS pulse per second (PPS), and the microsecond counter counts to get the microsecond value of system time to the rising edge of clock signal of high stability crystal oscillator generation; The initial value that second Counter Value and microsecond Counter Value are set when system reset is 0, and the initial value that row/frame synchronization counter is set is 1; At the negative edge of GPS pulse per second (PPS) to the zero clearing of microsecond Counter Value, accomplish to the time; With the rising edge of row/frame synchronizing signal row/frame synchronization Counter Value, second Counter Value and microsecond Counter Value are latched, produce one group of FPGA that forms by corresponding second value of row/frame number, this row/frame and microsecond value to the time data; With FPGA to the time data and row/frame synchronizing signal postpone the back and generate data and send trigger pip and be sent to data collecting card, get into step e;
Step e, bus communication cartoon cross the bus monitoring cable receive image that the phase machine controller sends to space multistory mapping camera image-generating unit to the time information, send to the data handling machine system; Data collecting card with the FPGA that collects to the time data send to the data handling machine system, get into step F;
Step F, data handling machine system receive FPGA that data collecting card transmits to the time data and with the stored in form of file on hard disk, receive simultaneously image that the bus communication card transmits to the time information and with the stored in form of file on hard disk; Data processing software from hard disk reading images to the time information and FPGA to the time data; Movement images to the time information and FPGA to the time data in the corresponding value and microsecond value poor second of same lines/frame number; Obtain the corresponding camera time synchronization error of this row; Camera time synchronization error data are recorded in the hard disk, and show with the form of curve.
Beneficial effect of the present invention:
One, through the mode that is divided into two after the switching is passed through in pulse per second (PPS) and row/frame synchronizing signal; Make measuring process not influence the operate as normal of space multistory mapping camera, thereby can record in the course of work dynamic change truly along with the variation camera time synchronization error of camera controller timing.
Two, since FPGA to the time data and image to the time data storage in hard disk; And as the FPGA of benchmark to the time unit in measurement, remain high precision; Thereby can overcome conventional instrument such as logic analyser because the restriction of storage depth can't be with the long-term shortcoming that detects of high SF, the whole process of camera timing tracking accuracy is measured in the tridimensional mapping camera photographic process of implementation space.
Three, the mode through monitor bus, directly receive on the bus internally image to the time information, can significantly reduce divide image data with extract image to the time information time.Regularly with up-to-date image to the time information and FPGA to the time data write hard disk; New file of each formation; The size of file is fixed and is very little; Make data processing software can compare calculating apace, thus real-time measurement that can implementation space tridimensional mapping camera timing tracking accuracy, record and demonstration.
Description of drawings
Fig. 1 is the structural representation of the omnidistance real-time detecting system of space multistory mapping camera timing tracking accuracy of the present invention.
Fig. 2 is the process flow diagram of the omnidistance real-time detection method of embodiment two described space multistory mapping camera timing tracking accuracies.
Fig. 3 be in the embodiment two FPGA to the time unit the sequential analogous diagram.
Embodiment
Embodiment one, combine Fig. 1 that this embodiment is described, the omnidistance real-time detecting system of space multistory mapping camera timing tracking accuracy by pulse per second (PPS) and row/frame synchronizing signal import cable 10, pulse per second (PPS) and row/frame synchronizing signal adapter unit 20, pulse per second (PPS) and row/frame synchronizing signal output cable 50, FPGA to the time unit 30, data collecting card 40, bus monitoring cable 60, bus communication card 70 and data handling machine system 80 form.
Said pulse per second (PPS) and row/frame synchronizing signal input cable 10 is made up of GPS pulse per second (PPS) cable and row/frame synchronizing signal cable; The cable of GPS pulse per second (PPS) in the present embodiment connects ground GPS emulator and pulse per second (PPS) and row/frame synchronizing signal adapter unit 20, transmits the GPS pps pulse per second signal; OK/and frame synchronizing signal cable connection space tridimensional mapping camera image-generating unit and pulse per second (PPS) and row/frame synchronizing signal adapter unit 20, transmit row/frame synchronizing signal that space multistory mapping camera image-generating unit sends;
Pulse per second (PPS) is connected with row/frame synchronizing signal input cable 10 with pulse per second (PPS) with row/frame synchronizing signal adapter unit 20; Reception GPS pps pulse per second signal and row/frame synchronizing signal also is divided into two; Will be wherein one road GPS pps pulse per second signal and row/frame synchronizing signal deliver to FPGA to the time unit 20, another road GPS pps pulse per second signal and row/frame synchronizing signal are delivered to pulse per second (PPS) and row/frame synchronizing signal output cable 50; The machine controller mutually of space multistory mapping camera sent pulse per second (PPS) and row/frame synchronizing signal back to by pulse per second (PPS) and row/frame synchronizing signal output cable 50;
FPGA to the time unit 30 form by level transferring chip 31, FPGA32 and high stability crystal oscillator 33, level transferring chip 31 converts GPS pps pulse per second signal and row/frame synchronizing signal into FPGA32 Transistor-Transistor Logic level signal commonly used; The GPS pps pulse per second signal and row/frame synchronizing signal of FPGA32 after the incoming level conversion, also receive the clock signal that high stability crystal oscillator 33 produces; FPGA32 according to the GPS pps pulse per second signal, OK/frame synchronizing signal and clock signal produce FPGA to the time data, every row produce one group of FPGA to the time data and data transmission trigger pip, be sent to data collecting card 40;
Pulse per second (PPS) in the present embodiment and row/frame synchronizing signal adopts Low Voltage Differential Signal (LVDS) standard transmission, and level transferring chip 31 adopts SN55LVDS32, is Transistor-Transistor Logic level with pulse per second (PPS) and row/frame synchronizing signal from the LVDS level conversion.FPGA32 adopts the XCV300 of 300,000 in Xilinx company, and high stability crystal oscillator 33 adopts frequency 10MHz, and frequency difference is the temperature compensating crystal oscillator of 1PPM.
Communication bus between described space multistory mapping camera image-generating unit and the space multistory mapping camera controller is 485 buses, baud rate 31.25kbps; Bus communication card 70 adopts the multi-serial-port card CP134U of MOXA companies, be installed in the PCI slot of data handling machine 80 mainboards, with the image of receiving to the time information send to data handling machine system 80;
Described data handling machine system 80 is made up of data handling machine, Data Receiving storing software and data processing software; Data handling machine system 80 is connected with data collecting card 40 and bus communication card 70, receive FPGA that data collecting card 40 transmits to the time data and 70 transmission of bus communication card image to the time information and with the stored in form of file on hard disk; Data processing software from hard disk reading images to the time information and FPGA to the time data, calculate the corresponding camera time synchronization error of each row, result of calculation is recorded in the hard disk, and can show in real time with the form of curve.
The hard-disk capacity of data handling machine is 500G in the present embodiment, and testing available clearance spaces is 300G.
This embodiment is owing to a plurality of signals in the interface of common space multistory mapping camera image-generating unit and space multistory mapping camera controller are outwards exported through a connector; Promptly also comprise other control signals except comprising line synchronizing signal in this connector; In this case; For consistent with connector; Pulse per second (PPS) and row/frame synchronizing signal input cable and pulse per second (PPS) and row/frame synchronizing signal output cable also transmit other signals except pulse per second (PPS) and row/frame synchronizing signal; Described other signals can be periodic signal, clock signal and reset signal, and pulse per second (PPS) and row/frame synchronizing signal adapter unit is not divided into two to other signals beyond pulse per second (PPS) and the row/frame synchronizing signal, and directly output.
Embodiment two, combination Fig. 2 and Fig. 3 explain this embodiment, the omnidistance real-time detection method of space multistory mapping camera timing tracking accuracy, and this method is realized by following steps:
In steps A, replace GPS emulators and image-generating unit and the cable between the machine controller mutually with pulse per second (PPS) and row/frame synchronizing signal input cable 10 and pulse per second (PPS) and row/frame synchronizing signal output cable 50.Detailed process is that the GPS pulse per second (PPS) stube cable between disconnection GPS emulator and the phase machine controller breaks off the cable that comprises row/frame synchronizing signal between image-generating unit and the phase machine controller; The input end of pulse per second (PPS) and row/frame synchronizing signal input cable 10 is connected in the pulse per second (PPS) output interface of GPS emulator and the row of image-generating unit/frame synchronizing signal output interface; The output terminal of pulse per second (PPS) and row/frame synchronizing signal input cable 10 is connected on pulse per second (PPS) and the row/frame synchronizing signal adapter unit; The input end of pulse per second (PPS) and row/frame synchronizing signal output cable 50 is connected on pulse per second (PPS) and the row/frame synchronizing signal adapter unit; The pulse per second (PPS) and the output terminal of row/frame synchronizing signal output cable 50 are connected in the pulse per second (PPS) and row/frame synchronizing signal input interface of machine controller mutually, get into step B.
In step B; To FPGA to the time unit 30 reset; Be provided with the GPS emulator send to the space multistory mapping camera the time scale value with to send to pulse per second (PPS) corresponding one by one with the pulse per second (PPS) number of row/frame synchronizing signal adapter unit 20; The GPS emulator begins to send GPS pulse per second (PPS) and markers afterwards, gets into step C.
In step C; Pulse per second (PPS) and row/frame synchronizing signal adapter unit 20 is with GPS pps pulse per second signal and row/frame synchronizing signal and be divided into two; Will be wherein one road GPS pps pulse per second signal and row/frame synchronizing signal deliver to FPGA to the time unit 30; Another road GPS pps pulse per second signal is delivered to mutually machine controller through pulse per second (PPS) with row/frame synchronizing signal output cable with row/frame synchronizing signal, gets into step D.
In step D, FPGA to the time unit 30 at three counters of FPGA31 XCV300 internal structure, counter all is 32; OK/the frame synchronization counter produces row/frame number to the negative edge of row/frame synchronizing signal counting; Second, counter was worth the second of the negative edge counting generation system time of GPS pulse per second (PPS), and the microsecond counter counts to get the microsecond value of system time to the rising edge of clock signal of high stability temperature compensating crystal oscillator generation; The initial value that second Counter Value and microsecond Counter Value are set when system reset is 0, and the initial value that row/frame synchronization counter is set is 1; At the negative edge of GPS pulse per second (PPS) to the zero clearing of microsecond Counter Value, accomplish to the time; With the rising edge of row/frame synchronizing signal row/frame synchronization Counter Value, second Counter Value and microsecond Counter Value are latched, produce one group of FPGA that forms by corresponding second value of row/frame number, this row and microsecond value to the time data.To go/frame synchronizing signal postpone the back generate data send trigger pip and FPGA to the time data be sent to data collecting card 40 together, get into step e.
In the present embodiment; Because data collecting card 40 adopts PCI7300A, 32 of maximum collection bit wides, and row/frame synchronization counter, second counter and microsecond counter all are 32; Therefore each group FPGA to the time data need divide three output; Three data of corresponding generation are sent trigger pips as the output clock, and Fig. 3 is a FPGA sequential analogous diagram, and what output data was exported successively is row number, second value and microsecond value.
In step e, bus communication card 70 be CP134U through bus monitoring cable 60 receive image that the phase machine controllers send to image-generating unit to the time information, send to data handling machine system 80; Data collecting card 40 with the FPGA that collects to the time data send to data handling machine system 80, get into step F.
In step F, data handling machine system 80 respectively from data collecting card 40 and bus communication card 70 receive FPGA to the time data and image to the time information; The per FPGA that will newly receive in 20 seconds of data handling machine system to the time data and image to the time information write once to hard disk; Write at every turn form new FPGA to the time data file and image to the time message file; Data processing software read in per 10 seconds up-to-date FPGA to the time data file and image to the time message file; Movement images to the time information and FPGA to the time data in the corresponding value and microsecond value poor second of same lines/frame number; Obtain the corresponding camera time synchronization error of this row, show in real time and be recorded in the hard disk.
This embodiment is in photographic process; The FPGA that data handling machine system 80 will newly receive at set intervals to the time data and image to the time information write once to hard disk; Write at every turn form new FPGA to the time data file and image to the time message file; Data processing software regularly read up-to-date FPGA to the time data file and image to the time message file, through relatively calculating the camera time synchronization error of corresponding row, show in real time and be recorded in the hard disk.FPGA to the time data file and image to the time message file the reading frequency twice that is at least write frequency guarantee not skip data.
In the present invention; For the real-time measurement of timing tracking accuracy in the course of the work of implementation space tridimensional mapping camera; At first with pulse per second (PPS) and row/frame synchronizing signal adapter unit pulse per second (PPS) and row/frame synchronizing signal are divided into two through pulse per second (PPS) and row/frame synchronizing signal input cable 10; The pulse per second (PPS) of leading up to is given machine controller mutually with row/frame synchronizing signal output cable, guarantees space multistory mapping camera operate as normal, another road give FPGA to the time unit with produce FPGA to the time data.Since FPGA to the time unit adopt the high stability crystal oscillator as the clock source; Receive only pulse per second (PPS) and row/frame synchronizing signal; The edge that detects line synchronizing signal and GPS pps pulse per second signal with the mode of pure hardware time order circuit produce to the time data; Can not cause owing to the influence of other tasks to the time, punctual and time spent process introduces time synchronization error; Do not have software to get the time synchronization error that finger, decoding etc. bring yet, compare, have much higher timing tracking accuracy and stability with the phase machine controller that will accomplish complex tasks such as image drift calculating simultaneously in implementation.
Since FPGA to the time unit time synchronization error very little and constant basically; Can utilize logic analyser etc. to demarcate; Through demarcation the back with FPGA to the time data be benchmark, relatively the image that produces of phase machine controller to the time information and FPGA to the time data in mistiming of same lines/frame number can obtain the camera time synchronization error.
Since camera timing tracking accuracy final body insert now in the image auxiliary data image to the time information on; And each row/two field picture auxiliary data is sent to number biography interface together with this row/frame image data; Because view data is more much bigger than the data volume of image auxiliary data; If from number pass interfaces through look computing machine soon and receive and extract the image auxiliary data image to the time information; Require a great deal of time and from mass image data, isolate image auxiliary data, so extract image to the time information, be difficult to satisfy the requirement of real-time.Since the phase machine controller produce image to the time send to image-generating unit through internal bus after the information; In the present invention through bus monitoring cable and bus communication card directly receive on the bus internally image to the time information, can significantly reduce divide image data and extraction image to the time information time.
Dozens of minutes even several hrs because the space multistory mapping camera possibly photographed when conventional instruments such as adopting logic analyser or oscillograph comes the Measuring Time synchronization accuracy, because storage depth is not enough, are difficult to detect for a long time with high SF.In the present invention since image to the time information and as the FPGA of comparison benchmark to the time data all be stored in the hard disk, can measure for a long time under the constant situation of measuring accuracy keeping.Hard disk with clearance spaces 200G is an example, can keep under the constant situation of measuring accuracy continuous coverage thousands of hours.
Since data processing software from hard disk, read with the document form image stored to the time information and FPGA to the time data; If image to the time information and FPGA to the time data with the stored in form of single file; Growth along with the camera shooting time; The size of file constantly increases, can cause image to the time information and FPGA to the time data the time of reading and searching for, comparing constantly increase, be difficult to realize the real-time calculating and the demonstration of camera time synchronization error.In the present invention regularly with up-to-date image to the time information and FPGA to the time data write hard disk, form a new file at every turn, the size of file is fixed and is very little, makes data processing software can compare calculating apace.In order to guarantee not skip data, in the present invention FPGA to the time data file and image to the time message file reading frequency be at least the twice of write frequency.
The present invention can be used for the test of camera timing tracking accuracy under the whole starlike attitude, and pulse per second (PPS) at this moment and row/frame synchronizing signal input cable 10 receives the GPS pps pulse per second signal that the GPS receiver sends on the satellite.The test of camera timing tracking accuracy when the present invention also can be used for having only the camera subsystem, pulse per second (PPS) at this moment and row/frame synchronizing signal input cable 10 receives the GPS pps pulse per second signal that ground test sends with the GPS emulator.
As stated, to one skilled in the art, do not break away from itself on the basis of the principle of the invention, can carry out various changes and modification on form and the details to this embodiment, these changes and modification are all confirmed as within the scope of the present invention.
Claims (7)
1. the omnidistance real-time detecting system of a space multistory mapping camera timing tracking accuracy, this system comprise pulse per second (PPS) and row/frame synchronizing signal input cable (10), pulse per second (PPS) and row/frame synchronizing signal adapter unit (20), pulse per second (PPS) and row/frame synchronizing signal output cable (50), FPGA to the time unit (30), data collecting card (40), bus monitoring cable (60), bus communication card (70) and data handling machine system (80); It is characterized in that,
Said pulse per second (PPS) is connected with row/frame synchronizing signal adapter unit (20) with pulse per second (PPS) with row/frame synchronizing signal input cable (10); Said pulse per second (PPS) and row/frame synchronizing signal adapter unit (20) receives the GPS pps pulse per second signal and the row/frame synchronizing signal of pulse per second (PPS) and row/frame synchronizing signal input cable (10) input; And GPS pps pulse per second signal and row/frame synchronizing signal be divided into two-way; One road GPS pps pulse per second signal and row/frame synchronizing signal deliver to FPGA to the time unit (30), another road GPS pps pulse per second signal and row/frame synchronizing signal are delivered to pulse per second (PPS) and row/frame synchronizing signal output cable (50); Said pulse per second (PPS) and row/frame synchronizing signal output cable (50) is sent to space multistory mapping camera controller with GPS pps pulse per second signal and row/frame synchronizing signal;
Said FPGA to the time unit (30) be connected with data collecting card (40); FPGA to the time unit (30) form by level transferring chip (31), FPGA (32) and high stability crystal oscillator (33), level transferring chip (31) converts GPS pps pulse per second signal and row/frame synchronizing signal into the Transistor-Transistor Logic level signal; Said FPGA (32) receives the clock signal of Transistor-Transistor Logic level signal and high stability crystal oscillator (33) generation; FPGA (32) according to the GPS pps pulse per second signal, OK/frame synchronizing signal and clock signal produce FPGA to the time data; Every row produce one group of FPGA to the time data send trigger pip with data, said FPGA to the time unit (30) with FPGA to the time data and data transmission trigger pip be sent to data collecting card (40);
Said data collecting card (40) receive FPGA to the time FPGA that sends of unit (30) to the time data and data transmission trigger pip, and be sent to data handling machine system (80);
Said bus monitoring cable (60) is connected on the communication bus between space multistory mapping camera image-generating unit and the space multistory mapping camera controller; Bus monitoring cable (60) receive image that space multistory mapping camera controller sends to space multistory mapping camera image-generating unit to the time information, and be sent to bus communication card (70);
Said bus communication card (70) receive image that bus monitoring cable (60) transmits to the time information, and with the image that receives to the time information be sent to data handling machine system (80);
Said data handling machine system (80) is connected with data collecting card (40) and bus communication card (70); Data handling machine system (80) is made up of data handling machine, Data Receiving storing software and data processing software, said data handling machine and Data Receiving storing software receive FPGA that data collecting card (40) transmits to the time data and bus communication card (70) transmission image to the time information with the stored in form of file on hard disk; Said data processing software from hard disk reading images to the time information and FPGA to the time data, calculate the corresponding camera time synchronization error of each row, and with the outcome record that obtains in hard disk, and show in real time with the form of curve.
2. the omnidistance real-time detecting system of space multistory mapping camera timing tracking accuracy according to claim 1; It is characterized in that; Said pulse per second (PPS) and row/frame synchronizing signal input cable (10) receives the GPS pps pulse per second signal of GPS receiver transmission on the satellite or the GPS pps pulse per second signal that ground test sends with the GPS emulator, and the GPS pps pulse per second signal that receives is sent to pulse per second (PPS) and row/frame synchronizing signal adapter unit (20).
3. the omnidistance real-time detecting system of space multistory mapping camera timing tracking accuracy according to claim 1; It is characterized in that; Said pulse per second (PPS) and row/frame synchronizing signal input cable (10) and pulse per second (PPS) and row/frame synchronizing signal output cable (50) transmit except that GPS pps pulse per second signal and line period signal, clock signal and reset signal row/frame synchronizing signal, and directly export space multistory mapping camera controller to through pulse per second (PPS) and row/frame synchronizing signal adapter unit (20) and pulse per second (PPS) and row/frame synchronizing signal output cable (50).
4. the omnidistance real-time detecting system of space multistory mapping camera timing tracking accuracy according to claim 1; It is characterized in that; Said pulse per second (PPS) and row/frame synchronizing signal input cable (10) is made up of GPS pulse per second (PPS) cable and row/frame synchronizing signal cable, the GPS pps pulse per second signal that GPS receiver or ground test send with the GPS emulator on the said GPS pulse per second (PPS) cable transmission satellite; OK/the frame synchronizing signal cable receives row/frame synchronizing signal that space multistory mapping camera image-generating unit sends.
5. the omnidistance real-time detecting system of space multistory mapping camera timing tracking accuracy according to claim 1; It is characterized in that; Said data collecting card (40) is installed in the host slot of data handling machine, and bus communication card (70) is installed in the host slot of data handling machine or is connected on the USB mouth of data handling machine.
6. the omnidistance real-time detection method of space multistory mapping camera timing tracking accuracy is characterized in that this method is realized by following steps:
GPS pulse per second (PPS) stube cable between steps A, disconnection GPS receiver or GPS emulator and the space multistory mapping camera controller breaks off the cable that comprises row/frame synchronizing signal between space multistory mapping image-generating unit and the space multistory mapping camera controller; The input end of pulse per second (PPS) and row/frame synchronizing signal input cable (10) is connected in the GPS pulse per second (PPS) output interface of GPS receiver or GPS emulator and the row/frame synchronizing signal output interface of space multistory mapping image-generating unit; The output terminal of pulse per second (PPS) and row/frame synchronizing signal input cable (10) is connected on pulse per second (PPS) and the row/frame synchronizing signal adapter unit (20); The input end of pulse per second (PPS) and row/frame synchronizing signal output cable (50) is connected on pulse per second (PPS) and the row/frame synchronizing signal adapter unit (20); The output terminal of pulse per second (PPS) and row/frame synchronizing signal output cable (50) is connected in the pulse per second (PPS) and row/frame synchronizing signal input interface of space multistory mapping camera controller, gets into step B;
Step B, to FPGA to the time unit (30) reset; Be provided with GPS receiver or GPS emulator send to space multistory mapping camera controller the time scale value with to send to pulse per second (PPS) corresponding one by one with the pulse per second (PPS) number of row/frame synchronizing signal adapter unit (20); Then GPS receiver or GPS emulator begin to send the GPS pulse per second (PPS) and the time scale value, get into step C;
Step C, pulse per second (PPS) and row/frame synchronizing signal adapter unit (20) is divided into two-way with GPS pps pulse per second signal and row/frame synchronizing signal; Will be wherein one road GPS pps pulse per second signal and row/frame synchronizing signal deliver to FPGA to the time unit (30); Another road GPS pps pulse per second signal and row/frame synchronizing signal are delivered to space multistory mapping camera controller through pulse per second (PPS) and row/frame synchronizing signal output cable (50), get into step D;
Step D, FPGA to the time unit (30) at three counters of FPGA (32) internal structure; OK/the frame synchronization counter produces row/frame number to the negative edge of row/frame synchronizing signal counting; Second, counter was worth the second of the negative edge counting generation system time of GPS pulse per second (PPS), and the microsecond counter counts to get the microsecond value of system time to the rising edge of clock signal of high stability crystal oscillator (33) generation; The initial value that second Counter Value and microsecond Counter Value are set when system reset is 0, and the initial value that row/frame synchronization counter is set is 1; At the negative edge of GPS pulse per second (PPS) to the zero clearing of microsecond Counter Value, accomplish to the time; With the rising edge of row/frame synchronizing signal row/frame synchronization Counter Value, second Counter Value and microsecond Counter Value are latched, produce one group of FPGA that forms by corresponding second value of row/frame number, this row/frame and microsecond value to the time data; With FPGA to the time data and row/frame synchronizing signal postpone the back and generate data and send trigger pip and be sent to data collecting card (40), get into step e;
Step e, bus communication card (70) through bus monitoring cable (60) receive image that the phase machine controller sends to space multistory mapping camera image-generating unit to the time information, send to data handling machine system (80); Data collecting card (40) with the FPGA that collects to the time data send to data handling machine system (80), get into step F;
Step F, data handling machine system (80) receive FPGA that data collecting card (40) transmits to the time data and with the stored in form of file on hard disk, receive simultaneously image that bus communication card (70) transmits to the time information and with the stored in form of file on hard disk; Data processing software from hard disk reading images to the time information and FPGA to the time data; Movement images to the time information and FPGA to the time data in the corresponding value and microsecond value poor second of same lines/frame number; Obtain the corresponding camera time synchronization error of this row; Camera time synchronization error data are recorded in the hard disk, and show with the form of curve.
7. the omnidistance real-time detection method of space multistory mapping camera timing tracking accuracy according to claim 6; It is characterized in that; In photographic process; The FPGA that data handling machine system (80) will newly receive at set intervals to the time data and image to the time information write once to hard disk, write at every turn form new FPGA to the time data file and image to the time message file, data processing software regularly read up-to-date FPGA to the time data file and image to the time message file; Through relatively calculating the camera time synchronization error of corresponding row, show in real time and be recorded in the hard disk; FPGA to the time data file and image to the time message file reading frequency be the twice of write frequency.
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