CN102695305A - Base band unit and data transmission method thereof, and base station - Google Patents

Base band unit and data transmission method thereof, and base station Download PDF

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Publication number
CN102695305A
CN102695305A CN2011100726378A CN201110072637A CN102695305A CN 102695305 A CN102695305 A CN 102695305A CN 2011100726378 A CN2011100726378 A CN 2011100726378A CN 201110072637 A CN201110072637 A CN 201110072637A CN 102695305 A CN102695305 A CN 102695305A
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China
Prior art keywords
ethernet
processing unit
base station
data
bbu
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Granted
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CN2011100726378A
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Chinese (zh)
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CN102695305B (en
Inventor
贺胜洪
张建新
钟爽莉
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ZTE Corp
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ZTE Corp
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Priority to CN201110072637.8A priority Critical patent/CN102695305B/en
Priority to PCT/CN2012/072728 priority patent/WO2012126370A1/en
Publication of CN102695305A publication Critical patent/CN102695305A/en
Application granted granted Critical
Publication of CN102695305B publication Critical patent/CN102695305B/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W88/00Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H04W88/08Access point devices

Abstract

The invention provides a base band unit (BBU) and a data transmission method thereof, and a base station. The BBU data transmission method comprises the following steps that: a peripheral circuit on a BBU carries out parsing and reorganization on Ethernet data that are needed to be uploaded to a radio network controller (RNC) and uploads the processed data to the RNC; or the peripheral circuit parses and reorganizes Ethernet data from the RNC and sends the processed data to an Ethernet data processing unit corresponding to the Ethernet data. According to the invention, the function of RNC Ethernet transmission interface processing by a center processing unit (CPU) on a clock master single board is extended and thus the processing is carried out by a peripheral circuit outside the CPU, thereby effectively ensuring that there is no bottleneck in the interference processing function of Ethernet transmission between a base station BBU and an RNC and that transmission of Ethernet transmission data can be carried out smoothly and further obviously improving performances of the BBU and even the whole base station.

Description

Baseband processing unit, base station and data transmission method
Technical field
The present invention relates to the communications field, in particular to a kind of baseband processing unit, base station and data transmission method.
Background technology
Evolution along with the mobile communication base station technical standard; All-IP (Internet Protocol; Procotol) the change base station is ready to appear, and IPv4 is to the acceleration evolution of IPv6, BBU of base station (Base Band Unit; Baseband processing unit) and the importance of the Ethernet transmission means between the RNC (Radio Network Controller, radio network controller) brought up to a new height.Simultaneously also the Ethernet transmission means between BBU of base station and the RNC has been proposed new problem: according to compact communication base station of new generation: green, environmental protection, energy-conservation, standard that spatial volume is little, the BBU side is a veneer with 2 types usually: clock master control veneer and Base-Band Processing veneer are realized the optimization of standard.The BBU side is handled at the clock master control veneer the Ethernet coffret of RNC and is realized, that is to say that the clock master control veneer should be taken on the function of transmitting veneer; The function that also will take on interface single plate; Three plate functional unifications (clock master control veneer, transmission veneer, interface single plate); On the clock master control veneer, be easy to cause CPU (Center Processing Unit, central processing unit) performance bottleneck like this.In this case, how to make the Ethernet coffret function of BBU of base station not have bottleneck, realize that Ethernet transmission data are unblocked? Effective solution is not proposed at present as yet.
Summary of the invention
Main purpose of the present invention is to provide the data transmission method of a kind of baseband processing unit, base station and baseband processing unit, to solve the Ethernet data transmission bottleneck problem of above-mentioned baseband processing unit at least.
According to an aspect of the present invention, a kind of baseband processing unit is provided, has comprised: CPU and peripheral circuit, wherein, peripheral circuit is used to realize the Ethernet data transmission process between baseband processing unit and the radio network controller.
Further, peripheral circuit comprises: transceiver module, and the Ethernet data that is used between baseband processing unit and the radio network controller is mutual; Resolve and recombination module, be used for the Ethernet data of reciprocal process is resolved and recombinated.
Further, parsing and recombination module comprise: updating submodule is used for the renewal of IP address, MAC (Medium Access Control, media interviews control) address and the CRC of Ethernet data.
Further, peripheral circuit is positioned on the clock master control veneer of baseband processing unit.
Further, peripheral circuit is FPGA (Field Programmable Gate Array, a field programmable gate array).
According to a further aspect in the invention, a kind of base station is provided, has comprised: the baseband processing unit that preamble is described.
According to a further aspect of the invention; A kind of data transmission method of baseband processing unit is provided; Comprise: the Ethernet data that the peripheral circuit on the baseband processing unit is uploaded to radio network controller to need is resolved and is recombinated, and is uploaded to radio network controller; Perhaps peripheral circuit is to resolving from the Ethernet data of radio network controller and recombinate, and is sent to the Ethernet data processing unit corresponding with Ethernet data.
Further, Ethernet data is resolved and reorganization comprises: IP address, MAC Address and CRC to Ethernet data upgrade.
Further, peripheral circuit is positioned on the clock master control veneer of baseband processing unit.
Further, peripheral circuit is FPGA.
In the present invention; Through CPU on the clock master control veneer is come out to the Ethernet coffret processing capacity extension of RNC; The peripheral circuit of transferring to outside the CPU is handled; Can guarantee effectively that there is not bottleneck in the Ethernet coffret function between BBU of base station and the RNC, guarantee the unblocked of Ethernet transmission transfer of data, and then significantly promote the performance of BBU of base station and even whole base station.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 is connected sketch map according to the BBU of base station of correlation technique with Ethernet coffret between the RNC;
Fig. 2 is the BBU of base station structural representation according to the embodiment of the invention one;
To be the BBU of base station shown in the embodiment one be connected sketch map with Ethernet coffret between the RNC to Fig. 3;
Fig. 4 is the BBU of base station upstream data process chart according to the embodiment of the invention two;
Fig. 5 is the BBU of base station downlink data process chart according to the embodiment of the invention two;
Fig. 6 is connected sketch map according to the BBU of base station shown in the embodiment of the invention three with Ethernet coffret between the RNC;
Fig. 7 is the BBU of base station upstream data process chart according to the embodiment of the invention three;
Fig. 8 is the BBU of base station downlink data process chart according to the embodiment of the invention three;
Fig. 9 is the architecture of base station sketch map according to the embodiment of the invention four.
Embodiment
Hereinafter will and combine embodiment to specify the present invention with reference to accompanying drawing.Need to prove that under the situation of not conflicting, embodiment and the characteristic among the embodiment among the application can make up each other.
Fig. 1 is connected sketch map according to the BBU of base station of correlation technique with Ethernet coffret between the RNC, and is as shown in Figure 1, carries out the transmission of Ethernet data through Ethernet interface between baseband processing unit 100 and the radio network controller 200.Wherein, baseband processing unit 100 comprises the CPU120 of relevant BBU of base station Ethernet data processing unit 110 and clock master control veneer.
According to the conventional method; The BBU of base station side is to realize at the CPU of control centre of clock master control veneer to the Ethernet coffret function treatment of RNC; Therefore; The Ethernet data that BBU of base station Ethernet data processing unit needs to be uploaded to RNC sends to clock master control veneer CPU earlier and handles, and the Ethernet data after clock master control veneer CPU will handle then is uploaded to RNC through Ethernet interface.Equally, the Ethernet data of the RNC that comes just can be sent to relevant BBU of base station Ethernet data processing unit after also need handling through the CPU of oversampling clock master control veneer.
But the CPU of clock master control veneer not only will realize the Ethernet coffret function of BBU of base station to RNC; Also want the business datum of the inner big flow of treatments B BU, and control between inner control information of processing clock master control veneer and single board of BBU of base station, signaling message.So just be easy to cause cpu performance load bottleneck on the clock master control veneer.
Embodiment one
Fig. 2 is BBU of base station 100 structural representations according to the embodiment of the invention one.As shown in Figure 2, comprising: CPU 120 and peripheral circuit 130.Wherein, peripheral circuit 130 is used to realize the Ethernet data transmission process between baseband processing unit and the radio network controller.CPU 120 is positioned on the clock master control veneer, and except that the Ethernet coffret processing capacity of not bearing RNC, all the other functions are identical with existing clock master control veneer cpu function.
In above-mentioned BBU of base station; Through CPU on the clock master control veneer is come out to the Ethernet coffret processing capacity extension of RNC; The peripheral circuit of transferring to outside the CPU is handled, and can guarantee effectively that there is not bottleneck in the Ethernet coffret function between BBU of base station and the RNC.
Wherein, Peripheral circuit can be realized with the FPGA on the clock master control veneer; FPGA on the clock master control veneer needs the Ethernet transmission data that receive are carried out Ethernet transmission data parsing and reorganization; Comprise IP address and the MAC Address replacement of carrying out Ethernet data, the renewal of CRC (Cyclic Redundancy Check, CRC) sign indicating number waits operation.
Fig. 3 be shown in the embodiment one BBU of base station 100 be connected sketch map with Ethernet coffret between the RNC 200.As shown in Figure 3, baseband processing unit 100 comprises the peripheral circuit 130 outside the CPU.This peripheral circuit 130 is used to handle the Ethernet transmission data transmission interface function of BBU of base station side to RNC.
Embodiment two
Embodiment two describes the Ethernet data transmitting method flow process between BBU of base station and RNC in detail.May further comprise the steps:
The Ethernet data that peripheral circuit on the baseband processing unit is uploaded to radio network controller to need is resolved and is recombinated, and is uploaded to radio network controller; Perhaps peripheral circuit is to resolving from the Ethernet data of radio network controller and recombinate, and is sent to the Ethernet data processing unit corresponding with Ethernet data.
Do specific descriptions below in conjunction with accompanying drawing 4 and 5 pairs of above-mentioned steps of accompanying drawing.
As shown in Figure 4, the BBU of base station side may further comprise the steps the Ethernet data uplink of RNC:
Step S402, the peripheral circuit outside the CPU receives the Ethernet data that need be uploaded to RNC from BBU of base station Ethernet data processing unit.
Step S404, peripheral circuit is resolved the Ethernet data that receives and is recombinated, and purpose is to let Ethernet data can accurately route to relevant RNC.
Step S406, peripheral circuit is uploaded to RNC to the Ethernet data after recombinating through the Ethernet coffret, so that RNC does subsequent treatment to Ethernet data.
As shown in Figure 5, RNC may further comprise the steps the Ethernet data downlink transfer of BBU of base station side:
Step S502, the Ethernet data of RNC sends to peripheral circuit through the Ethernet coffret.By traditional method; The Ethernet data that RNC will pass to BBU of base station Ethernet data processing unit down will send to clock master control veneer CPU processing earlier, and the peripheral circuit that the Ethernet data that present RNC will pass to BBU of base station Ethernet data processing unit down sends to earlier outside the clock master control veneer CPU is handled.
Step S504; After peripheral circuit receives the Ethernet data from RNC; Carry out Ethernet data and resolve, Ethernet data is recombinated, the purpose of Ethernet data reorganization is to let the Ethernet data of RNC can accurately route to the relevant Ethernet data processing unit of BBU of base station.
Step S606, peripheral circuit sends the Ethernet data after recombinating to BBU of base station relevant Ethernet data processing unit, and the Ethernet data processing unit is done subsequent treatment again.
Embodiment three
Fig. 6 is connected sketch map according to the BBU of base station shown in the embodiment of the invention three with Ethernet coffret between the RNC.Related base station is the improvement on existing T100 type compact base station among the embodiment three.
Existing T100 type BBU of base station basic comprising comprises: T100 type clock master control veneer, T100 type Base-Band Processing veneer.The improvements of embodiment three are: Ethernet coffret processing capacity is realized by the FPGA on the T100 type clock master control veneer on the BBU of base station.
As shown in Figure 7, the FPGA on the clock master control veneer realizes the Ethernet transmission data uplink interface function of T100 type BBU of base station side to RNC, comprises following steps:
Step S702, T100 type BBU of base station Ethernet data processing unit sends to the FPGA on the clock master control veneer with the Ethernet transmission data that needs are uploaded to RNC.For the purpose of BBU unified management and intranet and extranet isolation and safety; RNC is sightless on the ethernet network for other Ethernet data processing units the FPGA of BBU of base station on the clock master control veneer; The Ethernet transmission data that Ethernet data processing unit the FPGA of BBU of base station on the clock master control veneer sends can only send the FPGA on the clock master control veneer to, and can not directly send RNC to.According to the conventional method, the BBU of base station Ethernet data processing unit Ethernet transmission data that will be uploaded to RNC send to clock master control veneer CPU earlier and handle.By apparatus of the present invention, the Ethernet transmission data that present T100 type BBU of base station Ethernet data processing unit will be uploaded to RNC send to the FPGA processing on the clock master control veneer earlier.
Step S704, the FPGA on the clock master control veneer receive the Ethernet transmission data that need be uploaded to RNC from other Ethernet data processing units of T100 type BBU of base station.As previously mentioned; RNC is invisible on the ethernet network for other Ethernet data processing units the FPGA of BBU of base station on the clock master control veneer; Purpose IP address and target MAC (Media Access Control) address that other Ethernet data processing units of BBU of base station need be uploaded to Ethernet transmits data packets in the Ethernet transmission data of RNC are IP address and the MAC Address of the FPGA on the clock master control veneer, so the FPGA on the clock master control veneer needs to carry out Ethernet to the Ethernet transmission data that receive and transmits data parsing; Ethernet transmission data are recombinated; Comprise the IP address of carrying out Ethernet data, MAC Address replacement, operations such as CRC sign indicating number renewal.Be reassembled as the Ethernet transmission data that to discern RNC, thereby let the Ethernet transmission data after recombinating accurately to route to relevant RNC.
Step S706, RNC receive the Ethernet transmission data that BBU sends over.FPGA on the clock master control veneer sends the Ethernet transmission data after recombinating through the Ethernet coffret; As previously mentioned; Ethernet after the reorganization is route RNC accurately, so RNC can correctly receive the Ethernet transmission data through reorganization that the FPGA on the clock master control veneer sends over.Relevant RNC does subsequent treatment to Ethernet transmission data again.
As shown in Figure 8, the FPGA on the clock master control veneer realizes the Ethernet transmission data downstream interface function of T100 type BBU of base station side to RNC, comprises following steps:
Step S802, RNC send downlink Ethernet transmission data.As previously mentioned; For the purpose of BBU unified management and intranet and extranet isolation and safety; Other Ethernet data processing units the FPGA of BBU of base station on the clock master control veneer are to be invisible on the ethernet network to RNC; So the downlink Ethernet that RNC sends transmission data can not directly be sent to other Ethernet data processing units on the BBU of base station, the Ethernet transmission data of RNC can only send to the FPGA on the clock master control veneer through the Ethernet coffret.By traditional method; The Ethernet transmission data that base station RNC will pass to BBU of base station Ethernet data processing unit down will send to clock master control veneer CPU processing earlier; By apparatus of the present invention, the Ethernet transmission data that present RNC will pass to the Ethernet data processing unit the FPGA of BBU of base station on the clock master control veneer down send to the FPGA processing on the clock master control veneer earlier.
Step S804, clock master control veneer FPGA receive the Ethernet transmission data from RNC.Of preamble; For the purpose of BBU unified management and intranet and extranet isolation and safety; Other Ethernet data processing units the FPGA of BBU of base station on the clock master control veneer are invisible on the ethernet network to RNC, and the Ethernet that RNC is handed down to clock master control veneer FPGA transmits the purpose IP of Ethernet transmits data packets in the data and IP and the MAC Address that purpose MAC is the FPGA on the clock master control veneer.So clock master control veneer FPGA need carry out Ethernet transmission data parsing after receiving the Ethernet transmission data from RNC, and Ethernet transmission data are recombinated, and comprises the IP that carries out Ethernet data, MAC replacement, operations such as CRC sign indicating number renewal.Be reassembled as the Ethernet transmission data that to discern other Ethernet data processing units of BBU of base station, thereby let the Ethernet transmission data after recombinating accurately to route to other relevant Ethernet data processing units of BBU of base station.
Step S806, the Ethernet transmission data that the relevant Ethernet data processing unit receive clock master control veneer FPGA of BBU of base station sends over.As previously mentioned; Ethernet after the reorganization is other relevant Ethernet data processing units of route BBU of base station accurately, so other relevant Ethernet data processing units of BBU of base station can correctly receive the Ethernet transmission data through reorganization that the FPGA on the clock master control veneer sends over.The relevant Ethernet data processing unit of BBU of base station is done subsequent treatment again.
Embodiment four
Fig. 9 is the architecture of base station sketch map according to the embodiment of the invention four, and is as shown in Figure 9, and this base station and base station of the prior art difference are: this BBU of base station is the described BBU of base station 100 that has peripheral circuit of preamble.
In the above embodiment of the present invention; Through CPU on the clock master control veneer is come out to the Ethernet coffret processing capacity extension of RNC; The peripheral circuit of transferring to outside the CPU is handled; Can guarantee effectively that there is not bottleneck in the Ethernet coffret function between BBU of base station and the RNC, guarantee the unblocked of Ethernet transmission transfer of data, and then significantly promote the performance of BBU of base station and even whole base station.
Obviously, it is apparent to those skilled in the art that above-mentioned each module of the present invention or each step can realize with the general calculation device; They can concentrate on the single calculation element; Perhaps be distributed on the network that a plurality of calculation element forms, alternatively, they can be realized with the executable program code of calculation element; Thereby; Can they be stored in the storage device and carry out, and in some cases, can carry out step shown or that describe with the order that is different from here by calculation element; Perhaps they are made into each integrated circuit modules respectively, perhaps a plurality of modules in them or step are made into the single integrated circuit module and realize.Like this, the present invention is not restricted to any specific hardware and software combination.
The above is merely the preferred embodiments of the present invention, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (10)

1. a baseband processing unit is characterized in that, comprising:
CPU;
Peripheral circuit is used to realize the Ethernet data transmission process between said baseband processing unit and the radio network controller.
2. baseband processing unit according to claim 1 is characterized in that, said peripheral circuit comprises:
Transceiver module, the Ethernet data that is used between said baseband processing unit and the said radio network controller is mutual;
Resolve and recombination module, be used for the said Ethernet data of reciprocal process is resolved and recombinated.
3. baseband processing unit according to claim 2 is characterized in that, said parsing and recombination module comprise:
Updating submodule is used for the renewal of IP address, MAC Address and the CRC of Ethernet data.
4. according to each described baseband processing unit of claim 1 to 3, it is characterized in that said peripheral circuit is positioned on the clock master control veneer of said baseband processing unit.
5. baseband processing unit according to claim 4 is characterized in that, said peripheral circuit is an on-site programmable gate array FPGA.
6. a base station is characterized in that, comprising: each described baseband processing unit of claim 1 to 5.
7. the data transmission method of a baseband processing unit is characterized in that, comprising:
The Ethernet data that peripheral circuit on the baseband processing unit is uploaded to radio network controller to need is resolved and is recombinated, and is uploaded to said radio network controller;
Perhaps said peripheral circuit is to resolving from the Ethernet data of said radio network controller and recombinate, and is sent to the Ethernet data processing unit corresponding with said Ethernet data.
8. data transmission method according to claim 7 is characterized in that, Ethernet data is resolved and reorganization comprises:
IP address, MAC Address and CRC to Ethernet data upgrade.
9. according to claim 7 or 8 described data transmission methods, it is characterized in that said peripheral circuit is positioned on the clock master control veneer of said baseband processing unit.
10. data transmission method according to claim 9 is characterized in that, said peripheral circuit is an on-site programmable gate array FPGA.
CN201110072637.8A 2011-03-23 2011-03-23 baseband processing unit, base station and data transmission method Expired - Fee Related CN102695305B (en)

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PCT/CN2012/072728 WO2012126370A1 (en) 2011-03-23 2012-03-21 Baseband processing unit, base station and data transmission method

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106376024A (en) * 2015-07-22 2017-02-01 中兴通讯股份有限公司 Large-capacity baseband processing apparatus

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JPS61285559A (en) * 1985-06-12 1986-12-16 Nec Corp Battery back-up device
CN101064643A (en) * 2007-04-19 2007-10-31 中兴通讯股份有限公司 Method for updating software of remote terminal RF unit in wireless communication system
CN101695045A (en) * 2009-09-27 2010-04-14 中兴通讯股份有限公司 Method and device for realizing Ethernet messaging
WO2010148720A1 (en) * 2009-11-24 2010-12-29 中兴通讯股份有限公司 Networking system for indoor coverage of time division duplex synchronous system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61285559A (en) * 1985-06-12 1986-12-16 Nec Corp Battery back-up device
CN101064643A (en) * 2007-04-19 2007-10-31 中兴通讯股份有限公司 Method for updating software of remote terminal RF unit in wireless communication system
CN101695045A (en) * 2009-09-27 2010-04-14 中兴通讯股份有限公司 Method and device for realizing Ethernet messaging
WO2010148720A1 (en) * 2009-11-24 2010-12-29 中兴通讯股份有限公司 Networking system for indoor coverage of time division duplex synchronous system

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106376024A (en) * 2015-07-22 2017-02-01 中兴通讯股份有限公司 Large-capacity baseband processing apparatus

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