CN102694798A

CN102694798A - Method for high-speed serial interconnection based on Hash mapping table

Info

Publication number: CN102694798A
Application number: CN2012101492339A
Authority: CN
Inventors: 秦济龙
Original assignee: Inspur Electronic Information Industry Co Ltd
Current assignee: Inspur Electronic Information Industry Co Ltd
Priority date: 2012-05-15
Filing date: 2012-05-15
Publication date: 2012-09-26

Abstract

The invention provides a method for high-speed serial interconnection based on a Hash mapping table. The method comprises the following steps: describing logic by a hardware circuit by a Hash search matching principle, writing the data to be searched into a memory bank, forming a content addressable memory by combining the data and the memory bank; determining data width and data depth of the memory bank according to a port address format and the quantity of internet ports, controlling and reading the data in the HASH list item by the system through a controller after finding out corresponding address through the Hash-Key; comparing the data through a comparator after reading the data in the list item, if the data are matched, outputting the matched address and building a data transmission link.

Description

A kind of based on the interconnected method of the high speed serialization of Hash mapping table

Technical field

The present invention relates to computer server or communication technical field, specifically a kind of based on the interconnected method of the high speed serialization of Hash mapping table.

Background technology

Along with the fast development of high-end server interconnection technique, on the one hand, the data bandwidth that in the internet, transmits is increasing.On the other hand, the continuous change and progress of various application in the internet, present high-end server computing node is very many; They connect through special high speed internet network; Need require the high speed internet network to provide extra treatment mechanism to realize distinguishing various service and function, like server admin node, safe access control node for the user provides more COSs and better service quality; Virtual private nodes etc., interconnected topology is very important key technology.For the increasing development trend of the data traffic that adapts to network; Guarantee the unobstructed property of internet link; High speed internet network performance has been proposed new challenge---how the technological development key network technology of fast mapping route network all relates to this problem; And based on the common inefficiency of the Hash of software mapping coupling, the method that traditional software is realized for the development of express network show unable to do what one wishes.Based on the interconnected chip of high speed serialization of Hash mapping table search matching properties fast, make it in high-end server, can be widely used.

Summary of the invention

The purpose of this invention is to provide a kind of based on the interconnected method of the high speed serialization of Hash mapping table.

The objective of the invention is to realize by following mode, search matching principle through Hash, its logic is described with hardware circuit, data to be looked into are write memory bank, both combine the constitution content addressable memory bank, comprise following functional module:

(1) high-speed serial bus;

(2) Hash offset table;

(3) Hash offset table specific store circuit;

(4) configuration register;

(5) comparator;

(6) controller.

Confirm the data width and the data depth of this memory bank according to the quantity of port address form and interconnect port; Find corresponding to behind the address through Hash_Key; System reads data in the HASH list item through controller control, compares through comparator after reading out the data in the list item, if coupling; Then export match address, set up number and pass link.

Pass through Hash table; Search the port numbers address fast; Or using data offset to represent, the Hash offset table through storage is realized searching interconnect architecture (Interconnection Fabric) based on Hash with coupling together through doubly linked list between the specific address data entries.

Hash table through storage find rapidly with the Hash table in list item be complementary, try to achieve the position of address, or more oppositely obtain interconnect architecture (Interconnection Fabric) the port numbers address of desiring to search through the address fast.

The invention has the beneficial effects as follows: the high efficiency of searching algorithm based on Hash finds out match address fast, and hardware realizes having practiced thrift interconnected time delay.

Description of drawings

Fig. 1 is a high speed serialization interconnected systems structure chart.

Embodiment

Explanation at length below with reference to Figure of description method of the present invention being done.

Of the present inventionly search matching principle through Hash, its logic is described with hardware circuit, data to be looked into write memory bank, and two textural associations become content addressable storage body (Content Addressable Memory).Design is divided into following functional module:

(1) high-speed serial bus;

(2) Hash offset table;

(3) Hash offset table specific store circuit;

(4) configuration register;

(5) comparator;

(6) controller.

Confirm to find the data width and the data depth of this memory bank corresponding to behind the address through Hash_Key according to the quantity of port address form and interconnect port, system reads data in the HASH list item through controller circuitry (6) control.Compare through comparator (5) after reading out the data in the list item, if coupling is then exported match address and accomplished the link establishment of number biography.

Embodiment 1

Pass through Hash table; Search the port numbers address fast; Or using data offset to represent, the Hash offset table through storage is realized searching interconnect architecture (Interconnection Fabric) based on Hash with coupling together through doubly linked list between the specific address data entries;

Embodiment 2

Except that the described technical characterictic of specification, be the known technology of those skilled in the art.

Claims

1. one kind based on the interconnected method of the high speed serialization of Hash mapping table; It is characterized in that searching matching principle, its logic is described with hardware circuit, data to be looked into are write memory bank through Hash; Both combine the constitution content addressable memory bank, comprise following functional module:

(1) high-speed serial bus; (2) Hash offset table; (3) Hash offset table specific store circuit; (4) configuration register; (5) comparator; (6) controller;

2. method according to claim 1; It is characterized in that through Hash table, search the port numbers address fast, or use data offset to represent; Hash offset table through storage is realized searching interconnect architecture based on Hash with coupling together through doubly linked list between the specific address data entries.

3. method according to claim 1, it is characterized in that through storage Hash table find rapidly with the Hash table in list item be complementary, try to achieve the position of address, or more oppositely obtain the interconnect architecture port numbers address of desiring to search through the address fast.