CN102694543A

CN102694543A - Design method and system for space-borne FPGA preventing space environment influence

Info

Publication number: CN102694543A
Application number: CN201210118912XA
Authority: CN
Inventors: 刘波; 史琴; 郭强
Original assignee: Shanghai Institute of Satellite Engineering
Current assignee: Shanghai Institute of Satellite Engineering
Priority date: 2012-04-20
Filing date: 2012-04-20
Publication date: 2012-09-26

Abstract

The invention relates to a design method and a system for space-borne FPGA preventing space environment influence, comprising XIL INX FPGA, ACTEL FPGA and PROM. Sum check is carried out to configuration files by ACTEL FPGA, and configuration files of XIL INX FPGA to ACTEL FPGA by JTAG port are read. Once an error is discovered during the sum check, loading is again carried out to configuration files of XIL INX FPGA that overturning by autonomously control PROM, so that correctness of configuration files in XIL INX FPGA is guarantied. Occurrence of single particle event can be rapidly detected by adopting the method, and influence caused by the single particle event can be lowered to lowest. The design method has been verified in information processor of FY-3satellite data transmission subsystem.

Description

The spaceborne FPGA method for designing and the system of a kind of anti-space environmental impact

Technical field

The present invention relates to a kind of spaceborne FPGA, more particularly, relate to the spaceborne FPGA method for designing and the system of a kind of anti-space environmental impact.

Background technology

China a new generation polar orbiting meteorological satellite wind and cloud is for No. three China's second generation polar orbiting meteorological satellite, is used for realizing global, round-the-clock, three-dimensional, quantitative remote sensing.Number biography system information processor is mainly accomplished a plurality of payload datas of satellite is carried out functions such as formatting, data encryption, scrambling and coding, is one of core unit of satellite.The orbit altitude of satellite is about 830Km, and space environment is comparatively abominable, and especially the influence of single-particle is more outstanding.The message handler function of tonic chord realizes through XILINX FPGA, because the problem of XILINX FPGA production technology, with the influence that receives single-particle inversion inevitably.Adopt the method for designing of the spaceborne FPGA of anti-space environmental impact, effectively solved this design challenges.See that from present satellite actual conditions in orbit this kind reasonable design method, reliable can be avoided the deliver a letter influence of breath processor work of single-particle inversion logarithm.

Along with the raising of meteorological satellite sounding business demand, in the future satellite will carry the load that multipotency is more enough accomplished different detection missions; In addition, along with the development of load technology, load is surveyed and will be realized more high-resolution, more frequency range covering, more highly sensitive technology surveyed more.Logarithm passes system will bring more complicated digital processing; This just needs the higher XILINXFPGA of integrated degree to accomplish corresponding processing; And with regard to present XILINX FPGA production technology, high more its of integrated degree receives the influence of space environment just big more.The present invention will to future polar orbiting meteorological satellite several biography XILINX FPGA of system design reference and design considerations are provided.

Summary of the invention

In order to solve the problem that the polar orbiting meteorological satellite number passes system information processor XILINX FPGA single-particle inversion; The present invention proposes the spaceborne FPGA method for designing and the system of a kind of anti-space environmental impact; Utilize the present invention, can realize the spaceborne FPGA design of anti-space environmental impact easily and reliably.

In order to reach the foregoing invention purpose, the present invention solves the problems of the technologies described above the form that reads that the method for designing that is adopted provides XILINX FPGA configuration file, and configuration file is carried out verification, and from the innovation of master reset controlling Design.

The spaceborne FPGA method for designing of a kind of anti-space of the present invention environmental impact; Be specially: the configuration file that directly reads XILINX FPGA through the JTAG mouth is to ACTELFPGA; ACTEL FPGA carries out configuration file is carried out and verification; In case discovery and verification make mistakes, with regard to Autonomous Control PROM the XILINX FPGA configuration file that upset takes place is loaded again, guarantee the correctness of the configuration file in the XILINX FPGA.

The design system of the spaceborne FPGA of a kind of anti-space of the present invention environmental impact comprises:

XILINX FPGA is used for the operation of the satellite unit function of tonic chord, reads configuration file to ACTEL FPGA through the JTAG mouth;

ACTEL FPGA is used for the configuration file of reading from XILINX FPGA JTAG mouth is carried out and verification, in case discovery and verification make mistakes, just independently sends reseting controling signal to XILINX FPGA;

PROM is used to store the proper configuration file, after XILINX FPGA (1) receives the reseting controling signal that ACTEL FPGA sends, with the proper configuration file load in XILINX FPGA.

The inventive method can fast detecting arrive the generation of single event, and drops to the influence that single event causes minimum.Above-mentioned method for designing is process checking in FY-3 satellite data transmission subsystem message handler.

To sum up, the present invention solves the problem that the polar orbiting meteorological satellite number passes system information processor XILINX FPGA single-particle inversion well, utilizes the present invention, can realize the spaceborne FPGA design of anti-space environmental impact easily and reliably.

Description of drawings

Fig. 1 is the theory diagram of one embodiment of the invention.

Embodiment

Elaborate in the face of embodiments of the invention down, present embodiment is a prerequisite with technical scheme of the present invention, provided detailed execution mode and concrete operating process, but protection scope of the present invention is not limited to following embodiment.The technological means that does not have detailed description in following examples all can adopt prior art or routine techniques to realize.

As shown in Figure 1 is the theory diagram of the spaceborne FPGA design of anti-space environmental impact in one embodiment of the invention.As shown in the figure, wherein: XILINX FPGA 1, ACTEL FPGA2, PROM 3.The configuration file that when design, directly reads XILINX FPGA through the JTAG mouth is to ACTEL FPGA; ACTEL FPGA carries out configuration file is carried out and verification; In case discovery and verification make mistakes, the XILINX FPGA configuration file that upset takes place is loaded again with regard to Autonomous Control PROM.Guarantee the correctness of the configuration file in the XILINX FPGA.

As shown in fig. 1: the spaceborne FPGA design system of anti-space environmental impact in one embodiment of the invention comprises:

XILINX FPGA 1 is used for the operation of the satellite unit function of tonic chord, reads configuration file to ACTEL FPGA through the JTAG mouth.

ACTEL FPGA 2 is used for the configuration file of reading from XILINX FPGA JTAG mouth is carried out and verification, in case discovery and verification make mistakes, just independently sends reseting controling signal to XILINX FPGA 1.

PROM 3, are used to store the proper configuration file, after XILINX FPGA receives the reseting controling signal that ACTEL FPGA sends, with the proper configuration file load in XILINX FPGA.

Can find out from foregoing description; The present invention directly reads XILINX FPGA through the JTAG mouth when design configuration file is to ACTEL FPGA; ACTEL FPGA carries out and verification configuration file; In case discovery and verification make mistakes, with regard to Autonomous Control PROM the XILINX FPGA configuration file that upset takes place is loaded again, guarantee the correctness of the configuration file in the XILINX FPGA.Adopt this method fast detecting to arrive the generation of single event, and drop to the influence that single event causes minimum.Above-mentioned method for designing is process checking in FY-3 satellite data transmission subsystem message handler.

Based on technique scheme, present embodiment solves the problem that the polar orbiting meteorological satellite number passes system information processor XILINX FPGA single-particle inversion well, utilizes the present invention, can realize the spaceborne FPGA design of anti-space environmental impact easily and reliably.

Below only be the detailed description that preferred embodiment of the present invention is carried out, but the present invention is not limited to above embodiment.Obviously, those skilled in the art can carry out various changes and distortion to satellite in orbit fault simulation device of the present invention and not break away from the spirit and scope of the present invention.Like this, if these modifications and distortion belong within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and is out of shape interior.

Claims

1. the spaceborne FPGA method for designing of an anti-space environmental impact; It is characterized in that; Said method directly reads the configuration file of XILINX FPGA (1) to ACTEL FPGA (2) through the JTAG mouth, ACTEL FPGA carries out and verification configuration file, in case discovery and verification make mistakes; With regard to Autonomous Control PROM (3) the XILINX FPGA configuration file that upset takes place is loaded again, guarantee the correctness of the configuration file in the XILINX FPGA.

2. the design system of the spaceborne FPGA of an anti-space environmental impact is characterized in that comprising:

XILINX FPGA (1) is used for the operation of the satellite unit function of tonic chord, reads configuration file to ACTEL FPGA through the JTAG mouth;

ACTEL FPGA (2) is used for the configuration file of reading from XILINX FPGA JTAG mouth is carried out and verification, in case discovery and verification make mistakes, just independently sends reseting controling signal to XILINX FPGA;

PROM (3) is used to store the proper configuration file, after XILINX FPGA (1) receives the reseting controling signal that ACTEL FPGA sends, with the proper configuration file load in XILINX FPGA.