CN102684488A - High-speed level switching circuit used for digital DC (Direct Current)-DC converter - Google Patents
High-speed level switching circuit used for digital DC (Direct Current)-DC converter Download PDFInfo
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- CN102684488A CN102684488A CN2012101579065A CN201210157906A CN102684488A CN 102684488 A CN102684488 A CN 102684488A CN 2012101579065 A CN2012101579065 A CN 2012101579065A CN 201210157906 A CN201210157906 A CN 201210157906A CN 102684488 A CN102684488 A CN 102684488A
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Abstract
The invention discloses a high-speed level switching circuit used for a digital DC (Direct Current)-DC converter. The high-speed level switching circuit is characterized by comprising field effect tubes M1-M8 and a NOT gate circuit, wherein input voltage is reversed by the NOT gate circuit so as to form two opposite voltages, and the two opposite voltages are respectively connected with grid electrodes of the field effect tube M1 and the field effect tube M2, and are reversed by feedback circuits formed by the field effect tubes M3 to M8 to obtain high level voltage. The high-speed level switching circuit has the advantages of high overturning speed and low static loss.
Description
Technical field
The present invention relates to voltage conversion circuit, particularly, relate to a kind of high-speed level change-over circuit that is used for numeric type DC-DC converter.
Background technology
Analog switched power supply all is the main flow of power technique fields for a long time, and its low cost and high performance advantage have obtained client's favor.But in recent years, the demand for development power technology of intelligent terminal is to intellectuality, and integrated development has promoted the development of digital switch power technology.The digital switch power supply can be provided with parameter by on-the-spot reprogramming, can realize different sophisticated functionss through external digital signal, calibrates fairly simplely simultaneously, need not change hardware when changing performance.Just because of these advantages, the digital switch power technology is developed rapidly.
The system configuration of digital switch power supply is as shown in Figure 1, and mainly by controlled stage, power stage and filter constitute; Wherein control section adopts analog to digital converter (ADC) to detect external voltage and current signal; Convert digital signal into, get into microprocessor or DSP and handle, process result is changeed high-tension circuit through low pressure and is converted high-voltage signal into; Through driving stage power controlling pipe, realize voltage transformation function.
Because the digital baseband frequency of system is much larger than the switching frequency of power tube, thus microprocessor work in the high frequency state, this just requires the microprocessor arithmetic speed enough fast.Generally speaking, microprocessor adopts the smaller low pressure process processing procedure of live width, has saved chip area and power consumption, improves arithmetic speed.And outside analog part such as power tube adopt high-pressure process.The result of microprocessor just needs a low pressure to change high-tension circuit like this, through conversion rear drive power switch.
It is as shown in Figure 2 that existing low pressure is changeed high-tension circuit, and wherein M1 ~ M6 is the high pressure FET.Low-voltage signal becomes high-voltage signal through behind this circuit, and the amplitude of high-voltage signal is by Vsg (voltage between grid and the source electrode) decision of M3 and M6.LVIN is the low-voltage signal input, and HVOUT1 and HVOUT2 are the high-voltage signal output, and two signal phases are opposite.But this circuit reversal rate is slow, and its speed depends on the size of tail current Id and the parasitic capacitance of pipe.Because when signal did not overturn, still there was quiescent current in this circuit, has increased the quiescent dissipation of system.
Summary of the invention
The objective of the invention is to,, propose a kind of high-speed level change-over circuit that is used for numeric type DC-DC converter, with the advantage that realizes that reversal rate is fast, quiescent dissipation is low to the problems referred to above.
For realizing above-mentioned purpose, the technical scheme that the present invention adopts is:
A kind of high-speed level change-over circuit that is used for numeric type DC-DC converter comprises FET M1 to M8 and not circuit, and the input LVIN of circuit is connected on the grid of FET M1, and through not circuit be connected FET M2 grid on;
Drain electrode is connected with FET M5 in the drain electrode of FET M7; The drain electrode of said FET M1 is connected on the node A between FET M7 and FET M5; Drain electrode is connected with FET M6 in the drain electrode of FET M8, and the drain electrode of said FET M2 is connected on the Node B between FET M8 and FET M6;
The drain electrode of the source electrode of the grid of the grid of FET M7, FET M3, FET M6 and FET M4 is connected on the output HVOUT2 of circuit;
The drain electrode of the source electrode of the grid of the grid of FET M8, FET M4, FET M5 and FET M3 is connected on the output HVOUT1 of circuit;
The source electrode of the source electrode of the grid of the grid of FET M5, FET M6, FET M3 and FET M4 links together;
The source electrode of the source electrode of FET M7 and FET M8 links together;
The source ground of the source electrode of FET M1 and FET M2.
According to a preferred embodiment of the invention; The maximum voltage that said FET M1 can bear to the drain-source voltage of FET M8 is greater than the upper voltage limit HVDD of high voltage level, and the absolute value that its grid source is withstand voltage is greater than the maximum of the low voltage level of high voltage level (HVDD-LVDD) and input LVIN input.
Technical scheme of the present invention; Through changing the circuit configurations of circuit; Through the FET circuit is that change-over circuit provides reference current, and the conducting through FET and ending, and realizes positive feedback; Realized the quick conversion of circuit input end and output, thereby realized that the voltage reversal rate is fast, quiescent dissipation is zero purpose.
Other features and advantages of the present invention will be set forth in specification subsequently, and, partly from specification, become obvious, perhaps understand through embodiment of the present invention.The object of the invention can be realized through the structure that in the specification of being write, claims and accompanying drawing, is particularly pointed out and obtained with other advantages.
Through accompanying drawing and embodiment, technical scheme of the present invention is done further detailed description below.
Description of drawings
Accompanying drawing is used to provide further understanding of the present invention, and constitutes the part of specification, is used to explain the present invention with embodiments of the invention, is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is the system configuration sketch map of digital switch power supply in the prior art;
Fig. 2 is the electrical circuit diagram of existing level shifting circuit;
Fig. 3 is the electrical circuit diagram that is used for the high-speed level change-over circuit of numeric type DC-DC converter of the present invention;
Fig. 4 is the simulation result that is used for the high-speed level change-over circuit of numeric type DC-DC converter of the present invention.
Embodiment
Below in conjunction with accompanying drawing the preferred embodiments of the present invention are described, should be appreciated that preferred embodiment described herein only is used for explanation and explains the present invention, and be not used in qualification the present invention.
As shown in Figure 3, be used for the high-speed level change-over circuit of numeric type DC-DC converter, the input LVIN of circuit is connected on the grid of FET M1, and through not circuit be connected FET M2 grid on; Drain electrode is connected with FET M5 in the drain electrode of FET M7; The drain electrode of FET M1 is connected on the node A between FET M7 and FET M5; Drain electrode is connected with FET M6 in the drain electrode of FET M8, and the drain electrode of FET M2 is connected on the Node B between FET M8 and FET M6; The drain electrode of the source electrode of the grid of the grid of FET M7, FET M3, FET M6 and FET M4 is connected on the output HVOUT2 of circuit; The drain electrode of the source electrode of the grid of the grid of FET M8, FET M4, FET M5 and FET M3 is connected on the output HVOUT1 of circuit; The source electrode of the source electrode of the grid of the grid of FET M5, FET M6, FET M3 and FET M4 links together; The source electrode of the source electrode of FET M7 and FET M8 links together; The source ground of the source electrode of FET M1 and FET M2.HVDD and LVDD are the bound of high voltage level.LVIN is the input of low voltage level, and HVOUT1 and HVOUT2 are the output of high voltage level, and both signal phases are opposite, and amplitude is HVDD-LVDD.Its circuit simulation structure is as shown in Figure 4, and LVIN is input as 0 ~ 3.3V 1MHz pulse signal, and HVOUT1 and HVOUT2 are high pressure output signal, and signal amplitude is 3.3V ~ 5.5V, and phase place is opposite.Wherein the FET M1 maximum voltage that can bear to the drain-source voltage of FET M8 is greater than the upper voltage limit HVDD of high voltage level, and the absolute value that its grid source is withstand voltage is greater than the maximum of the low voltage level of high voltage level (HVDD-LVDD) and input LVIN input.
Converting 3.3V ~ 5.5V into 0 ~ 3.3V is example, and the operation principle of this circuit is described below:
(1) when LVIN is 0V, the grid terminal voltage of M1 is 0V, and the grid terminal voltage of M2 is 3.3V; Make that the A point voltage is 5.5V, the B point voltage is 0V, and M5 conducting and M6 turn-off; At this moment HVOUT1 is 5.5V, and HVOUT2 is 3.3V, makes M7 conducting and M8 turn-off; Obtaining the A point is 3.3V for 5.5V B point, thereby forms positive feedback, the reversal rate of accelerating circuit.
(2) in like manner, when LVIN was 3.3V, the grid terminal voltage of M1 was 3.3V, and the grid terminal voltage of M2 is 0V; Make that the A point voltage is 0V, the B point voltage is 5.5V, and M6 conducting and M5 turn-off; At this moment HVOUT1 is 3.3V, and HVOUT2 is 5.5V, makes M8 conducting and M7 turn-off; Obtaining the A point is 5.5V for 0V B point, thereby forms positive feedback, the reversal rate of accelerating circuit.
What should explain at last is: the above is merely the preferred embodiments of the present invention; Be not limited to the present invention; Although the present invention has been carried out detailed explanation with reference to previous embodiment; For a person skilled in the art, it still can be made amendment to the technical scheme that aforementioned each embodiment put down in writing, and perhaps part technical characterictic wherein is equal to replacement.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (2)
1. high-speed level change-over circuit that is used for numeric type DC-DC converter; It is characterized in that; Comprise FET M1 to M8 and not circuit, the input LVIN of circuit is connected on the grid of FET M1, and through not circuit be connected FET M2 grid on;
Drain electrode is connected with FET M5 in the drain electrode of FET M7; The drain electrode of said FET M1 is connected on the node A between FET M7 and FET M5; Drain electrode is connected with FET M6 in the drain electrode of FET M8, and the drain electrode of said FET M2 is connected on the Node B between FET M8 and FET M6;
The drain electrode of the source electrode of the grid of the grid of FET M7, FET M3, FET M6 and FET M4 is connected on the output HVOUT2 of circuit;
The drain electrode of the source electrode of the grid of the grid of FET M8, FET M4, FET M5 and FET M3 is connected on the output HVOUT1 of circuit;
The source electrode of the source electrode of the grid of the grid of FET M5, FET M6, FET M3 and FET M4 links together;
The source electrode of the source electrode of FET M7 and FET M8 links together;
The source ground of the source electrode of FET M1 and FET M2.
2. the high-speed level change-over circuit that is used for numeric type DC-DC converter according to claim 1; It is characterized in that; The maximum voltage that said FET M1 can bear to the drain-source voltage of FET M8 is greater than the upper voltage limit HVDD of high voltage level, and the absolute value that its grid source is withstand voltage is greater than the maximum of the low voltage level of high voltage level (HVDD-LVDD) and input LVIN input.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105322941A (en) * | 2014-07-30 | 2016-02-10 | 台湾积体电路制造股份有限公司 | Level shifting apparatus and method of using same |
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CN101312342A (en) * | 2007-05-23 | 2008-11-26 | 中芯国际集成电路制造(上海)有限公司 | Level switching circuit |
US20080290902A1 (en) * | 2007-05-22 | 2008-11-27 | Fujitsu Limited | Level converter |
JP2009188496A (en) * | 2008-02-04 | 2009-08-20 | Renesas Technology Corp | Level shifter circuit and semiconductor integrated circuit |
CN101630955A (en) * | 2009-06-09 | 2010-01-20 | 中国人民解放军国防科学技术大学 | High-performance level switch circuit with accelerating tube |
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- 2012-05-18 CN CN2012101579065A patent/CN102684488A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080290902A1 (en) * | 2007-05-22 | 2008-11-27 | Fujitsu Limited | Level converter |
CN101312342A (en) * | 2007-05-23 | 2008-11-26 | 中芯国际集成电路制造(上海)有限公司 | Level switching circuit |
JP2009188496A (en) * | 2008-02-04 | 2009-08-20 | Renesas Technology Corp | Level shifter circuit and semiconductor integrated circuit |
CN101630955A (en) * | 2009-06-09 | 2010-01-20 | 中国人民解放军国防科学技术大学 | High-performance level switch circuit with accelerating tube |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105322941A (en) * | 2014-07-30 | 2016-02-10 | 台湾积体电路制造股份有限公司 | Level shifting apparatus and method of using same |
CN105322941B (en) * | 2014-07-30 | 2018-08-31 | 台湾积体电路制造股份有限公司 | Level shift device and its application method |
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