CN102670331B - Electronic cochlear in-vitro debugging platform based on local area network (LAN) - Google Patents
Electronic cochlear in-vitro debugging platform based on local area network (LAN) Download PDFInfo
- Publication number
- CN102670331B CN102670331B CN201210181332.5A CN201210181332A CN102670331B CN 102670331 B CN102670331 B CN 102670331B CN 201210181332 A CN201210181332 A CN 201210181332A CN 102670331 B CN102670331 B CN 102670331B
- Authority
- CN
- China
- Prior art keywords
- interface
- circuit
- cochlear implant
- chip
- modulation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Prostheses (AREA)
Abstract
The invention discloses an electronic cochlear debugging platform based on a local area network (LAN), and belongs to the technical field of electronic cochlear implantation. The electronic cochlear debugging platform is characterized by comprising person computer (PC) end electronic cochlear algorithm experimental platform software, an embedded processor module, an audio module, a modulation and power amplification module and a wireless transmitting coil. The PC end electronic cochlear algorithm experimental platform software is mainly used for controlling an electronic cochlear working mode and working parameters and carrying out data communication with the embedded processor module in a form of LAN communication; the embedded processor module comprises a low power consumption dual-core processor OMAP-L137 containing a digital signal processor (DSP) and an accumulator read-in module (ARM) and a protective circuit; the audio unit comprises an audio decoder-coder, a sound acquisition interface connected with a microphone, and an earphone output interface; the modulation and power amplification module comprises a baseband signal generating circuit, an amplifying and filtering circuit, a modulation circuit and a power amplifying circuit; and the wireless transmitting coil is mainly used for being coupled with an electronic cochlear implant and transmitting data and energy. The electronic cochlear debugging platform can be used for development and research of parameter debugging and new algorithms.
Description
Technical field
The invention belongs to electronics, computer and signal processing technology field, the external debug platform device of cochlear implant particularly in a kind of cochlear implant implantation.
Background technology
Cochlear implant is also known as artificial cochlea, and it uniquely to make anacusia patient recover the device of audition at present.It stimulates acoustic nerve remaining in deaf person's cochlea by acoustical signal being converted to faint current impulse, imitates the function of peripheral auditory system, makes patient produce the nerve granting similar to normal human ear.But different electronic cochlea implant persons, their acous remaining situation is widely different.Listening to best results in order to what allow electronic cochlea implant persons as much as possible, must be just the customized running parameter of its external speech processor according to the acoustic nerve residual condition of cochlea implantation person.In addition, most importantly, the exploitation that debug platform is the verbal coding policing algorithm of new applicable tone feature provides necessary research platform.
The domestic invention relevant to cochlear implant some be the method proposing concrete certain signal processing, patent as Acoustical Inst., Chinese Academy of Sciences: " a kind of artificial cochlea's method of speech processing based on frequency modulation information and processor " (number of patent application: 200810239725.0), " a kind of cochlear implant and audio signal processing method thereof " (number of patent application: 201010279103.8), and the invention of Shenzhen Xianjin Technology Academe and Hong Kong Chinese University's co-applications: " realizing the cochlear implant of multiple physiological information detection functions " (number of patent application: 200810242499.X).These inventions are all propose a kind of algorithm be applied in cochlear implant, instead of carry out the research debug platform debugged for the exploitation of new algorithm.
The patent of being invented by Shenzhen Graduate School of Tsinghua University leaf land for growing field crops, Huang Shengyang etc.: " in-vitro voice processing unit for electronic cochlear duct " (number of patent application: 200610060580.9), and the patent of to be invented by Tsing-Hua University's palace qin, Du Zhi Yue etc.: " a kind of speech signal processor for cochlear implant based on dual core processor " (number of patent application: 201010224849.9), achieve the hardware unit of the external speech processor of cochlear implant each via different chips, comprise audio unit, core processing unit, wireless transmitting unit and Power Management Unit.But they have all just built the external machine of cochlear implant, instead of to the research platform that new algorithm is debugged, so they do not have the function of debugging the new algorithm of cochlear implant.
The patent of being invented by Shenzhen Graduate School of Tsinghua University leaf land for growing field crops, Yu Shuli etc.: " cochlear implant audition emulation platform, simulating experimental and method comparison method " (number of patent application: 200610060579.6) has built a kind of software platform of cochlear implant audition emulation.On the platform, emulation can be carried out to the voice processing effect of algorithms of different and compare and evaluate, for research worker provides the result of algorithm simulating.But this invention does not have corresponding hardware platform to support, as the research debug platform of cochlear implant, also cannot cannot complete and real debug function is carried out on the impact of parameter each in cochlear implant new algorithm.
The patent of being invented by Fu Qianjie, Chen Hongbin etc. of Hangzhou Nuorkang Neural Electronic Technology Co., Ltd.: " a kind of detection method of automatic language processing strategy and system " (number of patent application: 201010112507.8) achieve the language processing strategy automatic testing method based on " virtual processor " and detection system.This system take computer as physical support, realize in computer " virtual processor " consistent with speech processor function according to the processing policy used in speech processor, pass through high-speed sampling again, the output of the output of speech processor with " virtual processor " is compared, judges the correctness of speech processes strategy.But this invention is mainly used for the correctness between language processing strategy result that multilevel iudge performs in speech processor and the strategy of design, its main purpose is not to develop debugging to new algorithm.。
Patent by the invention such as Luo Dan, Shen Guangbo of Shanghai Guanxin Electronic Technology Co., Ltd.: " a kind of adopt the artificial cochlear debugging programming method of wireless data transmission and system " (number of patent application: 200810204677.1) provide a kind of artificial cochlear debugging system for clinical debugging adopting wireless data transmission, namely usually said MAP machine.Wherein, detail programming machine is wirelessly connected with language processing device for artificial cochlea.What patent was similar therewith also have by the invention such as Sun Zengjun, Wang Zhengmin of Shanghai Li Shengte medical science and technology company: " artificial cochlea MAP wireless debugging device " (number of patent application: 200820155990.6).Also be devise a kind of MAP machine for clinical debugging by wireless transmission, instead of for new algorithm exploitation debug platform.
Compared with patent before, the invention provides a research debug platform for new algorithm exploitation, by the design of the hardware and software of system, make debug platform not only can carry out the reasonable debugging of parameter according to the hearing condition of each electronic cochlea implant persons, and the more important thing is and can new verbal coding strategy be debugged on stream, in addition, research platform, by the communication of LAN, can extract its characteristic parameter for different speech characteristics more flexibly and easily thus design suitable coding strategy.
Summary of the invention
The object of the invention is to realize the external debug platform of a kind of cochlear implant based on LAN.The invention is characterized in, contain: PC, flush bonding processor, audio coding decoding circuit, modulation and power amplification circuit, Ethernet interface, wireless transmit coil, also have electric power management circuit, wherein:
PC, is used as extraneous emulator, is provided with: cochlear implant algorithm experimental debugging module, and mode of operation selects module and LAN data communication module, wherein:
Cochlear implant algorithm experimental debugging module, contains: various cochlear implant speech processing algorithm software, can realize setting and the adjustment of cochlear implant running parameter;
Mode of operation selects module, is provided with following three kinds of alternative mode of operations:
Non-real-time mode: the running parameter being selected cochlear implant by the described cochlear implant speech processing algorithm software in described PC, data file again after transmission processing is to flush bonding processor, processor to be encoded according to the running parameter of cochlear implant to received data file and is transmitted on described wireless transmit coil after passing through modulation, power amplification
Real-time mode, select the running parameter of cochlear implant by the described cochlear implant speech processing algorithm software in described PC and read the debugging coupling MAP information of patient, send into described flush bonding processor, described flush bonding processor mates the voice signal of MAP real time information sampling and process interlocutor according to the cochlear implant running parameter received and described debugging, and carry out encoding, modulating and power amplifier
Single electrode stimulus modelity, the running parameter of cochlear implant and the electrode label that will stimulate and stimulation amplitude is selected by the described cochlear implant speech processing algorithm software in described PC, be sent to described flush bonding processor, described flush bonding processor carries out the stimulation of certain hour to selected electrode according to the parameter received
Flush bonding processor, be one and make the flush bonding processor of interface with the low-power consumption DSP+ARM dual core processor OMAP-L137 chip of TI Texas Instruments, be provided with lower interface: McASP interface, I2C interface, EMIFA interface, EMIFB interface, SPI interface, EMAC interface and jtag interface, wherein:
McASP interface, interconnect with the audio coding decoding chip TLV320AIC3106 of described audio coding decoding circuit, from mike after filtering after voice data issue described OMAP-L137 chip by this McASP interface, by this McASP interface, voice data is carried out playback by earphone under this OMAP-L137 chip controls of described flush bonding processor again
I2C interface, has two: export control signal respectively to the power management chip in described audio coding decoding chip TLV320AIC3106 and described electric power management circuit,
EMIFA interface, interconnects with the NAND Flash in external memory element, to expand the nonvolatile storage space of 64MByte code and data,
EMIFB interface, interconnects with the SDRAM in described external memory element, to expand 32MByte program running space,
SPI interface, is connected with the input of described modulation with the baseband signal generative circuit in amplifying circuit, exports the boost pulse supplemental characteristic frame waiting for wireless transmit after coding,
EMAC interface, is connected with the ethernet PHY transceiver KSZ8001L of described ethernet interface module, obtains the Ethernet interface of 10Mbps/100Mbps,
Jtag interface, is connected with the socket of 14 feet, is connected with outer computer by described PC,
Described audio coding decoding circuit, contains: voice acquisition interface and headset output interface, wherein:
Voice acquisition interface, connects an omni-directional electret-type capacitance microphone, provides 2.0V bias voltage by MICBIAS pin,
Headset output interface, connects 3.5mm earphone, for acoustic playback,
Modulation and power amplifier module, be connected in series successively by described baseband signal generative circuit, filtering and amplifying circuit, the multiplex electronics doing modulation and power amplification circuit and form, wherein:
Baseband signal generative circuit, be one by the active crystal oscillator of the 5MHz of+5V Power supply,
Filter circuit, is made up of 7 rank passive low-pass filter circuits,
Amplifying circuit, is made up of the high speed operation amplifier AD811 of ADI company and the buffer BUF634 of described TI company, and described AD8ll adopts in-phase amplifier connection, and it is 10V that input signal is amplified to Voltage Peak peak value,
Modulation circuit, it is one the 2 multiplexer AD8170 chip selecting 1, when the gating foot inputted is " 0 ", export 0 level, when the gating foot inputted is " 1 ", export 5MHz sinusoidal wave, before described 5MHz signal enters described multiplexer, add one-level amplifier AD8027 chip is formed and voltage follower
Wireless transmit coil is that the multiturn coil be coiled into by wire is formed, for receiving coil coupled transfer modulation signal,
Electric power management circuit, contain: 5V DC source, 4.2V lithium battery, commutator (S), diode (D1), electric fuse (F1) ,+5V external direct current power supply input interface, the external lithium battery input interface of+4.2V, main power source management circuit, first voltage conversion circuit (1), the second voltage conversion circuit (2) and tertiary voltage change-over circuit (3), wherein:
Commutator (S), first input end is connected in series described electric fuse (F1), diode (D1) and described+5V external direct current power supply outfan, second input is connected with the outfan of described first voltage conversion circuit (1), the input exported as first voltage conversion circuit (1) of+5V is connected with the outfan of described+4.2V lithium battery, described commutator (S) provides+5V power supply respectively to described main power source management circuit, the second voltage conversion circuit (2) and tertiary voltage change-over circuit (3)
Main power source management circuit, a power management chip TPS65023, pin HOTRESETn connects the reset key of an other end ground connection, after pressing this reset key, described pin HOTRESETn becomes low level, pin RESPWRONn exports reset signal to the RESETn pin of described OMAP-L137 chip, described TPS65023 chip has three road DC/DC to export and two-way LDO exports, to provide the voltage of different brackets, described OMAP-L137 is managed the output voltage of described TPS65023 chip and electric sequence by described I2C interface
First voltage conversion circuit (1), is a voltage conversion chip MAX1760, powers to described modulation and amplifying circuit, is+5V,
Second voltage conversion circuit (2), is a voltage conversion chip MAX762, provides+10V power supply to described modulation and amplifying circuit,
Tertiary voltage change-over circuit (3), is a voltage conversion chip MAX766, provides-10V power supply to described modulation and amplifying circuit.
Tool of the present invention has the following advantages:
The first, the present invention intactly achieves cochlear implant research debug platform and holds cochlear implant algorithm experimental software, the network data communication based on LAN, the real-time process to data and coding from PC, to modulate coded data and power amplification by the function of coil wireless transmit.
The second, the PC in the present invention holds cochlear implant algorithm experimental software can adjust test cochlear implant running parameter to greatest extent so that carry out the relevant algorithm experimental of cochlear implant.
3rd, PC in the present invention holds cochlear implant algorithm experimental software can realize the importing of new algorithm, the result of new algorithm is sent to embedded system, thus verifies the performance of new algorithm, the research and development for cochlear implant new algorithm provide necessary debug platform.
4th, the algorithm in the present invention in embedded system can be revised flexibly, and electronic cochlea implant persons is carried with, to carry out long testing evaluation to the performance of new algorithm.
5th, the present invention, by the flexible selection of different coding agreement, can realize the seamless link with the current multiple cochlear implant implant of extensive use clinically, greatly facilitates in the checking of new algorithm and proof of algorithm experiment and selects experimenter.
Accompanying drawing explanation
Fig. 1 is the block diagram of system of the present invention.
Fig. 2 is the non real-time mode of operation flow chart of the present embodiment.
Fig. 3 is the present embodiment real time operation model process figure.
Fig. 4 is the present embodiment single electrode stimulus modelity flow chart.
Fig. 5 is that the present embodiment PC holds cochlear implant algorithm experimental platform software interface.
Fig. 6 is the core processor OMAP-L137 of the present embodiment and the interface diagram of audio codec TLV320AIC3106.
Fig. 7 is the core processor OMAP-L137 of the present embodiment and the interface diagram of NAND Flash.
Fig. 8 is the interface diagram of core processor OMAP-L137 and the SDRAM of the present embodiment.
Fig. 9 is the Ethernet interface connection diagram of the present embodiment.
Figure 10 is the structured flowchart of the Power Management Unit of the present embodiment.
Figure 11 is the main power source management circuit schematic diagram of the present embodiment.
Figure 12 is the circuit theory diagrams that+4.2V of the present embodiment turns+5V.
Figure 13 is the circuit theory diagrams that+5V of the present embodiment turns+10V.
Figure 14 is the circuit theory diagrams that+5V of the present embodiment turns-10V.
Figure 15 is the wireless transmitting unit structured flowchart of the present embodiment.
Detailed description of the invention
The present invention includes the system hardware be made up of flush bonding processor module, audio-frequency module, ethernet module, modulation and power amplifier module and wireless transmit coil etc., comprise the systems soft ware that PC holds network data communication, speech processing algorithm and data encoding algorithm etc. in cochlear implant algorithm experimental platform software, embedded system to form.This cochlear implant debug platform comprises PC end system and embedded system two large divisions.Wherein PC end system mainly runs cochlear implant algorithm experimental software, by the selection of this software simulating cochlear implant running parameter, and the selection of mode of operation, and the instruction etc. of network data communication between embedded system and duty; Embedded system part is for core processor unit with TI low-power consumption DSP+ARM dual core processor OMAP-L137, the LAN data that it can realize holding with PC communicates, for transmission electronic cochlea parameter information and the data file needing coding, and above-mentioned data are encoded, it can gather voice signal in real time and be undertaken processing and encoding by cochlear implant speech processing algorithm, above-mentioned coded data is sent to modulation and power amplification circuit by the form of serial, through the Signal transmissions of ovennodulation and power amplification to wireless transmit coil.Each several part annexation as shown in Figure 1.
The invention is characterized in, contain: PC, flush bonding processor, audio coding decoding circuit, modulation and power amplification circuit, Ethernet interface, wireless transmit coil, also have electric power management circuit, wherein:
PC, comprises user interface, and cochlear implant mode of operation and running parameter are arranged, local net network data communication etc.
Flush bonding processor module, processor is the dual core processor OMAP-L137 that a slice comprises TMS320C674 Floating-point DSP and ARM926EJ-S RISC MPU, its McASP interface of main use, I2C interface, EMIFA interface, EMIFB interface, SPI interface, EMAC interface and jtag interface, wherein:
McASP interface, interconnects with the audio codec TLV320AIC3106 in described audio unit, carries out audio data transmission;
I2C interface has two, exports control signal respectively to the power management chip TPS65023 in described audio codec TLV320AIC3106 and described Power Management Unit;
EMIFA interface, interconnects with the NAND Flash in described memory element, to expand the nonvolatile storage space of 64MByte code and data;
EMIFB interface, interconnects with the SDRAM in described memory element, expands 32MByte program running space;
SPI interface, is connected with described modulation and power amplification, exports process and encodes and the boost pulse supplemental characteristic frame treating wireless transmit;
EMAC interface, is connected with ethernet PHY transceiver KSZ8001L, expands 10Mbps/100Mbps Ethernet interface;
Jtag interface, is connected with the JTAG socket of 14 pins, is communicated by external emulator with outer computer;
Audio-frequency module, contain: the described audio codec TLV320AIC3106 of Codec chip composition, described in this, audio codec TLV320AIC3106 contains voice acquisition interface and headset output interface, wherein:
Voice acquisition interface, connects omni-directional electret-type capacitance microphone, provides 2.0V voltage bias by MICBIAS pin;
Headset output interface, connects 3.5mm earphone, for acoustic playback;
Modulation and power amplifier module, be connected in series successively by baseband signal generative circuit, filtering and amplifying circuit, the multiplex electronics being used as modulation circuit and power amplification circuit and form, wherein:
Baseband signal generative circuit is the active crystal oscillator of 5MHz an of+5V Power supply;
Filter circuit, is made up of 7 rank passive low-pass filter circuits;
Modulation circuit selects the multiplexer of 1 to realize with 2, when the gating foot inputted is " 0 ", exports 0 level, when input is " 1 ", exports 5MHz sinusoidal wave.Before 5MHz signal enters multiplexer, add voltage order one follower, to avoid the impact between front stage circuit, select amplifier AD8027 chip;
Power amplification circuit is made up of the high speed operation amplifier AD811 of ADI company and the buffer BUF634 of TI company, and AD8ll adopts in-phase amplifier connection, and input signal being amplified to Voltage Peak peak value is 10V;
Wireless transmit coil is that the multiturn coil be coiled into by wire is configured for and receiving coil coupled transfer modulation signal.
Power management module comprises a commutator S, diode D1, electric fuse F1 ,+5V external power supply input interface, the external lithium battery input interface of+4.2V, main power source management circuit, voltage conversion circuit 1, voltage conversion circuit 2 and voltage conversion circuit 3, wherein:
First input end serial connection electric fuse, diode and the+5V external power supply input interface of commutator; Second input of commutator connects with voltage conversion circuit 1, and the input of this voltage conversion circuit connects the external lithium battery input interface of+4.2V, and output voltage is+5V; The outfan of described commutator connects the input of the input of main power source management circuit, the input of voltage conversion circuit 2 and voltage conversion circuit 3 respectively;
Main power source management circuit is by a power management chip TPS65023, a reset key and I2C interface composition, this reset key one end ground connection, the HOTRESETn pin of TPS65023 chip described in another termination, after pressing this reset key, described HOTRESETn pin becomes low level, the RESPWRONn pin of described TPS65023 chip exports reset signal to the RESETn pin of described dual core processor OMAP-L137, TPS65023 chip has three road DC/DC and exports, two-way LDO exports as system provides different voltage, described dual core processor OMAP-L137 is managed the output voltage of described TPS65023 chip and electric sequence by I2C interface,
Voltage conversion circuit 1 is a voltage conversion chip MAX1760, for described wireless transmitting unit provides+5V power supply;
Voltage conversion circuit 2 is voltage conversion chip MAX762, for described wireless transmitting unit provides+10V power supply.
Voltage conversion circuit 3 is voltage conversion chip MAX766, for described wireless transmitting unit provides-10V power supply.
The present invention proposes a kind of system embodiment of the cochlear implant debug platform based on LAN, is made up of hardware circuit and software two large divisions.Be described in detail as follows in conjunction with each accompanying drawing:
The present embodiment entire system is formed as shown in Figure 1, comprise the system hardware be made up of flush bonding processor module, audio-frequency module, ethernet module, modulation and power amplifier module and wireless transmit coil etc., comprise the systems soft ware that PC holds network data communication, speech processing algorithm and data encoding algorithm etc. in cochlear implant algorithm experimental platform software, embedded system to form.The present embodiment system is primarily of three kinds of mode of operations: one is non-real-time mode, the running parameter of cochlear implant selected by the cochlear implant algorithm experimental software held by PC under this pattern, then the data file after using the process of cochlear implant speech processing algorithm is sent to embedded system, flush bonding processor to be encoded according to running parameter to received data file and is transmitted on coil after passing through modulation and power amplifier, and its workflow as shown in Figure 2; Two is real-time modes, the cochlear implant algorithm experimental software that this pattern descended PC to hold is selected the running parameter of cochlear implant and is read the map information of patient, above-mentioned parameter is sent to embedded system, flush bonding processor is according to the parameter received acquisition and processing voice signal in real time, and carry out encoding, modulating and power amplifier, and then being transmitted on coil, its workflow is as shown in Figure 3; Three is single electrode stimulus modelities, the cochlear implant algorithm experimental software held by PC under this pattern selects the running parameter of cochlear implant and the electrode label that will stimulate and stimulation amplitude, above-mentioned parameter is sent to embedded system, flush bonding processor carries out the stimulation of certain hour to selected electrode according to the parameter received, its workflow as shown in Figure 4.
In the present embodiment, PC holds cochlear implant algorithm experimental platform software as shown in Figure 5, it can realize the setting of cochlear implant running parameter, the transmission of the data file after cochlear implant speech processing algorithm processed voice, the selection of cochlear implant debug platform mode of operation and the display etc. of cochlear implant debug platform duty.
In the present embodiment, flush bonding processor module is with TI low-power consumption DSP+ARM dual core processor OMAP-L137 for core processor unit, and it receives the cochlear implant running parameter that PC end sends and the dat file data obtained after cochlear implant speech processing algorithm processes voice signals by the form of LAN data communication.Under being operated in above-mentioned three kinds of mode of operations according to the control of cochlear implant algorithm experimental platform software.
The interface diagram of audio-frequency module and flush bonding processor as shown in Figure 6.Audio-frequency module adopts a slice TLV320AIC3106(hereinafter referred to as " AIC3106 ") low-power consumption dual-channel audio codec expands the interfaces such as Mike's input, earphone output.OMAP-L137 is configured AIC3106 by I2C interface, and arranging sample rate is 24kHz, and sampled data precision is 32, gain is 8.5dB, then through 1 rank high pass filter of AIC3106 Embedded, the low-frequency noises such as cut-off frequency is 90Hz, filtering 50Hz power frequency.The voice data of device issues OMAP-L137 by McASP interface after filtering, and OMAP-L137 can pass voice data back AIC3106 by McASP interface, carries out playback by earphone interface.
The present embodiment is outside the sheet memory space of OMAP-L137, and a slice 64MByte NAND Flash by EMIFA Interface Expanding, transmitted data bits is wide is 8 bits, for save routine and data, and is the startup source of system.Interface diagram as shown in Figure 7.EMA_WAIT0 provides busy waiting signal (Low level effective) by NAND Flash to OMAP-L137, EMA_OEn is the enable control signal of Flash (Low level effective), EMA_CS3n provides chip selection signal (Low level effective), EMA_WEn is write enable signal (Low level effective), EMA_D [7:0] is 8 bit address and data transmission channel, and EMA_A2, EMA_A1 respectively control command latch enable signal CLE(high level are effective), address latch enable signal ALE(high level is effective).
The present embodiment connects 32Mbyte(4M × 16Bit × 4Banks by EMIFB interface), transmitted data bits is wide is respectively the SDRAM of 16 bits.Interface diagram as shown in Figure 8.BA [1:0] is Bank selection pin; A [12:0] is address transfer passage; DQ [15:0] is data input and output bus; DQML is the mask signal of the DQ [7:0] corresponding to least-significant byte, and UDQM is the mask signal of the DQ [15:8] corresponding to most-significant byte.
The ethernet module of the present embodiment and the connection block diagram of flush bonding processor are as shown in Figure 9.Ethernet control chip KSZ8893 to be connected with network interface respectively at flush bonding processor OMAP L137 and to realize the signal wiring of local area network communication.
The structured flowchart of the Power Management Unit of the present embodiment as shown in Figure 10, wherein comprises a commutator S, diode D1, electric fuse F1 ,+5V external power supply input interface, the external lithium battery input interface of+4.2V, main power source management circuit, the first voltage conversion circuit and the second voltage conversion circuit.Diode D1 provide polarity protection; Electric fuse F1 provide overcurrent protection, and maximum current is 1A.By commutator S, can switch between the input of+5V external power supply and the external lithium battery input of+4.2V, meet the requirement of circuit debugging and portable set respectively.
Adopt power management chip TPS65023 in the main power source management circuit of the present embodiment, utilize that the three road DC/DC of TPS65023 export, two-way LDO exports provides different voltage for system, and utilize two voltage comparators to realize rational electric sequence.Connection diagram between TPS65023 and OMAP-L137 as shown in figure 11.VDCDC1, VDCDC2, VDCDC3 provide 1.2V, 1.8V, 3.3V output voltage respectively.For the solution of electric sequence, mainly utilize two battery status monitoring comparator LOWBAT_SNS and PWRFAIL_SNS on sheet.Input using VDCDC1 as these two comparators, the enable signal that the output of comparator LOWBAT_SNS exports as DCDC1, the enable signal that the output of comparator PWRFAIL_SNS exports as other DCDC and LDO, input using VDCDC2 as comparator LOWBAT, thus achieve the first 1.2V of OMAP-L137, secondly the electric sequence of 1.8V, last 3.3V controls.
The voltage conversion circuit of the present embodiment is as shown in Figure 12, Figure 13 Figure 14.In fig. 13, under MAX762 is operated in the pattern exporting+10V fixed voltage.In Figure 14, under MAX766 is operated in the pattern exporting-10V fixed voltage.
In the present embodiment, data are after coding, carry out ASK modulation with 5MHz sinusoidal carrier signal, and ideally 0 yard of corresponding modulated signal envelope amplitude is 0.Modulation and power amplifier module circuit structure diagram are as shown in figure 12.In order to obtain the desirable carrier signal of waveform comparison, reduce circuit complexity, adopt a slice 5MHz crystal oscillator to produce original carrier signal in the present embodiment, after filtering, amplify and one-level buffer circuit, send into an input IN1 of multiplexer AD8170 as modulating baseband signal.Another input IN0 ground connection of AD8170, and the modulation signal that OMAP-L137 produces is as " select " pin selecting signal to be input to multiplexer.When modulation signal is high level (namely corresponding to " 1 "), multiplexer exports the signal of IN1 pin, namely outgoing carrier signal; When modulation signal is low level (namely corresponding to " 0 "), multiplexer exports the signal of IN0 pin, and namely output level is 0, the ASK modulation so just completed.Then modulated signal sends into the power amplifier be made up of AD811 and BUF634, and its output is about 220mW, then passes through coil transmissions.
Claims (1)
1. based on a cochlear implant debug platform for LAN, it is characterized in that, contain: PC, flush bonding processor, audio coding decoding circuit, modulation and power amplification circuit, Ethernet interface, wireless transmit coil, also have electric power management circuit, wherein:
PC, is used as extraneous emulator, is provided with: cochlear implant algorithm experimental debugging module, and mode of operation selects module and LAN data communication module, wherein:
Cochlear implant algorithm experimental debugging module, contains: various cochlear implant speech processing algorithm software, can realize setting and the adjustment of cochlear implant running parameter;
Mode of operation selects module, is provided with following three kinds of alternative mode of operations:
Non-real-time mode: the running parameter being selected cochlear implant by the described cochlear implant speech processing algorithm software in described PC, data file again after transmission processing is to flush bonding processor, processor to be encoded according to the running parameter of cochlear implant to received data file and is transmitted on described wireless transmit coil after passing through modulation, power amplification
Real-time mode, select the running parameter of cochlear implant by the described cochlear implant speech processing algorithm software in described PC and read the debugging coupling MAP information of patient, send into described flush bonding processor, described flush bonding processor mates the voice signal of MAP real time information sampling and process interlocutor according to the cochlear implant running parameter received and described debugging, and carry out encoding, modulating and power amplifier
Single electrode stimulus modelity, the running parameter of cochlear implant and the electrode label that will stimulate and stimulation amplitude is selected by the described cochlear implant speech processing algorithm software in described PC, be sent to described flush bonding processor, described flush bonding processor carries out the stimulation of certain hour to selected electrode according to the parameter received
Flush bonding processor, be one and make the flush bonding processor of interface with the low-power consumption DSP+ARM dual core processor OMAP-L137 chip of TI Texas Instruments, be provided with lower interface: McASP interface, I2C interface, EMIFA interface, EMIFB interface, SPI interface, EMAC interface and jtag interface, wherein:
McASP interface, interconnect with the audio coding decoding chip TLV320AIC3106 of described audio coding decoding circuit, from mike after filtering after voice data issue described OMAP-L137 chip by this McASP interface, by this McASP interface, voice data is carried out playback by earphone under this OMAP-L137 chip controls of described flush bonding processor again
I2C interface, has two: export control signal respectively to the power management chip in described audio coding decoding chip TLV320AIC3106 and described electric power management circuit,
EMIFA interface, interconnects with the NAND Flash in external memory element, to expand the nonvolatile storage space of 64MByte code and data,
EMIFB interface, interconnects with the SDRAM in described external memory element, to expand 32MByte program running space,
SPI interface, is connected with the input of described modulation with the baseband signal generative circuit in amplifying circuit, exports the boost pulse supplemental characteristic frame waiting for wireless transmit after coding,
EMAC interface, is connected with the ethernet PHY transceiver KSZ8001L of described ethernet interface module, obtains the Ethernet interface of 10Mbps/100Mbps,
Jtag interface, is connected with the socket of 14 feet, is connected with outer computer by described PC,
Described audio coding decoding circuit, contains: voice acquisition interface and headset output interface, wherein:
Voice acquisition interface, connects an omni-directional electret-type capacitance microphone, provides 2.0V bias voltage by MICBIAS pin,
Headset output interface, connects 3.5mm earphone, for acoustic playback,
Modulation and power amplifier module, be connected in series successively by described baseband signal generative circuit, filtering and amplifying circuit, the multiplex electronics doing modulation and power amplification circuit and form, wherein:
Baseband signal generative circuit, be one by the active crystal oscillator of the 5MHz of+5V Power supply,
Filter circuit, is made up of 7 rank passive low-pass filter circuits,
Amplifying circuit, is made up of the high speed operation amplifier AD811 of ADI company and the buffer BUF634 of described TI company, and described AD8ll adopts in-phase amplifier connection, and it is 10V that input signal is amplified to Voltage Peak peak value,
Modulation circuit, it is one the 2 multiplexer AD8170 chip selecting 1, when the gating foot inputted is " 0 ", export 0 level, when the gating foot inputted is " 1 ", export 5MHz sinusoidal wave, before described 5MHz signal enters described multiplexer, add one-level amplifier AD8027 chip is formed and voltage follower
Wireless transmit coil is that the multiturn coil be coiled into by wire is formed, for receiving coil coupled transfer modulation signal,
Electric power management circuit, contain: 5V DC source, 4.2V lithium battery, commutator (S), diode (D1), electric fuse (F1) ,+5V external direct current power supply input interface, the external lithium battery input interface of+4.2V, main power source management circuit, first voltage conversion circuit (1), the second voltage conversion circuit (2) and tertiary voltage change-over circuit (3), wherein:
Commutator (S), first input end is connected in series described electric fuse (F1), diode (D1) and described+5V external direct current power supply outfan, second input is connected with the outfan of described first voltage conversion circuit (1), the input exported as first voltage conversion circuit (1) of+5V is connected with the outfan of described+4.2V lithium battery, described commutator (S) provides+5V power supply respectively to described main power source management circuit, the second voltage conversion circuit (2) and tertiary voltage change-over circuit (3)
Main power source management circuit, a power management chip TPS65023, pin HOTRESETn connects the reset key of an other end ground connection, after pressing this reset key, described pin HOTRESETn becomes low level, pin RESPWRONn exports reset signal to the RESETn pin of described OMAP-L137 chip, described TPS65023 chip has three road DC/DC to export and two-way LDO exports, to provide the voltage of different brackets, described OMAP-L137 is managed the output voltage of described TPS65023 chip and electric sequence by described I2C interface
First voltage conversion circuit (1), is a voltage conversion chip MAX1760, powers to described modulation and amplifying circuit, is+5V,
Second voltage conversion circuit (2), is a voltage conversion chip MAX762, provides+10V power supply to described modulation and amplifying circuit,
Tertiary voltage change-over circuit (3), is a voltage conversion chip MAX766, provides-10V power supply to described modulation and amplifying circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210181332.5A CN102670331B (en) | 2012-06-04 | 2012-06-04 | Electronic cochlear in-vitro debugging platform based on local area network (LAN) |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210181332.5A CN102670331B (en) | 2012-06-04 | 2012-06-04 | Electronic cochlear in-vitro debugging platform based on local area network (LAN) |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102670331A CN102670331A (en) | 2012-09-19 |
| CN102670331B true CN102670331B (en) | 2014-12-31 |
Family
ID=46803337
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210181332.5A Active CN102670331B (en) | 2012-06-04 | 2012-06-04 | Electronic cochlear in-vitro debugging platform based on local area network (LAN) |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102670331B (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102868582A (en) * | 2012-09-26 | 2013-01-09 | 中国兵器工业集团第二一四研究所苏州研发中心 | Ethernet expander circuit module |
| CN107007932A (en) * | 2017-04-25 | 2017-08-04 | 深圳信息职业技术学院 | A kind of medical monitoring system and signal processing method |
| CN107040858A (en) * | 2017-06-19 | 2017-08-11 | 上海市第六人民医院 | A kind of artificial cochlea's speech algorithm experimental device |
| CN107800173B (en) * | 2017-11-21 | 2023-08-15 | 出门问问信息科技有限公司 | Wireless charger and information prompting method |
| CN108828356A (en) * | 2018-06-11 | 2018-11-16 | 南京尤尼泰信息科技有限公司 | It is a kind of suitable for plurality of specifications crystal oscillator for electrical test circuit |
| CN109248379A (en) * | 2018-10-30 | 2019-01-22 | 上海力声特医学科技有限公司 | The long-range tune machine device of artificial cochlea |
| CN109687598A (en) * | 2018-12-20 | 2019-04-26 | 南京理工大学 | It is a kind of based on non-linear parity-time symmetric circuit energy and information carrying means |
| CN109918298B (en) * | 2019-02-25 | 2022-04-01 | 深圳米唐科技有限公司 | Intelligent voice front-end microphone debugging method, device, system and medium |
| CN111050262B (en) * | 2020-01-10 | 2021-04-13 | 杭州耳青聪科技有限公司 | Intelligent voice-enhanced real-time electronic cochlea debugging system |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1879581A (en) * | 2006-05-15 | 2006-12-20 | 清华大学深圳研究生院 | In-vitro voice processing unit for electronic cochlear duct |
| CN1896955A (en) * | 2006-05-15 | 2007-01-17 | 清华大学深圳研究生院 | Electronic canails audition simulating platform, its simulating experimental method and algorithm comparation |
| CN201290806Y (en) * | 2008-11-27 | 2009-08-19 | 上海力声特医学科技有限公司 | Artificial cochlea MAP wireless debugging device |
| CN101744670A (en) * | 2008-12-16 | 2010-06-23 | 上海冠芯电子科技有限公司 | Artificial cochlear debugging programming method and system adopting wireless data transmission |
| CN101926692A (en) * | 2010-07-09 | 2010-12-29 | 清华大学 | Speech signal processor for cochlear implant based on dual core processor |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5824022A (en) * | 1996-03-07 | 1998-10-20 | Advanced Bionics Corporation | Cochlear stimulation system employing behind-the-ear speech processor with remote control |
| US6289247B1 (en) * | 1998-06-02 | 2001-09-11 | Advanced Bionics Corporation | Strategy selector for multichannel cochlear prosthesis |
| EP1338301A1 (en) * | 2002-02-21 | 2003-08-27 | Paul J. M. Govaerts | Method for automatic fitting of cochlear implants, obtained cochlear implant and computer programs therefor |
| US6925332B2 (en) * | 2003-02-03 | 2005-08-02 | The Children's Hospital Of Philadelphia | Methods for programming a neural prosthesis |
| DE102005049507B4 (en) * | 2005-09-19 | 2007-10-25 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Device for generating a combination signal and corresponding method and computer program for carrying out the method |
| EP2358426A4 (en) * | 2008-12-08 | 2012-12-05 | Med El Elektromed Geraete Gmbh | Method for fitting a cochlear implant with patient feedback |
-
2012
- 2012-06-04 CN CN201210181332.5A patent/CN102670331B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1879581A (en) * | 2006-05-15 | 2006-12-20 | 清华大学深圳研究生院 | In-vitro voice processing unit for electronic cochlear duct |
| CN1896955A (en) * | 2006-05-15 | 2007-01-17 | 清华大学深圳研究生院 | Electronic canails audition simulating platform, its simulating experimental method and algorithm comparation |
| CN201290806Y (en) * | 2008-11-27 | 2009-08-19 | 上海力声特医学科技有限公司 | Artificial cochlea MAP wireless debugging device |
| CN101744670A (en) * | 2008-12-16 | 2010-06-23 | 上海冠芯电子科技有限公司 | Artificial cochlear debugging programming method and system adopting wireless data transmission |
| CN101926692A (en) * | 2010-07-09 | 2010-12-29 | 清华大学 | Speech signal processor for cochlear implant based on dual core processor |
Non-Patent Citations (2)
| Title |
|---|
| Nucleus24型人工调试参数及参数的设定;银力;《听力学及言语疾病杂志》;20050930;第13卷(第5期);358-361 * |
| Nucleus人工耳蜗病人的调机;冯定香;《中国听力语言康复科学杂志》;20040930;第2卷(第5期);31-32 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102670331A (en) | 2012-09-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102670331B (en) | Electronic cochlear in-vitro debugging platform based on local area network (LAN) | |
| CN101926692B (en) | Speech signal processor for cochlear implant based on dual core processor | |
| CN203468609U (en) | Monitoring and curing system for sleep apnea syndrome | |
| CN100394903C (en) | Bidirectional digital modulating multi-channel artificial cochlea system | |
| CN100346755C (en) | Two-way multi-channel artificial cochlea system with on-chip signal processor | |
| CN203506973U (en) | External voice processor in artificial cochlea | |
| CN104287700A (en) | Pulse wave detection system and method using audio port of smart phone | |
| CN101444451A (en) | Sound control massager and sound control method thereof | |
| CN104349241A (en) | Earphone and information processing method | |
| MARAY et al. | Design and implementation of low-cost medical auditory system of distortion otoacoustic using microcontroller | |
| CN204723046U (en) | Human body physiological parameter monitoring equipment | |
| CN111050262B (en) | Intelligent voice-enhanced real-time electronic cochlea debugging system | |
| CN100398077C (en) | In-vitro voice processing unit for electronic cochlear duct | |
| CN100486360C (en) | Digital multi-channel voice processor for artificial cochlea | |
| CN201290806Y (en) | Artificial cochlea MAP wireless debugging device | |
| CN205625912U (en) | Pulse measurement system with wireless transmission function | |
| CN103340704B (en) | In-vivo system of electrical cochlea debugging platform | |
| CN107123425A (en) | A kind of recording pen and system for Real-time speech recognition | |
| CN111228647B (en) | Universal communication method for cochlear implant system | |
| CN206197966U (en) | A kind of medical multi-function stethoscope of recording | |
| CN206102668U (en) | Novel electronic stethoscope | |
| CN203708486U (en) | Monitoring device of hearing aid, hearing aid and a hearing aid system | |
| CN103933666B (en) | A kind of general practitioner uses intelligent combined magnet therapeutic apparatus | |
| CN206524971U (en) | Artificial cochlea's microphone test system | |
| CN201684071U (en) | Digital procedure type tinnitus comprehensive therapeutic device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C53 | Correction of patent for invention or patent application | ||
| CB03 | Change of inventor or designer information |
Inventor after: Gong Qin Inventor after: Liu Jinglei Inventor after: Liu Tuo Inventor after: Chen Wenwang Inventor after: Guan Tian Inventor before: Gong Qin Inventor before: Liu Jinglei Inventor before: Liu Tuo Inventor before: Guan Tian |
|
| COR | Change of bibliographic data |
Free format text: CORRECT: INVENTOR; FROM: GONG QIN LIU JINGLEI LIU TUO GUAN TIAN TO: GONG QIN LIU JINGLEI LIU TUO CHEN WENWANG GUAN TIAN |
|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |