CN102664837B - Method for automatically detecting and completing setting matching of high speed digital signal in receiving and transmitting directions - Google Patents
Method for automatically detecting and completing setting matching of high speed digital signal in receiving and transmitting directions Download PDFInfo
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Abstract
The present invention relates to a method for automatically detecting and completing setting matching of a high speed digital signal in receiving and transmitting directions. The method comprises the following steps of: (1) designing a test plate; (2) developing a high speed digital signal cross board; (3) designing a control module, and completing traversal of the preaccentuation of all data output terminals and the equalization setting of data input terminals; (4) by using a first test board, collecting combination setting of all preaccentuation and equalization configuration and a bit error rate result of a corresponding pseudo random code verifier, and searching the combination of effective equalization and preaccentuation configuration with an optimal bit error rate; (5) on the condition that all high speed digital signal transmission lines have no problem is detected and confirmed, storing optimal data obtained in the control module for the use of future development. According to the method, the detection and setting of the high speed digital signal detection lines can be automatically completed without the need of manual intervention, manpower and material resources are saved, the accuracy of a result is raised, the method is applied to the integrity detection of all high speed digital signals, and the expansion of functions can be carried out latterly.
Description
Technical field
The present invention relates to high-speed digital signal integrity detection technical field, is a kind of method that automatic detection completes that high-speed digital signal transmit-receive position arranges coupling specifically.That is: telecommunication apparatus high-speed digital signal has detected transmit-receive position on respective signal line by automation means and has arranged the method for coupling.
Background technology
Current telecommunications equipment is towards the future development of high integration, the frequency multiplication of data bus signal, and high-speed digital signal and low speed digital signal transmit the difference that there is essence, when the speed using 2.5Gbps, 10Gbps even higher, because routing line width, line length, medium such as to select at the factor impact, there is the unfavorable factors such as signal exhaustion, intersymbol interference and crosstalk, it is logical zero, logical one that receiving terminal is difficult to correct recovery data, and it is simple by promoting quality of hardware, the measure of technique often makes cost increase, and produces little effect.
For addressing these problems, high-speed digital signal device usually possesses the preemphasis of the signal of sending direction and arranges with the balanced of receive direction.Preemphasis refers to, for ease of transmission or the record of signal, and has a mind to relative to the amplitude of other components the measure that strengthened to the amplitude of its some spectrum component in advance, makes the signal quality on receiver close to the signal quality of original transmission; Equilibrium refers to, in order to reduce the linear distortion of signal transmission, departs from its ideal form and the compensation process carried out for channel transfer functions.When utilizing these to arrange to ensure Signal transmissions to destination, logical zero, logical one can be identified by correct.
In current system, in use, equilibrium corresponding in high speed digital signal processor all needs fine tuning to guarantee signal integrity with increasing the weight of to arrange to every root high-speed digital signal line (abbreviation to the cable of transmitting high speed digital signal).When high-speed digital signal line number is less, high-speed oscilloscope can be adopted to measure, the relevant method arranged in high speed digital signal processor that arranges by hand achieves the goal; And current telecommunications equipment is when having developed into high-speed digital signal line that is up to a hundred, even thousands of 2.5Gbps even 10Gbps, adopt instrument measurement to add demand that the artificial method arranged can not meet technological development, product manufacturing.
Summary of the invention
For the defect existed in prior art, a kind of automatic detection is the object of the present invention is to provide to complete the method that high-speed digital signal transmit-receive position arranges coupling.Adopt automation means, realize the automatic detection to high-speed digital signal line, automatically complete high-speed digital signal transmit-receive position coupling is set.
For reaching above object, the technical scheme that the present invention takes is:
Automatic detection completes the method that high-speed digital signal transmit-receive position arranges coupling, it is characterized in that, its concrete steps are:
The first step, for needing the high-speed digital signal plate 10 testing high-speed digital signal line, design corresponding test board 20: every block test board 20 possesses pseudo-noise code generator 30 and pseudo noise code verifier 40, the data output end 110 of test board 20 is connected to pseudo-noise code generator 30, and the data input pin 120 of test board 20 is connected to pseudo noise code verifier 40;
Second step, exploitation high-speed digital signal cross board 80: described high-speed digital signal cross board 80, for making the input signal on the arbitrary signal line data input pin 90 of high-speed digital signal plate 10, points to the arbitrary signal line data output end 100 of high-speed digital signal plate 10;
3rd step, design con-trol module 50, control module 50 for completing the setting of pseudo-noise code generator 30 on test board 20, pseudo noise code verifier 40, and by control channel 60, mutual between the control module 50 realizing two pieces of test boards 20;
Control module 50 completes the traversal of all data output end 110 preemphasis and data input pin 120 equilibrium setting, to determine optimized parameter;
4th step, first piece of test board gathers the error rate result of the combination setting of all preemphasis and equilibrium allocation and the pseudo noise code verifier 40 of correspondence; In all testing results, search the efficient balance of error rate optimum, preemphasis configuration combination; When effectively record exists many group valid data or the situation without any valid data, then:
When there are many group valid data: by artificial screening, select best configuration and be recorded in the control module 50 of test board from some groups of allocation optimums;
When without any valid data: corresponding high-speed bus physical characteristic cannot meet high-speed digital signal transmission demand, characterizes fabric swatch failure;
5th step, when detecting confirmation all high-speed digital signal line transmission no problem, preserves the optimal data obtained in control module 50, for subsequent development.
On the basis of technique scheme, test pseudo-noise code generator 30 and pseudo noise code verifier 40 that a pair high-speed digital signal uses same test board, or use two pieces of different test boards, use the pseudo-noise code generator 30 of wherein one piece of test board respectively, the pseudo noise code verifier 40 of another block test board.
On the basis of technique scheme, to the batch testing of whole high-speed digital signal plate 10, then need to use polylith test board 20, control channel 60 communication is mutually adopted between each test board, every a pair high-speed digital signal uses pseudo-noise code generator 30 and the pseudo noise code verifier 40 of same test board, or use two pieces of different test boards, use the pseudo-noise code generator 30 of wherein one piece of test board respectively, the pseudo noise code verifier 40 of another block test board.
On the basis of technique scheme, data input pin 90 and data output end 100 use the paired setting of acquiescence: the data making the data input pin 90 being sent to high-speed digital signal plate from the data output end 110 of same test board, point to the data output end 100 of the high-speed digital signal plate of the data input pin 120 corresponding to this test board, now only need one piece of test board 20 to complete the detection of a pair high-speed digital signal line.
On the basis of technique scheme, data input pin 90 and data output end 100 use the paired setting of acquiescence: the data making the data input pin 90 being sent to high-speed digital signal plate from the data output end 110 of one piece of test board, point to corresponding data output end 100, the data input pin 120 that corresponding data output end 100 connects is the data input pin 120 that another block test board uses in pairs with this data input pin 90, now completes the detection of a pair high-speed digital signal line with two pieces of test boards 20.
On the basis of technique scheme, when control module 50 determines optimized parameter, control module 50 controls pseudo noise code transmitter 30 and sends to the data output end 110 of its place test board and carry the signal of telecommunication of pseudo noise code; Control the corresponding data input pin 120 of pseudo noise code verifier 40 to its place test board and do abnormality detection to the signal of telecommunication received, concrete abnormality detecting process is as follows:
By arranging high-speed digital signal cross board 80, the data of the data output end 110 of second piece of test board are allowed to be sent to the data input pin 120 of first piece of test board, the equilibrium allocation of first piece of test board is set, by first piece of test board by control channel 60, send instruction to the second piece test board, carried out the configuration of different pre-add weight values by data output end 110 port that second piece of test board is right; After the preemphasis of each second piece of test board has configured, the error rate result of the lower pseudo noise code verifier 40 of first piece of test board record correspondence configuration; After second piece of test board completes the traversal of whole preemphasis configuration, first piece of test board arranges next equilibrium allocation, again sends the traversal that instruction to the second piece test board starts the configuration of second time preemphasis; Until complete the traversal of the combination of all preemphasis and equilibrium allocation.
Automatic detection of the present invention completes the method that high-speed digital signal transmit-receive position arranges coupling, adopt automation means, realize the automatic detection of high-speed digital signal line, automatically complete high-speed digital signal transmit-receive position coupling is set, can in detection and the setting without the need to automatically completing high-speed digital signal line when manual intervention, use manpower and material resources sparingly, also improve the accuracy of result, be applicable to the integrity detection of all high-speed digital signals, the later stage can also carry out the expansion of function.
Accompanying drawing explanation
The present invention has following accompanying drawing:
Control mode schematic diagram between Fig. 1 dish,
The automatic traversal search algorithm flow chart of Fig. 2 high-speed digital signal.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in further detail.
As shown in Figure 1, 2, automatic detection of the present invention completes the method that high-speed digital signal transmit-receive position arranges coupling, and its concrete steps are:
The first step, for needing the high-speed digital signal plate (being called for short high speed signal plate) 10 testing high-speed digital signal line, design corresponding test board 20: every block test board 20 possesses pseudo-noise code generator 30 and pseudo noise code verifier 40, the data output end 110 of test board 20 is connected to pseudo-noise code generator 30, and the data input pin 120 of test board 20 is connected to pseudo noise code verifier 40; By control channel 60 interaction data between two pieces of test boards 20;
Because high-speed digital signal uses in pairs, test pseudo-noise code generator 30 and pseudo noise code verifier 40 that a pair high-speed digital signal uses same test board, or use two pieces of different test boards, use the pseudo-noise code generator 30 of wherein one piece of test board respectively, the pseudo noise code verifier 40 of another block test board;
To the batch testing of whole high-speed digital signal plate 10, then need to use polylith test board 20, control channel 60 communication is mutually adopted between each test board, every a pair high-speed digital signal uses pseudo-noise code generator 30 and the pseudo noise code verifier 40 of same test board, or use two pieces of different test boards, use the pseudo-noise code generator 30 of wherein one piece of test board respectively, the pseudo noise code verifier 40 of another block test board;
Second step, exploitation high-speed digital signal cross board 80: described high-speed digital signal cross board 80, for making the input signal on the arbitrary signal line data input pin 90 of high-speed digital signal plate 10, points to the arbitrary signal line data output end 100 of high-speed digital signal plate 10;
During actual test, data input pin 90 and data output end 100 can use the paired setting of acquiescence: the data making the data input pin 90 being sent to high-speed digital signal plate from the data output end 110 of same test board, point to the data output end 100 of the high-speed digital signal plate of the data input pin 120 corresponding to this test board, now only need one piece of test board 20 can complete the detection of a pair high-speed digital signal line;
Also the data of the data input pin 90 being sent to high-speed digital signal plate from the data output end 110 of one piece of test board can be made, point to corresponding data output end 100, the data input pin 120 that corresponding data output end 100 connects is the upper data input pin 120 that uses paired with this data input pin 90 of another block test board (can arbitrarily), now need employing two pieces of test boards 20 just can complete the detection of a pair high-speed digital signal line, hereinafter describe to adopt two pieces of test boards to illustrate (when only needing one piece of test board 20 to complete the detection of a pair high-speed digital signal line for example, the data output end 110 connecting pseudo-noise code generator 30 can be considered as second piece of test board, the data input pin 120 connecting pseudo noise code verifier 40 is considered as first piece of test board),
3rd step, design con-trol module 50, control module 50 for completing the setting of pseudo-noise code generator 30 on test board 20, pseudo noise code verifier 40, and by control channel 60, mutual between the control module 50 realizing two pieces of test boards 20;
Due to preemphasis, the balanced discreteness arranged, the traversal that control module 50 has needed all data output end 110 preemphasis and data input pin 120 equilibrium to arrange, could determine optimized parameter: control module 50 controls pseudo noise code transmitter 30 and sends to the data output end 110 of its place test board and carry the signal of telecommunication of pseudo noise code; Control the corresponding data input pin 120 of pseudo noise code verifier 40 to its place test board and do abnormality detection to the signal of telecommunication received, concrete abnormality detecting process is as follows:
By arranging high-speed digital signal cross board 80, the data of the data output end 110 of second piece of test board are allowed to be sent to the data input pin 120 of first piece of test board, the equilibrium allocation of first piece of test board is set, by first piece of test board by control channel 60, send instruction to the second piece test board, carried out the configuration of different pre-add weight values by data output end 110 port that second piece of test board is right; After the preemphasis of each second piece of test board has configured, the error rate result of the lower pseudo noise code verifier 40 of first piece of test board record correspondence configuration; After second piece of test board completes the traversal of whole preemphasis configuration, first piece of test board arranges next equilibrium allocation, again sends the traversal that instruction to the second piece test board starts the configuration of second time preemphasis; Until complete the traversal of the combination of all preemphasis and equilibrium allocation;
4th step, first piece of test board gathers the error rate result of the combination setting of all preemphasis and equilibrium allocation and the pseudo noise code verifier 40 of correspondence; In all testing results, search the efficient balance of error rate optimum, preemphasis configuration combination; It should be noted that effective record here exists many group valid data or the possibility without any valid data, then:
When there are many group valid data: by artificial screening, select best configuration and be recorded in the control module 50 of test board from some groups of allocation optimums;
When without any valid data: corresponding high-speed bus physical characteristic cannot meet high-speed digital signal transmission demand, characterizes fabric swatch failure;
5th step, when detecting confirmation all high-speed digital signal line transmission no problem, preserves the optimal data obtained in control module 50, for subsequent development.
For the test of high-speed digital signal plate in Fonst4000, Fonst5000 system of Fiberhome telecommunication FONST product line and relevant device Selecting parameter, concrete implementation step is:
The first step, according to high-speed digital signal plate 10 actual demand in Fonst4000,5000 systems, designs corresponding test board;
Second step, designs the high-speed digital signal cross board applied in Fonst4000,5000 systems, makes any high-speed digital signal partitioned signal line data input pin on high-speed digital signal plate can be interconnected to any high-speed digital signal partitioned signal line data output end;
3rd step, complete the control module design on test board, carried out the traversal of combination of the digital signal data input of test board, the preemphasis on output port and equilibrium allocation by control module, obtain the error rate result of corresponding pseudo noise code verifier 40 as experimental result;
4th step, gathers experimental result, judges whether high-speed digital signal plate fabric swatch meets engineer applied needs, namely whether there is effective balanced preemphasis combination;
5th step, selects the optimal data in summarized results, for follow-up application; In actual measurement process, do not find the situation that high-speed digital signal lost efficacy.
The content be not described in detail in this specification belongs to the known prior art of professional and technical personnel in the field.
Claims (6)
1. automatically detected the method that high-speed digital signal transmit-receive position arranges coupling, it is characterized in that, its concrete steps are:
The first step, for needing the high-speed digital signal plate (10) testing high-speed digital signal line, design corresponding test board (20): every block test board (20) possesses pseudo-noise code generator (30) and pseudo noise code verifier (40), the data output end (110) of test board (20) is connected to pseudo-noise code generator (30), and the data input pin (120) of test board (20) is connected to pseudo noise code verifier (40);
Second step, exploitation high-speed digital signal cross board (80): described high-speed digital signal cross board (80), for making the input signal on the arbitrary signal line data input pin (90) of high-speed digital signal plate (10), points to the arbitrary signal line data output end (100) of high-speed digital signal plate (10);
3rd step, design con-trol module (50), control module (50) is for completing the setting of the upper pseudo-noise code generator (30) of test board (20), pseudo noise code verifier (40), and by control channel (60), mutual between the control module (50) realizing two pieces of test boards (20);
Control module (50) completes the traversal of all data output ends (110) preemphasis and data input pin (120) equilibrium setting, to determine optimized parameter;
4th step, first piece of test board gathers the error rate result of the combination setting of all preemphasis and equilibrium allocation and the pseudo noise code verifier (40) of correspondence; In all testing results, search the efficient balance of error rate optimum, preemphasis configuration combination; When effectively record exists many group valid data or the situation without any valid data, then:
When there are many group valid data: by artificial screening, select best configuration and be recorded in the control module (50) of test board from some groups of allocation optimums;
When without any valid data: corresponding high-speed bus physical characteristic cannot meet high-speed digital signal transmission demand, characterizes fabric swatch failure;
5th step, when detecting confirmation all high-speed digital signal line transmission no problem, preserves the optimal data obtained in control module (50), for subsequent development.
2. automatically detected the method that high-speed digital signal transmit-receive position arranges coupling as claimed in claim 1, it is characterized in that: test pseudo-noise code generator (30) and pseudo noise code verifier (40) that a pair high-speed digital signal uses same test board, or use two pieces of different test boards, use the pseudo-noise code generator (30) of wherein one piece of test board respectively, the pseudo noise code verifier (40) of another block test board.
3. automatically detected the method that high-speed digital signal transmit-receive position arranges coupling as claimed in claim 1, it is characterized in that: to the batch testing of whole high-speed digital signal plate (10), then need to use polylith test board (20), control channel (60) communication is mutually adopted between each test board, every a pair high-speed digital signal uses pseudo-noise code generator (30) and the pseudo noise code verifier (40) of same test board, or use two pieces of different test boards, use the pseudo-noise code generator (30) of wherein one piece of test board respectively, the pseudo noise code verifier (40) of another block test board.
4. automatically detected the method that high-speed digital signal transmit-receive position arranges coupling as claimed in claim 1, it is characterized in that: data input pin (90) and data output end (100) use the paired setting of acquiescence: the data making the data input pin (90) being sent to high-speed digital signal plate from the data output end (110) of same test board, point to the data output end (100) of the high-speed digital signal plate of the data input pin (120) corresponding to this test board, one piece of test board (20) is now only needed to complete the detection of a pair high-speed digital signal line.
5. automatically detected the method that high-speed digital signal transmit-receive position arranges coupling as claimed in claim 1, it is characterized in that: data input pin (90) and data output end (100) use the paired setting of acquiescence: the data making the data input pin (90) being sent to high-speed digital signal plate from the data output end (110) of one piece of test board, point to corresponding data output end (100), the data input pin (120) of the data input pin (120) that corresponding data output end (100) connects for another block test board uses in pairs with this data input pin (90), two pieces of test boards (20) are now used to complete the detection of a pair high-speed digital signal line.
6. automatically detected the method that high-speed digital signal transmit-receive position arranges coupling as claimed in claim 1, it is characterized in that: when control module (50) determines optimized parameter, control module (50) control pseudo noise code transmitter (30) sends to the data output end (110) of its place test board the signal of telecommunication carrying pseudo noise code; Control the corresponding data input pin (120) of pseudo noise code verifier (40) to its place test board and do abnormality detection to the signal of telecommunication received, concrete abnormality detecting process is as follows:
By arranging high-speed digital signal cross board (80), the data of the data output end (110) of second piece of test board are allowed to be sent to the data input pin (120) of first piece of test board, the equilibrium allocation of first piece of test board is set, by first piece of test board by control channel (60), send instruction to the second piece test board, carried out the configuration of different pre-add weight values by data output end (110) port of second piece of test board; After the preemphasis of each second piece of test board has configured, the error rate result of the lower pseudo noise code verifier (40) of first piece of test board record correspondence configuration; After second piece of test board completes the traversal of whole preemphasis configuration, first piece of test board arranges next equilibrium allocation, again sends the traversal that instruction to the second piece test board starts the configuration of second time preemphasis; Until complete the traversal of the combination of all preemphasis and equilibrium allocation.
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| CN104184617B (en) * | 2014-08-12 | 2017-12-26 | 福建星网锐捷网络有限公司 | InterWorking Equipment pre-add method for reconfiguration, device, system and the network equipment |
| CN106797357B (en) * | 2015-06-05 | 2019-10-01 | 华为技术有限公司 | The treating method and apparatus of high-speed serial signals |
| CN104980316B (en) * | 2015-06-16 | 2018-07-24 | 硅谷数模半导体（北京）有限公司 | data link monitoring method and device |
| CN105610607A (en) * | 2015-12-17 | 2016-05-25 | 上海市共进通信技术有限公司 | Method for achieving automatic adjustment of parameters of Ethernet based on PRBS |
| CN111159082B (en) * | 2018-11-07 | 2021-12-07 | 财团法人工业技术研究院 | Reconfigurable data bus system and method thereof |
| CN114006834A (en) * | 2021-10-30 | 2022-02-01 | 杭州迪普信息技术有限公司 | Debugging method and device for high-speed signal equipment |
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Effective date of registration: 20200818 Address after: 430000 East Lake high tech Development Zone, Hubei Province, No. 6, No., high and new technology development zone, No. four Patentee after: Wuhan Changjiang Computing Technology Co., Ltd Address before: China Science and Technology Park Dongxin road East Lake Development Zone 430074 Hubei Province, Wuhan City, No. 5 Patentee before: FIBERHOME TELECOMMUNICATION TECHNOLOGIES Co.,Ltd. |
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