CN102662911A - Control method for board-level reconfiguration infrared signal processor - Google Patents
Control method for board-level reconfiguration infrared signal processor Download PDFInfo
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- CN102662911A CN102662911A CN2012100736552A CN201210073655A CN102662911A CN 102662911 A CN102662911 A CN 102662911A CN 2012100736552 A CN2012100736552 A CN 2012100736552A CN 201210073655 A CN201210073655 A CN 201210073655A CN 102662911 A CN102662911 A CN 102662911A
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Abstract
The invention discloses a control method for a board-level reconfiguration infrared signal processor, mainly used for an infrared signal processing system. The technical proposal utilized by the method comprises a hardware portion and a software portion. The hardware portion mainly comprises a main control module, four task modules, a shared bus baseboard and a power supply module. The software portion mainly comprises system hardware state detection, system task management and scheduling, and system data communication management. The control method provided by the invention has main advantages as follows: the infrared signal processor utilizes a board-level reconfiguration method, so that fault tolerance and robustness of the system are increased; a design structure is simple; and configuration is flexible.
Description
Technical field
The present invention relates to infrared signal processing platform technology, is a kind of control method of plate level reconstruct infrared signal processor specifically.It is mainly used in the infrared signal processor system task scheduling management in the infrared signal processing platform.
Background technology
The reconstruct of plate level is a gordian technique of infrared signal processor; When it can break down at the task module hardware of infrared signal processor; System task is rescheduled at the task intermodule, thereby guarantee that the important system task can continue operation, improves fault-tolerance, the robustness of system.
The control method of conventional panels level reconstruct infrared signal processor has based on parallel bus and point-to-point universal serial bus dual modes such as VME, CPCI.Mode based on parallel buss such as VME, CPCI need be based on bus protocol, and to the driver of operating system developing special, the developing and debugging difficulty is big; Owing to compete shared bus between task module, need the bus manager arbitration, communication efficiency is not high, and can cause Single Point of Faliure.And based on the mode of point-to-point universal serial bus, needing needs a lot of universal serial bus connect mutually between the task module of reconstruct, perhaps the special-purpose universal serial bus link manager of exploitation; Household function is identical between reconfigurable task module, and the data source of only handling is different, can not reconstruct between the task module of difference in functionality.This shows that there is complex structure in the control method of traditional plate level reconstruct infrared signal processor, implements big, the shortcomings such as real-time is poor, very flexible of difficulty.
Therefore for the infrared signal processor, the plate level reconstructing method that designs a kind of reliable and effective is very necessary.Employing has advantages such as real-time is good, simple efficient based on the method for main control module and master control management bus.
Summary of the invention
The object of the invention is to propose a kind of control method of plate level reconstruct infrared signal processor, improves fault-tolerance, the robustness of infrared signal processor.
For realizing above-mentioned purpose, the hardware unit that the present invention adopted is: 5 universal signals are handled integrated circuit board (1 main control module, 4 task modules), 1 shared bus base plate, a power module.
Each hardware ingredient need satisfy: it is the 6U standard size that described universal signal is handled integrated circuit board; Integrated circuit board will have standard VME EBI; Integrated circuit board will have an open internal memory can pass through the VME bus access, and integrated circuit board can pass through VME EBI 5V direct current supply.Described shared bus base plate will meet the VME bus standard, and base plate has 10 integrated circuit board slots, provide+5V ,+12V ,-three kinds of direct supplys of 12V.Described power module will have AC-DC power source conversion function, input 220V AC power, output+5V ,+12V ,-three kinds of direct supplys of 12V, firm power is greater than 100 watts.
The infrared signal processor realizes that the control flow of plate level reconstruct is following:
(1) after the infrared signal processor powered on start, main control module was all the other 4 task processing module distribution system software tasks; Wait for the main control module configuration information after task module powers on, receive system software task and initiating task that main control module distributes; Main control module is set up task module communicate configuration table, manages the data communication between each task module;
(2) main control module monitor task module duty; If detected the task module fault; Then according to predefined system task priority; Carry out the system task management scheduling, give up lowest priority task all the other system tasks are assigned to the residue task module, revise task module communicate configuration table and continue to carry out the data communication between each task module;
(3) after reconstruct was accomplished, main control module continued monitoring residue task module, continues step (2) till all task module faults.
Distinguishing feature of the present invention be following some:
(1) real-time is good.Adopted the design proposal based on main control module, the data communication between all signal Processing integrated circuit boards has been avoided each signal-processing board competition backplane bus by the main control module unified management, has improved communication efficiency.Loaded all task softwares on each signal-processing board, broken down, when main control module requires the system software task to reconfigure, can significantly reduce the system software task and reload the time, reduced reconstitution time at certain signal-processing board.
(2) has the advantages of simplicity and high efficiency fault detection mechanism.
(3) main control module is through the plate level reconstruct of 3 allocation lists of management (task module integrated circuit board allocation list, system task allocation list, system task communication data allocation list) realization infrared signal processor, and scheme is simply efficient, and is practical.It is few to take software and hardware resources, and system overhead is few.
Description of drawings
Fig. 1 is the system chart of infrared signal processor.
Fig. 2 is the control flow chart of infrared signal processor card level reconstruct.
Embodiment
Do further to specify according to the accompanying drawing specific embodiments of the invention below.
Fig. 1 is the system chart of infrared signal processor.
The hardware unit that the present invention adopted is: 5 universal signals are handled integrated circuit board, 1 shared bus base plate, 1 power module.
Described universal signal is handled integrated circuit board, is mainly used in the software task module of operation infrared signal processor based on the frame design of DSP+FPGA: DSP; FPGA is used for data, bus controller, manages each signal Processing integrated circuit board via the communication data of sharing base plate.DSP among the present invention has selected the TMS320C6748 of TI company for use, belongs to the C6000 series high-performance DSP of TI.Fpga chip has been selected the XC6slx16 of the Spartan6 series of Xilinx company for use.Integrated circuit board has been realized the VME32 EBI based on FPGA.
Described shared bus base plate is based on the design of VME bus standard, and base plate has 10 integrated circuit board slots, provide+5V ,+12V ,-three kinds of direct supplys of 12V.
Described power module input 220V exchanges, output+5V ,+12V ,-three kinds of direct supplys of 12V, 150 watts of firm powers.
Fig. 2 is the process flow diagram of infrared signal processor card level reconstruct.
5 universal signals are handled integrated circuit board and are divided into 1 main control module, 4 task processing modules by function.Mutual data communication all realizes through sharing backplane bus between data communication between main control module and task module, the task processing module.All data communication are all by the main control module unified management, and main control module is as data switching center, and the unified numbering of communicating data block reads distribution by main control module between system task.Each signal Processing integrated circuit board all has the hardware address of fixed allocation, and 4 task processing modules respectively have one section internal memory opening, and VME bus base address is respectively 0x85000000; 0x85100000; 0x85200000,0x85300000 can be through the bus address visit.Main control module does not have open internal memory, can not be through the visit of VME bus address.4 task processing modules are except that the VME bus address difference of configuration, and the DSP of burning and FPGA program are just the same, have all loaded all system task softwares in the clamp storer.DSP that the main control module burning is independent and FPGA program.
Main control module plays a crucial role in system reconfiguration; Comprise the scheduling of system hardware state-detection (whether detect each task processing module hardware breaks down), system task management (system initially powers on, during the reconstruct of task module failure system; Be each task processing module distribution system task), system data communication management (data communication management between system task, the exchanges data between processing module of executing the task).Main control module is mainly managed 3 allocation lists: task module integrated circuit board allocation list, system task allocation list, system task communication data allocation list.Content in the task module integrated circuit board allocation list comprises: integrated circuit board ID, integrated circuit board bus base address, integrated circuit board malfunction; Content in the system task allocation list comprises: the integrated circuit board ID of system task ID, system task priority, operational system task; System task communication data allocation list content comprises: data block ID, origin system task ID, purpose system task ID, source address skew, destination address skew, data block length.
Task processing module operation main control module system configured task, the bus data visit of response main control module.When system needed reconstruct, the configuration order of response main control module was reloaded and is carried out new system task.Task processing module and communicating by letter of backplane bus are realized by FPGA; The data bus of task module keeps high-impedance state at ordinary times; Have only and when main control module reads the bus address of this module, just open port data are delivered to bus, when the bus address of main control module handwritten copy module, then deposit data in corresponding memory address.
Data communication is the gordian technique of signal processor reconstruct; System task possibly be loaded on the various tasks processing module integrated circuit board and carry out after the reconstruct; And the data input and output of task processing module integrated circuit board are only relevant with the system task of operation on it; Therefore must guarantee the correctness of data communication after the reconstruct, this is to realize through 3 allocation lists of main control module management.Main control module at first finds origin system task ID, the purpose system task ID of data block according to system task communication data allocation list; In the system task allocation list, find the integrated circuit board ID of operational system task then according to system task ID; Obtain at last total line source, the purpose base address of data block according to integrated circuit board ID, offset address, the block length information in the system task communication data allocation list of adding just can realize that reading of data block distributed.
Specify the control method of infrared signal processor card level reconstruct below:
(1) after signal processor powered on, the task processing module started the back and gets into waiting status, waits for the configuration order of main control module; After main control module started, it was normal to detect each task processing module duty, then system task is assigned to each task processing module, detected the state of waiting for each task processing module; After the task processing module was received the system task configuration order, loading system task, and the particular register state of revising comprised etc. active state, operation system task ID number of the task processing module.Main control module reads the state of each task processing module, logger task module integrated circuit board allocation list and system task allocation list.System start-up is accomplished, and gets into normal operating condition, main control module cycle detection task module state, carries out data communication according to system task communication data allocation list.
(2) FPGA in the task module has a counter register, and per count cycle adds 1, can pass through the VME bus access.Main control module cycle detection task module hardware state; Detection mode adopts response mode, if the inquiry of continuous 3 main control modules instruction task module is not answered, perhaps task module stops counting from counter; Can conclude that then task module breaks down, signal processor needs reconstruct.Main control module inquiry system task allocation list is that lowest priority task is not then done task and rescheduled like the fault module, only needs its task flagging is halted state, and main control module will no longer be managed the data communication of its task; If malfunctioning module is not a lowest priority task; Then find out lowest priority task and find out its task module integrated circuit board ID number; Transmission reconfigures order; System task on the malfunctioning module is dispatched to operation on it, and after the task module state returned success, main control module was revised the system task allocation list.System changes normal execution over to then, and main control module detects the task module state, carries out data communication according to system task communication data allocation list.
Claims (1)
1. the control method of a plate level reconstruct infrared signal processor, described infrared signal processor is made up of a main control module, four task modules and power supply, and it is characterized in that: the control method of plate level reconstruct infrared signal processor may further comprise the steps:
(1) after the infrared signal processor powered on start, main control module was all the other 4 task processing module distribution system software tasks; Wait for the main control module configuration information after task module powers on, receive system software task and initiating task that main control module distributes; Main control module is set up task module communicate configuration table, manages the data communication between each task module;
(2) main control module monitor task module duty; If detected the task module fault; Then according to predefined system task priority; Carry out the system task management scheduling, give up lowest priority task all the other system tasks are assigned to the residue task module, revise task module communicate configuration table and continue to carry out the data communication between each task module;
(3) after reconstruct was accomplished, main control module continued monitoring residue task module, continues step (2) till all task module faults.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2017010930A (en) * | 2015-06-17 | 2017-01-12 | ザ・ボーイング・カンパニーＴｈｅ Ｂｏｅｉｎｇ Ｃｏｍｐａｎｙ | Vme-p2 five row interface adapter assembly, system, and method |
| CN106502947A (en) * | 2016-10-24 | 2017-03-15 | 中国兵器装备集团自动化研究所 | A kind of multiprocessor computer task dynamic allocation method based on VPX buses |
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| JP2017010930A (en) * | 2015-06-17 | 2017-01-12 | ザ・ボーイング・カンパニーＴｈｅ Ｂｏｅｉｎｇ Ｃｏｍｐａｎｙ | Vme-p2 five row interface adapter assembly, system, and method |
| CN106502947A (en) * | 2016-10-24 | 2017-03-15 | 中国兵器装备集团自动化研究所 | A kind of multiprocessor computer task dynamic allocation method based on VPX buses |
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Application publication date: 20120912 |