CN102651039B - For the method and system that power delivery networks is analyzed - Google Patents

For the method and system that power delivery networks is analyzed Download PDF

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Publication number
CN102651039B
CN102651039B CN201110048087.6A CN201110048087A CN102651039B CN 102651039 B CN102651039 B CN 102651039B CN 201110048087 A CN201110048087 A CN 201110048087A CN 102651039 B CN102651039 B CN 102651039B
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model
power model
computer
circuit
user interface
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CN102651039A (en
Inventor
戴文亮
陈兰冰
冯国英
刘平
丹尼斯·内格尔
谭纪林
张文建
赵奇
周忠勇
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Cadence Design Systems Inc
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Cadence Design Systems Inc
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Priority to CN201110048087.6A priority Critical patent/CN102651039B/en
Priority to US13/404,688 priority patent/US8539422B2/en
Priority to US13/404,629 priority patent/US8631381B2/en
Priority to US13/404,738 priority patent/US8949102B2/en
Publication of CN102651039A publication Critical patent/CN102651039A/en
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Abstract

Subject application relates to the method and system analyzed for power delivery networks.The present invention be directed to a kind of for analyzing the computer-implemented method of power delivery networks (PDN) system.Described method can comprise: at least one in calculation element place receiving chip power model, encapsulation power model and plate power model; And in common simulation described chip power model, described encapsulation power model and described plate power model at least both.Many further features also within the scope of the invention.

Description

For the method and system that power delivery networks is analyzed
Technical field
The present invention relates to printed circuit board (PCB) (PCB) design and analysis.More particularly, the present invention relates to power delivery networks (PDN) analysis, it can occur before the actual integrated circuit of manufacture (IC).
Background technology
The PDN comprising electric power integrality (PI) and IRDrop analyzes the focus having become circuit designers and paid close attention to.These instruments allow at design and checking two step simulations and revise power distribution network.When performing PDN and analyzing, the frequency response of PDN can be analyzed.During proof procedure, the IRDrop that deviser also can perform Static and dynamic in the time domain analyzes.Use PDN analysis tool can allow Amending design during the design phase and before manufacturing side circuit.So just, the Time To Market of specific products significantly can be reduced.
For example, breach plane distributing electric power a kind ofly to be configured by the circuit common of distributing electric power to the functional module of wider circuit design.As illustrated in FIG. IA, breach plane distributing electric power is implemented by power plane 110 and ground plane 120 usually, and power plane 110 and being combined in of ground plane 120 will be called as electric power/ground plane herein to (PGPP) 100.Usually, power plane 110 and ground plane 120 separate with the form of plane parallel alignment, and are separated by dielectric.
Usually, breach plane power distribution network must adapt to electric current switching time extremely fast on its territory.Along with these switching times constantly increase from generation circuit to another circuit in generation, electric power integrality (PI) analysis has become the focus that circuit designers is paid close attention to, whereby can at design phase simulation and amendment power distribution network.Due to geometric configuration and the involved switching time of PGPP, usually use the next frequency dependent characteristic at design phase period analysis PGPP of transmission line modeling, thus careful design measure can be taked.For example, as is illustrated in figure ib, PGPP model 130 comprises multiple transmission line section model 140, and its each is all included in unit 135.When performing PGPP model 130, the frequency response of PGPP can be analyzed.Therefore, (such as) when obviously there is resonance under a certain frequency in impedance profile, deviser can add capacitive element, advantageously to change the resonance frequency composition of power distribution network in some the some place in PGPP.Owing to being analyzed by PI, can in the design phase and manufacture side circuit before realize this amendment, so the Time To Market of the product using described circuit significantly can be reduced.
But for simple plane is not difficult to transmission line modeling, the abstract shapes of typical PGPP causes complicated border, and some borders wherein may in the inside of the outer boundary of PGPP.For example, as is illustrated in figure ib, many PGPP models (such as PGPP model 130) are implemented in the uniform grid of unit 135, thus can adapt to complicated shape.Therefore, the unit 135 of squillion may be needed, to fill whole PGPP model 130.Although can use the complicated shape modeling that some algorithms come for PGPP, the computing cost of these algorithms is very expensive, especially when this little PI analysis tool must with other design tool shared computation resource.
Unfortunately, the shape that runs into of deviser and configuration often than the simple PGPP shown in Figure 1A far for complicated.For example, breach, hole, otch and the band electric power of seam, ground connection and signal via cause extra problem can to the deviser of particular electrical circuit.
Summary of the invention
In the first embodiment of the present invention, provide a kind of for analyzing the computer-implemented method of power delivery networks (PDN) system.Described method can be included at least one in calculation element place receiving chip power model, encapsulation power model and plate power model.Described method can comprise further in common simulation described chip power model, described encapsulation power model and described plate power model at least both.
What can comprise in following characteristics is one or more.In certain embodiments, described method can comprise execution IRDrop analysis further and perform electric power integrality (PI) analysis.
In certain embodiments, described Slab can comprise at least one in motherboard model and subcard model.Described method can comprise further and produces at least one results set based on described common simulation at least partly.In certain embodiments, described results set can comprise impedance measurement and voltage drop.Described method can comprise further to be revised stacking based on described results set at least partly.Described method also can comprise the existence by changing one or more decoupling capacitors and optimize described PDN system.In certain embodiments, common simulation can comprise map pins.
In another embodiment of the invention, a kind of resident is provided to store computer program on the computer-readable storage medium of multiple instruction thereon.Described instruction causes described processor executable operations when being performed by processor.Certain operations can comprise: at least one in calculation element place receiving chip power model, encapsulation power model and plate power model; And in common simulation described chip power model, described encapsulation power model and described plate power model at least both.
What can comprise in following characteristics is one or more.In certain embodiments, operation can comprise execution IRDrop analysis further.Operation can comprise execution electric power integrality (PI) further and analyze.In certain embodiments, described Slab comprises at least one in motherboard model and subcard model.Operation can comprise further and produces at least one results set based on described common simulation at least partly.In certain embodiments, described results set can comprise impedance measurement and voltage drop.Operation can comprise further to be revised stacking based on described results set at least partly.Operation can comprise the existence by changing one or more decoupling capacitors further and optimize described PDN system.In certain embodiments, common simulation can comprise map pins.
In another embodiment of the present invention, provide a kind of computing system.Described computing system can comprise: at least one processor; And at least one memory architecture, it is operatively connected with at least one processor described.Described computing system can comprise the first software module further, it is performed by least one processor described, and wherein said first software module is configured at least one in calculation element place receiving chip power model, encapsulation power model and plate power model.Described computing system comprises the second software module further, it is performed by least one processor described, wherein said second software module be configured to jointly to simulate in described chip power model, described encapsulation power model and described plate power model at least both.
What can comprise in following characteristics is one or more.Described computing system can comprise the 3rd software module being configured to perform IRDrop analysis further.Described computing system can comprise the 4th software module being configured to execution electric power integrality (PI) and analyzing further.In certain embodiments, described Slab can comprise at least one in motherboard model and subcard model.Described computing system can comprise the 5th software module being configured to produce at least one results set at least partly based on described common simulation further.In certain embodiments, described results set can comprise impedance measurement and voltage drop.Described computing system can comprise further and is configured to revise the 6th stacking software module based on described results set at least partly.Described computing system can comprise the existence that is configured to by changing one or more decoupling capacitors further and optimize the 7th software module of described PDN system.In certain embodiments, common simulation package is containing map pins.
State the details of one or more embodiments in the accompanying drawings and the description below.Further feature and advantage will be understood from description, graphic and claims.
Accompanying drawing explanation
Comprising accompanying drawing is for the ease of understanding embodiments of the invention further, and accompanying drawing to be incorporated in this instructions and to form the part of this instructions, describes embodiments of the invention in accompanying drawing, and in order to explain the principle of embodiments of the invention together with description content.
Figure 1A is the figure describing the right embodiment of power plane/ground plane;
Figure 1B be according to routine techniques with the figure of regular grid of transmission-line equivalent circuit thinking the frequency characteristic modeling that power plane/ground plane is right;
Fig. 2 is the system diagram describing system according to an embodiment of the invention;
Fig. 3 is the system diagram describing system according to an embodiment of the invention;
Fig. 4 is the system diagram describing system according to an embodiment of the invention;
Fig. 5 describes according to an embodiment of the invention the figure that plane is right power ground;
Fig. 6 is the system diagram describing system according to an embodiment of the invention;
Fig. 7 is the figure describing the result that electric power conveying analytic process according to the present invention produces;
Fig. 8 is the figure describing the result that electric power conveying analytic process according to the present invention produces;
Fig. 9 describes electric power according to an embodiment of the invention to carry the figure of the model used in analytic process;
Figure 10 describes electric power according to an embodiment of the invention to carry the figure of the model used in analytic process;
Figure 11 describes electric power according to an embodiment of the invention to carry the figure of some in the noncontinuity model used in analytic process;
Figure 12 describes electric power according to an embodiment of the invention to carry the figure of the model used in analytic process;
Figure 13 describes electric power according to an embodiment of the invention to carry the figure of the model used in analytic process;
Figure 14 describes electric power according to an embodiment of the invention to carry the figure of the model used in analytic process;
Figure 15 describes electric power according to an embodiment of the invention to carry the figure of the model used in analytic process;
Figure 16 describes electric power according to an embodiment of the invention to carry the figure of the model used in analytic process;
Figure 17 describes electric power according to an embodiment of the invention to carry the figure of the model used in analytic process;
Figure 18 describes electric power according to an embodiment of the invention to carry the figure of the model used in analytic process;
Figure 19 describes electric power according to an embodiment of the invention to carry the figure of the model used in analytic process;
Figure 20 describes electric power according to an embodiment of the invention to carry the figure of the model used in analytic process;
Figure 21 is the figure describing the result that electric power conveying analytic process according to the present invention produces;
Figure 22 is the figure describing the result that electric power conveying analytic process according to the present invention produces;
Figure 23 is the process flow diagram describing system according to an embodiment of the invention;
Figure 24 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 25 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 26 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 27 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 28 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 29 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 30 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 31 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 32 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 33 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 34 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 35 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 36 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 37 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 38 is the figure of the result display of the embodiment describing electric power according to the invention conveying analytic process;
Figure 39 is the system of the embodiment of electric power according to the invention conveying analytic process;
Figure 40 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 41 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 42 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 43 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 44 is the figure of the system of the embodiment describing electric power according to the invention conveying analytic process;
Figure 45 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 46 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 47 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 48 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 49 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 50 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 51 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process;
Figure 52 is the figure of the screenshot capture of the embodiment describing electric power according to the invention conveying analytic process; And
Figure 53 is the process flow diagram of the operation of the embodiment describing electric power according to the invention conveying analytic process.
Embodiment
Present by detail with reference to embodiments of the invention, the example of described embodiment will be described in the accompanying drawings.But the present invention can embody in many different forms, and should not be construed as limited to the embodiment stated herein.But, provide these embodiments for detailed and thoroughly, and concept of the present invention will will be conveyed to those skilled in the art completely to make the present invention.
As those skilled in the art will understand, the present invention can be presented as method, system or computer program.Therefore, the present invention can take the form of whole hardware embodiment, all embodiment of software implementation (comprising firmware, resident software, microcode etc.) or integration software and hardware aspect, and it generally all can be described as " circuit ", " module " or " system " in this article.In addition, the present invention can take the form of the computer program in computer usable storage medium, and wherein said computer usable storage medium has the computer usable program code be contained in media.
Any suitable computing machine can be utilized to use or computer-readable media.Computer-readable media can be computer-readable signal medium or computer-readable storage medium.Computing machine can use or computer-readable storage medium (comprising the memory storage be associated with calculation element or client electronic device) can be (such as, but be not limited to) electronics, magnetic, optics, electromagnetism, infrared or semiconductor system, equipment or device, or any appropriate combination of above-mentioned each.More particular instances (non-exhaustive list) of computer-readable media will comprise following each: have the electrical connection of one or more electric wires, portable computer diskette, hard disk, random access memory (RAM), ROM (read-only memory) (ROM), Erasable Programmable Read Only Memory EPROM (EPROM or flash memory), optical fiber, portable compact disc ROM (read-only memory) (CD-ROM), optical storage.In the context of this document, computing machine can with or computer-readable storage medium can be tangible medium, its can containing or store and used or the program that uses in conjunction with described instruction execution system, equipment or device by instruction execution system, equipment or device.
Computer-readable signal medium can including (for example) in base band or as carrier wave a part wherein comprise encoded computer-readable program through propagate data-signal.Described transmitted signal can take any one in various ways, and described form is including (but not limited to) electromagnetism, optics or its any suitable combination.Computer-readable signal medium can be and not be computer-readable storage medium and any computer-readable media that can transmit, propagate or carry the program used by the use of instruction execution system, equipment or device or combined command executive system, equipment or device.
Any suitable media can be used to transmit the program code that computer-readable media comprises, and described media are including (but not limited to) wireless, wired, fiber optic cables, RF etc., or any appropriate combination of above-mentioned each.
Available OO programming language (such as, Java, Smalltalk, C++ etc.) writes the computer program code for carrying out operation of the present invention.But, the computer program code for carrying out operation of the present invention also can be write with conventional procedural programming languages (such as, " C " programming language or similar programming language).In addition and/or alternatively, the hardware description language of any number (HDL) (including but not limited to VHDL and Verilog) can be used to write operation of the present invention.Described program code can be used as independently software package and perform on the computing machine of user completely, part performs on the computing machine of user, part performs on the computing machine of user and part performs on the remote computer, or to perform on remote computer or server completely.In a rear situation, described remote computer can be connected to the computing machine of user via LAN (Local Area Network) (LAN) or wide area network (WAN), maybe can be connected to outer computer (such as, use ISP and via the Internet).
Hereafter illustrate referring to process flow diagram and/or the block scheme of method, equipment (system) and computer program according to an embodiment of the invention to describe the present invention.To understand, and carry out implementing procedure figure by computer program instructions and illustrate and/or each square frame in block scheme, and process flow diagram illustrate and/or the combination of square frame in block scheme.The processor that these programmed instruction can be supplied to multi-purpose computer, special purpose computer or other programmable data processing device, to produce a machine, makes the processor via computing machine or other programmable data processing device and the described instruction that performs produces component for function/action specified in implementing procedure figure and/or block diagram block.
These computer program instructions also can be stored in computer-readable memory, the bootable computing machine of described computer-readable memory or other programmable data processing device work in a specific way, make the instruction be stored in computer-readable memory produce goods, described goods comprise the instruction of function/action specified in implementing procedure figure and/or block diagram block.
Computer program instructions also can load in computing machine or other programmable data processing device, on computing machine or other programmable device, sequence of operations step is performed to cause, thus produce computer-implemented process, make the instruction performed on computing machine or other programmable device be provided for the step of function/action specified in implementing procedure figure and/or block diagram block.
Referring to Fig. 2, displaying can to reside on server computer 212 and power delivery networks (PDN) process 210 that can be performed by server computer 212, described server computer 212 connectable to network 214 (such as, the Internet or LAN (Local Area Network)).The example of server computer 212 can be including (but not limited to): personal computer, server computer, a series of server computer, microcomputer and mainframe computer.Server computer 212 can be the web server (or a series of server) of operational network operating system, the example of described network operating system can (such as) including (but not limited to): server, or Red (Microsoft and form are that Microsoft is at the U.S., other national or the U.S. and other national registration trade mark; Novell and NetWare is that novell, inc. is at the U.S., other national or the U.S. and other national registration trade mark; Red cap is that red cap company is at the U.S., other national or the U.S. and other national registration trade mark; And in nanogram this be that Li Nasituo irrigates and grows at the U.S., other country or trade mark of the U.S. and other national registration.) in addition/alternatively, power delivery networks (PDN) process 210 can reside on client electronic device wholly or in part, and performed by client electronic device wholly or in part, described client electronic device is such as personal computer, notebook, personal digital assistant etc.
As will be discussed in more detail below, power delivery networks (PDN) process 210 can be used for analyzing the power delivery networks be associated with design of electronic circuits.PDN process 210 can comprise electromagnetism (EM) model of each in one or more discontinuity structures using at least one processor to extract for being associated with circuit design.Power delivery networks (PDN) process 210 can produce subsequently at least partly based on the three-dimensional adaptive grid model of extracted EM model.
By be incorporated into one or more processors (not shown) in server computer 212 and one or more memory modules (not shown) perform the instruction set of power delivery networks (PDN) process 210 and subroutine (it can comprise one or more software modules, and its can be stored in be coupled on the memory storage 216 of server computer 212).Memory storage 216 can be including (but not limited to): hard disk drive; Solid-state drive; Tape drive; Optical drive; RAID array; Random access memory (RAM); And ROM (read-only memory) (ROM).Memory storage 16 can comprise various types of file, and file type is including (but not limited to) hardware description language (HDL) file, and it can describe and executable specification by the port type containing hardware block.
Server computer 212 can perform web server application program, and the example can be including (but not limited to): MicrosoftIIS, NovellWebserver tM, or webserver, it allows to access to the HTTP (that is, hypertext transfer protocol) of server computer 212 via network 214, and (Webserver is that novell, inc. is at the U.S., other national or the U.S. and other country trade mark; And Apache is that Apache's software foundation is at the U.S., other national or the U.S. and other national registration trade mark).Network 14 can be connected to one or more two grade networks (such as, network 218), and for example, the example of described two grade network can be including (but not limited to): LAN (Local Area Network); Wide area network; Or Intranet.
Server computer 212 can perform electric design automation (EDA) application program (such as, EDA application program 220), the electric design automation application program that the example of electric design automation application program can obtain including (but not limited to) the assignee from subject application.EDA application program 220 can be mutual for Electronic Design optimization with one or more EDA client applications (such as, EDA client application 222,224,226,228).
Power delivery networks (PDN) process 210 can be independently application program, or can be can and/or the applet/application program/script that can EDA application program 220 in perform mutual with EDA application program 220.Except as except server-side process/as server-side process substitute, PDN process can be client-side process (not shown), it to reside in client electronic device (described below) and can be mutual with EDA client application (one or more such as, in EDA client application 222,224,226,228).In addition, PDN process can be the server side/client-side process of mixing, and it can be mutual with EDA application program 220 and EDA client application (one or more such as, in client application 222,224,226,228).Therefore, PDN process can all or part ofly reside on server computer 212 and/or one or more client electronic device.
Instruction set and the subroutine (it can be stored in and be coupled on the memory storage 216 of server computer 212) of EDA application program 220 is performed by being incorporated into one or more processors (not shown) in server computer 212 and one or more memory modules (not shown).
Instruction set and the subroutine (it can be stored in (difference) and be coupled on the memory storage 230,232,234,236 of client electronic device 238,240,242,244) that one or more processors (not shown) in client electronic device 238,240,242,244 and one or more memory modules (not shown) perform EDA client application 222,224,226,228 is incorporated into by (difference).Memory storage 230,232,234,236 can be including (but not limited to): hard disk drive; Solid-state drive; Tape drive; Optical drive; RAID array; Random access memory (RAM); ROM (read-only memory) (ROM), compact flash (CF) memory storage, secure digital (SD) memory storage, and memory stick memory storage.The example of client electronic device 238,240,242,244 can (such as) including (but not limited to) personal computer 238, laptop computer 240, mobile computing device 242 (such as, smart phone, net book etc.), notebook 244.By using client application 222,224,226,228, user 246,248,250,252 can access EDA application program 220, and user's (such as) can be allowed to utilize power delivery networks (PDN) process 210.
User 246,248,250,252 can directly via performing client application above (such as, client application 222,224,226,228) device (i.e. (such as), client electronic device 238,240,242,244) and access EDA application program 220.User 246,248,250,252 directly can access EDA application program 220 via network 214 or via two grade network 218.In addition, server computer 212 (that is, performing the computing machine of EDA application program 220) can be connected to network 214 via two grade network 218 (as illustrated with dotted line linkage lines 254).
Various client electronic device directly or indirectly can be coupled to network 214 (or network 218).For example, show that personal computer 238 connects via hard-wired network and is directly coupled to network 214.In addition, presentation notebook computer 244 connects via hard-wired network and is directly coupled to network 218.Show that laptop computer 240 is wirelessly coupled to network 214 via the radio communication channel 266 set up between laptop computer 240 and WAP (that is, WAP) 268, show that WAP 268 is directly coupled to network 214.For example, WAP268 can be IEEE802.11a, 802.11b, 802.11g, Wi-Fi and/or the blue-tooth device that can set up radio communication channel 66 between laptop computer 240 and WAP268.Show that mobile computing device 242 is wirelessly coupled to network 214 via the radio communication channel 270 set up between mobile computing device 242 and cellular network/bridge 272, show that cellular network/bridge 272 is directly coupled to network 214.
As known in the art, all IEEE802.11x specifications can use Ethernet protocol and have the Carrier Sense Multiple (that is, CSMA/CA) of the conflict avoidance shared for path.Various 802.11x specification can use (such as) phase-shift keying (PSK) (that is, PSK) to modulate or complementary code keying (that is, CCK) modulation.As known in the art, bluetooth be allow (such as) mobile phone, computing machine and personal digital assistant use short-distance wireless to be connected and carry out the telecommunications industry specification that interconnects.
Client electronic device 238,240,242,244 can executive operating system separately, and the example of described operating system can including (but not limited to) Microsoft's Window, Microsoft's Window the operating system that in red cap, nanogram this or other is suitable.(windows ce is that Microsoft is at the U.S., other national or the U.S. and other national registration trade mark.)
Referring now to Fig. 3, provide the one exemplary embodiment described according to system 300 of the present invention.System 300 can comprise multiple different assembly, and described assembly can be configured to perform some or all in the operation of PDN process 210.System 300 can comprise grid data processor 302, analyzer/simulator 304 and user interface 306.System 300 also can comprise processor controller 308, and described processor controller 308 can be configured to some or all (such as, grid data processors 302) in the assembly of control system 300.System 300 can be configured to perform PDN analytic process 310, as described in greater detail below, and can comprise various database 312 and circuit/model storage region 314.
In certain embodiments, exemplary system illustrated in fig. 3 can be implemented via data processing instructions, to form power delivery networks analytic system (PDNS) 300.Analysis circuit design can be carried out, to make to make suitable design decision by circuit designers operating system 300.In certain embodiments, system 300 can be configured to operate data (relative with to the circuit physically manufactured).It can comprise providing data formatting physically to manufacture described circuit on one or more circuit carrying media.For example, in order to construct other data any of the data of assembly and interconnect shield pattern, component placement position data, encapsulation of data and the required circuit product in order to have produced in the fabrication process.This general inventive concepts does not limit by any specific fabrication process, and when not departing from spirit and the given area of this general inventive concepts, any suitable manufaturing data form can use together with this general inventive concepts.
In certain embodiments, grid data processor 302 can comprise any suitable treatment circuit, and when not departing from spirit and the given area of this general inventive concepts, any suitable function can use together with this general inventive concepts.In certain embodiments, grid data processor 302 can be configured to perform various operation.Grid data processor 302 can construct net table such as, to define the structure of the grid assembly through interconnection, transmission line section equivalent-circuit model and resistive equivalent-circuit model.In certain embodiments, grid data processor 302 can perform one or more adaptive meshs and to become more meticulous program, is become more meticulous further by initial mesh whereby.This general inventive concepts does not limit by the particular of any data processing function of grid data processor 302, and when not departing from spirit and the given area of this general inventive concepts, any suitable function can use together with this general inventive concepts.Will be described below the data processing function carrying out this general inventive concepts in due course; In addition in order to provide the simple and clear description to general inventive concepts, its implementation detail will be omitted.
Used in any embodiment as described in this article, " circuit " individually including (for example) hard-wired circuit, programmable circuit, state machine circuit and/or the firmware storing the instruction performed by programmable circuit, maybe can comprise any combination of above-mentioned each.Should be understood that at first and software, firmware, hard-wired circuit and/or its any combination can implement any operation described in any embodiment herein and/or operability assembly.
System 300 can comprise analyzer 304 further, and it produces the analysis data obtained from the simulation through interconnection network assembly produced grid data processor.Analyzer 304 can implement various analytic function, including (but not limited to) electric power integrity analysis.Suitable electric design automation (EDA) system by having the feature of feature similarity as described above carrys out some parts of implementation system 300.By there is the existing EDA system of the novel feature as described herein be incorporated herein to put into practice this general inventive concepts.Program code by change EDA system is carried out this and is incorporated to, or this is incorporated to and can be used as functional module and be incorporated to, to be come and existing EDA system interaction by (such as) application programming interface (API) or other this type of mechanism.
In certain embodiments, system 300 can comprise one or more graphical user interface 306.Some possibility examples of user interface 306 are provided referring to each figure in this article.But scope of the present invention is not intended to be limited to these examples.User interface 306 can communicate with one or more peripheral units (not shown).Peripheral unit can comprise display unit and one or more input medias (such as mouse, tracking ball, stylus, touch-screen and/or touch pads etc.).The processing instruction of hardware unit and the suitable programmed to be performed by processor 302 be combined to form user interface 306.In some embodiment of this general inventive concepts, use user interface 306 data are presented to user with significant form over the display, such as by the image of the data management interface of circuit diagram, circuit arrangement map, circuit test worktable interface, such as file directory, and other image of user institute identification.
In certain embodiments, the user of any input media also can be handled that be interpreted as can by the message of process controller 308 identification and instruction by user interface 306.User interface 306 can comprise multiple user and control to provide to user and the interactivity of system 300 and the control to system 300.User controls to comprise input media as described above, and also can comprise the control of the implement software on display, such as button, command menu, Text Command item and other suitable software control.Graphical user interface (GUI) by suitable configurations meets the foregoing description of user interface 306, in order to provide the simple and clear description to general inventive concepts, will omit the implementation detail of above-mentioned each.
In a preferred embodiment, system 300 can comprise processor controller 308 to coordinate and the interoperability of functional module of control system 300, to realize the data handling system fully operated.Process controller 308 can be configured to the interoperability of the functional module of coordination and control system 300, to realize the data handling system of fully operation.For example, process controller 308 can receive the data that the user corresponding to user interface 306 handles, and data layout can be changed into the order in storer and/or Data Position, and can by the functional module that be suitable for of this communicating information to system 300.Process controller 308 can receive the treated data of the functional module of self application subsequently, and forwards said data to another functional module, and to indicate this to process on user interface 306.Embodiment according to system 300 is performed other and coordinates and control operation by process controller 360, and these other operations a little and its embodiment can be embodied by the well-known course control method for use of wider range and device.This general inventive concepts is intended to these a little replacement schemes all containing process controller 308, comprises multithreading and distributed process control method.
System 300 can comprise the database 312 maintaining the circuit object carrying out the necessary all data of design and analysis, amendment and manufacture circuit according to the specification of deviser.As used herein, circuit object is a kind of data structure, it can be stored in the data containing circuit component in storage arrangement, can be checked, revises, interconnect with other circuit component and analyze in one or more circuit design contexts selected by user to make circuit component.This realizes by suitable data abstraction technique, make specific circuit elements (such as) schematic symbols in schematic entry design context can be rendered as, be rendered as and take part in topological design context, be rendered as the routing component in circuit routing Design context, and provide as the component model in Circuit analysis and design inspection context.Circuit object also can be layering, and circuit object contains and has schematic symbols through interconnection to be formed, layout takies part and be used as other circuit object of circuit component of assembly of terminal feature model of discrete component in circuit whereby.The example of this circuit object is operational amplifier.Similarly, analytic target can be a kind of data structure, it can be stored in storage arrangement with the data containing NOT-circuit element (such as, cell data), can be checked to make NOT-circuit element, revised, with other NOT-circuit element interconnection and analyzing in one or more circuit design contexts selected by user.To understand, in following description content, unless otherwise clearly to the statement of phase negative side, otherwise the operation as performed on circuit component NOR circuit element hereinafter described imply can respectively by the assembly of system 300 to contained circuit object or analytic target executable operations.
To understand, according to definition given above, (such as terminal pad, electric wire, conductive trace and section thereof, inter-level vias, power plane and ground plane etc. are regarded as circuit component, and can comprise in the circuit object of correspondence in memory for interconnection and electrical distribution assembly.Dummy node also can be stored in circuit object, and is connected in any equivalent-circuit model between dummy node.In addition, circuit carrying media are also the circuit units that can be included in circuit object.Therefore, circuit designers can construct electrical distribution circuit on the circuit carrying media of (such as) silicon, and silicon has known permittivity, and it can be stored in the circuit object of circuit carrying media.This little physical constant and circuit unit size can be obtained, to construct equivalent-circuit model hereinafter described from the circuit object of the assembly forming electrical distribution circuit.
In certain embodiments, circuit storage area 314 can be the work space of (such as, in data-carrier store 312) in storer, memory circuit example wherein.As herein be suitable for, circuit example is the data structure containing checking, revise, in the storer of assessment and analysis circuit or the necessary all circuit objects of electronic circuit.To understand, and although single circuit storage area is only described in Fig. 3, can, when not departing from spirit and the given area of this general inventive concepts, using this little storage area of any number to provide set object as described herein.In addition, circuit storage area can be defined as static memory structure, maybe can be dynamically allocated.This general inventive concepts is not limited to the particular of circuit storage area.
Referring now to Fig. 4, provide the one exemplary embodiment described according to system 400 of the present invention.System 400 can allow model and/or the data acquisition of analyzing number of different types.In this way, system 400 can including but not limited to packaging model 402, chip power model 404, power noise/profile display 406, IC allocation plan 408 and PDN time series analysis model 412.
In certain embodiments, system 400 can be configured to perform PDN analytic process 410, and it can be configured to the performance (comprising electric power integrality, Static and dynamic IRDrop) analyzing composite electric transport net.For example, there is from those of various EDA database composite electric transport net of multiple power network, described multiple power network has some irregularly shaped (such as, breach, hole, otch) and sews up electric power, ground connection and signal via, shortly damages conductive traces and frequency dependent dielectric substance.
Again referring to Fig. 4, chip power model 404 (such as, distribution of current and passive electrical road network table) can obtain from one or more EDA databases, and encapsulation power model 402 can obtain from one or more EDA databases.Other Slab (such as, motherboard/subcard) is also analyzed together by Joint Designing flow process as shown in figure 39.PDN analysis 410 can realize IRDrop analysis and PI analyzes with the impedance and the voltage drop result that obtain the DIE side place in described system.According to analysis result, by revising stacking/IC assembly layout planning 408 and optimizing decoupling capacitor to improve electrical performance." stacking " plan refers to layout and the type of the layer in multilayer board as used herein, the term.
For purposes of the present invention, decoupling capacitor can refer to the capacitor that makes a part for electric network or circuit decoupled from one another.Noise caused by other circuit component is shunted by capacitor, and then reduces its impact on circuit remainder.By using whole extraction electric power system model jointly to simulate, can simulated timing diagrams analysis exactly, namely SSN/SSO/EMC/EMI analyzes.This discusses in detail further in Figure 39 to Figure 43.
Referring now to Fig. 5, provide the schematic diagram describing exemplary compound PDN structure 500.Any given power delivery networks can comprise extensive various shape.For example, the element in given PDN is often classified as evenly (such as, parallel-plate waveguide, electric power/ground plane) and non-homogeneous (such as, identified herein discontinuity structure).In some embodiments of the invention, for each discontinuity structure, can derived dyad Green function.Once realize this point, moment Method Analysis just can be used to extract S/Y parameter.These S/Y parameter models can be implemented in net table, and whole PDN can use one or more circuit simulators to simulate.
Most of electromagnetic problem can be stated according to nonhomogeneous equation formula:
Equation (1) LF=g
Wherein L is operational symbol, and it can be differential, integration or Integrated Derivative, and g is known exciting or source function, and F is unknown function to be determined.In general, method of moment is the program for solving (1).Why so the name of described method is because by being multiplied with appropriate weighting function and carrying out the process that integration adopts method of moment.Method of moment is essentially weighted residual method.Therefore, described method is applicable to solve differential equation and integral equation.
The program carrying out solving (1) for applying method of moment can relate to four steps:
1. derive appropriate integral equation (IE);
2. use basis (or expansion) function and weighting (or test) function IE to be changed (discretize) into matrix equation;
3. pair matrix element evaluation; And
4. solution matrix equation and obtain the parameter paid close attention to.
Method of moment method may need only computation bound value, but not the value in whole space, and thus it can for significantly more effective in computational resource the problem with less surface/volume.Conceptually, method of moment method can relate at structure " grid " above modeled surface.As discussed above, method of moment is applicable to the problem that can calculate Green function for it.Green function refers to the Certain function summary solving the nonhomogeneous differential equation formula of obeying specific starting condition or boundary condition substantially.
Again referring to Fig. 5, electric power and grounded screen can comprise complicated physical arrangement, and this is contrary with those shown in Figure 1A.For example, power network can have breach shape, and can including (for example) electric power through hole, grounding through hole and signal via.In addition and/or alternatively, can from breach shape, electric power through hole, grounding through hole, signal via, plane breach, hole, through hole anti-pad, horizontal edge, pin, reach through hole, interlayer horizontal edge, plane to, bottom short circuit through hole, cover breach plane and interlayer breach plane produces coupling effect.For purposes of the present invention, these can be contained in phrase " uncontinuity model ".Embodiments of the invention provide and extract the geometric configuration of concrete electromagnetism (EM) model for these discontinuity structures.
Referring now to Fig. 6, provide the process flow diagram 600 describing some example operation consistent with the present invention.Certain operations can comprise geometric configuration and extract 602 and generation three-dimensional adaptive grid 604.Operation can comprise identification uncontinuity model 606 and electric power and ground plane further to 608.Once identify these models, (such as) three-dimensional method of moments and Y parameter method 614,616 just can be used subsequently to carry out modeling 610,612 to it, as hereafter discussed in detail further.Operation can be included in the upper face of particular conductor further and be connected 618 and final PDN simulation 620 with the multinode in lower surface.
Based on extracted geometric configuration, the three-dimensional adaptive rectangular node configuration shown in Fig. 7 can be produced, its shape described multiple layer and combine with breach, hole, through hole anti-pad etc.For example, Fig. 8 describes three-dimensional adaptive grid, and wherein every one deck has identical grid, and each grid cell does not need at four corner Nodes aligned with each other.This can reduce the total number of unit, thus improves the performance of PDN analytic process.
Referring now to Fig. 9, provide the Figure 90 0 described according to one exemplary embodiment of the present invention.Figure 90 0 shows 3D grid, and it has the vertical view 906 of tile 902, unit 904 and tile and the cross-sectional view 908 of tile.For purposes of the present invention, each grid is represented by term " tile ", and each proximity conductor be embedded in " tile " is called as " unit ".Power delivery networks (PDN) analytic process can in order to produce tile and associated cell structures thereof.As hereafter discussed in detail further, method of moment method can be used to extract electromagnetism (EM) model (such as, having the unit Y parameter of length and width).
Referring now to Figure 10, provide the one exemplary embodiment describing Figure 100 0 of the present invention.Figure 100 0 describes tile structure 1002, and it has five conductive layer L1 to L5.Contrary with the classic method that each conductor only has a node an X-Y position, power delivery networks analytic process described herein can comprise the method that wherein each conductor at an upper portion thereof surface and lower surface has respectively two nodes.As shown in Figure 10, upper node is free of attachment to the bottom node of a conductor (such as, L1), because pass to bottom node without any electric current from upper node due to the kelvin effect under upper frequency.For example, each upper face and each lower surface have different node, wherein there are 5 conductive layers in tile.Exception, the top layers of each tile and bottom layer only can have a node in surface therein.
As illustrated in Figure 10 and according to embodiments of the invention, the such as representative dummy node illustrated on the conductor of Figure 10 can being utilized.As used herein, " dummy node " is the position contrary with the physical node of the connection formed between conducting element (such as physically the terminal of attainable circuit component or the knot of conducting element) on conductor.Dummy node physically away from the connection with physical circuit elements, but can serve as the physical node about some analytical technology, such as, form the interconnection of the grid of equivalent-circuit model, as described in one exemplary embodiment herein.All dummy node can be referred to herein to any use of term " node ".Dummy node also can define can to the point at mathematical operation evaluation place in numerical modeling process.For example, except equivalent electrical circuit modeling described below, the configuration of dummy node constructed according to the invention can in order to estimate circuit design herein by numerical analysis techniques such as such as finite difference time domain modeling, finite element method (FEM) and method of moment.
According to embodiments of the invention, the dummy node of any number can be placed to meet any arbitrary shape in the mode of the number reducing the net point required for routine techniques.Can memory capacity be reduced according to adaptive mesh of the invention process, and also reduce the number of the calculating analyzing specific circuit design.In certain embodiments of the present invention, dummy node can be aimed at according to coordinate system (such as cartesian coordinate system).
In certain embodiments of the present invention, dummy node can be contained in the region (such as unit) defining unit around each node.As used herein, unit is can be divided into other unit and/or be combined defining of district to form individual unit with adjacent unit.Unit can have any suitable shape.
Referring now to Figure 11, provide the one exemplary embodiment describing Figure 110 0 of the present invention.Figure 110 0 describes the decomposition of compound PDN structure 1101.After obtaining model for each unit in a tile, upper node cannot be directly connected to bottom node.Therefore, uncontinuity model from plane breach and horizontal edge and through hole/pin can be extracted to link top and lower surface node.In Figure 11, (wherein shorted on one end is connected for difference net detail display such as electric power, ground connection and signal via, shorted on both ends connects for identical net, and two ends are open in the middle of two planes), upper layer plane breach, interlayer plane breach, interlayer plane and horizontal edge and by discontinuity structures such as cutting plane edges.Specifically, PDN structure 1101 can be analyzed to pin 1102, reach through hole 1104, interlayer horizontal edge 1106, plane to 1108, interlayer breach plane 1110, on cover breach plane 1112 and bottom short circuit through hole 1114.It should be noted that these discontinuity structures only provide for exemplary purposes, because other embodiment is also within the scope of the present invention.
Referring now to Figure 12, provide the one exemplary embodiment describing Figure 120 0 of the present invention.Figure 120 0 describes the tile 1202 be made up of multiple unit 1204a to 1204e.In one embodiment, if the layer of this designating unit is stacking (such as, the conductance of thickness, two conductors, the dielectric substance comprising thickness specific inductive capacity, loss factor) be not yet extracted (as shown in figure 12), so during model extraction process, extract the areal model of each " unit " by method of moment.
Referring now to Figure 13, provide the one exemplary embodiment describing Figure 130 0 of the present invention.Figure 13 shows the grid cell be made up of four fragments.It should be noted that the unit with different size (such as, length and width) can have different S/Y/Z parameter model.For example, 4 Y parameter models 1302 can be adopted in the frequency dependent characteristic of the latticed rectangular element 1304 of design phase period analysis, make to take careful design measure.Figure 13 delineation unit model comprises multiple 4 annular fragment Y parameter models contained in unit.Each fragment can use method of moment to carry out modeling, on both sides, wherein has full magnetic term boundary, as shown in figure 14.
Referring now to Figure 15, provide the one exemplary embodiment describing Figure 150 0 of the present invention.In the past, model extraction may spend the plenty of time owing to there is a lot of different units, namely makes it have identical layer stacking, as shown in figure 15.Power delivery networks of the present invention (PDN) analytic process can utilize the calibration Y parameter model with a unit of cells length and width.This can be set by programmer, and can be used for model of element extraction.For purposes of the present invention, this can be referred to herein as " CELLDEF ".Use CELLDEF, any unit example with identical layer heap superimposition different length/width can obtain when not needing to perform method of moment field solver repeats, and this can remarkable improved model leaching process.Term " field solver " refers to the one or more special procedure that can solve in Maxwell's equation equation substantially.
Referring now to Figure 16, provide the one exemplary embodiment describing Figure 160 0 of the present invention.Figure 160 0 illustrates an embodiment, and it utilizes method of moment/CELLDEF method to carry out modeling to flat unit.In certain embodiments, top and bottom conductor can be considered as normally damaging material, and method of moment method can be used to determine equivalent magnetic current.Can respectively by the EM field utilizing Green function to calculate in three districts (such as, district a, district b and district c).This by TEM source is stamped in a port and to calculate at two port places reflect and realize with the EM field of transmission.S/Y parameter can use the method to calculate.After extraction unit cell model, new Y model of element example can not be produced immediately.In the present invention, the calibration Y parameter model with preseting length and width is created for flat unit example.Even if by obtaining Y parameter model for the given length of each example and width, also directly do not produce Y parameter model in the present invention, but with two scaling parameter---length and width.Below the specific consumption example provided in circuit meshwork list: Y_ example n1L1n2L1n1L2n2L2 file=length=4.2, cell.ynp width=2.1, its file " cell.ynp " is the CELLDEF with unit length=1mm, length=1mm, and n1L1, n2L1, n1L2 and n2L2 are the title of 4 Y parameter nodes.Width and length are to the intended size of structure from latticed tile/unit or rectangle plane.By using power delivery networks (PDN) analytic process described herein, the storage for Y parameter example model read/write file and/or parsing process significantly can be reduced.Use the unit Y parameter from CELLDEF, simulator can reconstruct according to its length and width parameter in inside and revise described value.
Referring now to Figure 17, provide the one exemplary embodiment describing Figure 170 0 of the present invention.Figure 170 0 illustrates an embodiment, and it describes the cross-sectional view of interlayer breach-planar structure, and described interlayer breach-planar structure comprises plane breach and horizontal edge uncontinuity model.As mentioned above, the node in the upper face of model of element and lower surface can not directly be connected to each other, but by plane and through hole uncontinuity model.In fig. 17, there is a breach plane/gap, it has thickness " t c", width " w ", and to be embedded in two tops and base plane.For middle layer conductor, left side exists two node n1L1 and n1L2, and it belongs to " unit 1 " 1702 and " unit 3 " 1706 respectively.Described two node n1L1 and n1L2 are positioned on left side, and it corresponds respectively to " unit 2 " 1704 and " unit 4 " 1708.These four nodes are connected with 8 node Y parameter models by breach areal model.For simplicity, be then connected to plane breach uncontinuity model by hypothesis n1L1 and n1L2 node adopt 6 nodal plane uncontinuity models at breach position short circuit.According to Figure 17, given breach plane and stacking width thereof, and the length of this breach is a variable.Therefore, the Y parameter for breach plane and edge plane only has a variable element---length.Herein, scale parameter is used.Below the consumption example for the interlayer breach plane in circuit meshwork list: Y_ example n1L1n2L1n1L2n2L2n1L3n2L3 file=cell.ynp scale=2, its file " cell.ynp " is the uncontinuity model with unit width=1mm, and n1L1, n2L1, n1L2, n2L2, n1L3 and n2L3 are the title of 6 Y parameter nodes of interlayer breach plane.Scale is the intended size from latticed breach planar structure.
Referring now to Figure 18, provide the one exemplary embodiment describing Figure 180 0 of the present invention.Figure 180 0 illustrates an embodiment, and it describes multiple additional planes uncontinuity model.For example, Figure 180 0 comprise cover breach areal model 1802, interlayer breach areal model 1804, on cover horizontal edge model 1806 peace in the face of 1808.As shown in figure 18, the number of the node that horizontal edge uncontinuity model needs can be two, and the number of the node that breach plane discontinuity model needs can be four, and this is described in further detail below.After extracting flat unit model and plane discontinuity model, method of moment calculating and/or frequency dependent kelvin effect function can be used to extract through hole model.In certain embodiments, can not calibrate through hole parameter model.Therefore, each dissimilar via stack and size can have different Y parameter model.Through hole model can be subdivided into some types, as shown in figure 19.
Referring now to Figure 19, provide the one exemplary embodiment describing Figure 190 0 of the present invention.Figure 190 0 illustrates an embodiment, and it describes some through holes in dissimilar through hole existing in power delivery networks.In certain embodiments, the through-hole structure comprising electric power through hole, grounding through hole and signal via between two planes carrys out modeling exactly by method of moment.As shown in figure 19, model 1 to 3 indicate plane to through hole/pin model, and model 4 to 5 instruction has the through hole model of microstrip configurations.
Referring now to Figure 20, provide the one exemplary embodiment describing Figure 200 0 of the present invention.Figure 200 0 illustrates an embodiment, and it is described according to through hole cylinder port of the present invention.In this embodiment, cylinder port can comprise two nodes, node in upper layer and another node on lower layer.Can define cylinder port and be connected to the rectangular element being adjacent to it, this illustrates in figure 21.In other words, through hole can be connected to adjacent plane cell node.In addition, the upper node on a planar conductor in the circuit meshwork list created and bottom node can be shorted together, as shown in figure 22.Figure 22 describes a through hole through the planar structure with an anti-pad, and now anti-pad is enough little and ignore to obtain superior performance during grid process.Remainder is the single Plane Gridding Model without other lap any.This Y parameter model can use kelvin effect formula Zs to obtain.In certain embodiments, the surface impedance between two nodes can be transferred in two node Y parameter models.Then, calibrate Y parameter model " SKINDEF " to can be used for carrying out modeling to single plane.Except interstitial content can be only except two, it can have identical description.
In certain embodiments, be similar to plane to model, skin model can be adopted to process single plane/shape and structure.First, shape also carrys out gridding by rectangular node, because each grid can be represented by four Y parameter skin models.For purposes of the present invention, Y parameter skin model can be derived from the SKINDEFY parameter model with scale (width/height) value, and the SKINDEF model wherein with unit scale=1.0 extracts as following equation (2) by analyzing full wave method:
Z s = k σ e kt + e - kt e kt - e - kt - - - ( 2 )
Wherein and t is the thickness of single plane.For this SKINDEF model, the skin model with different scale can obtain with its actual width/height ratio, and this can be similar to CELLDEF example provided above.After extraction unit skin model (SKINDEF), new Y skin model example can be produced.For purposes of the present invention, even if obtain Y parameter model by the given width/height for each example, also can with scaling parameter---width/height produces Y parameter model, this can create from single flat unit example.Be below the consumption example in circuit meshwork list: Y_ example n1L1n2L1 file=skin.ynp scale=0.5, its file " skin.ynp " is for having the SKINDEF of unit scale=1.0, and n1L1 and n2L1 is the title of 2 Y parameter nodes.Scale is the intended size (such as, width/height) from latticed rectangle uniplanar structure.By using the method, can greatly reduce and read for Y parameter example model and/or the storage of writing in files and parsing process.Use the unit Y parameter from SKINDEF, simulator can reconstruct according to its scale parameter in inside and revise described value.
Referring now to Figure 23, provide the one exemplary embodiment describing Figure 23 00 of the present invention.Figure 23 00 illustrates an embodiment, and it describes described power delivery networks analytic process herein.For plane to, after plane discontinuity, the single plane with surface impedance and through hole and pin configuration obtain Y parameter model, PDN analytic process can be incorporated to the some or all of assemblies in the assembly shown in Figure 23.By inputting excitaton source on package pin, three-dimensional stigmatometer can be used monitor or the voltage drop of inspecting on any measurement pin and impedance, as hereafter discussed in detail further.
Referring now to Figure 24, provide the one exemplary embodiment describing user interface 2400 of the present invention.User interface 2400 illustrates an embodiment, and it can power delivery networks analytic process according to the present invention use.As shown in figure 24, user interface 2400 can allow deviser to use electric power and ground connection label 2401 to configure electric power and grounded screen for analysis.UI2400 can allow deviser to assign correct voltage to the electric power in design and grounded screen.This can utilize " identifying DC net ", and label 2402 has come.UI2400 also can allow deviser to select electric power and grounded screen to analyze.This can utilize " selecting DC net ", and label 2404 has come.Deviser also can be allowed to use " assembly and port " label 2406 to carry out assigned source (VRM) for UI2400 or remittance (virtual) excites port.UI2400 also can allow deviser to pass through to utilize " xsect " label 2408 to define the xsect with indispensable thickness, conductance, specific inductive capacity and loss factor.UI2400 can allow deviser to use " library management " label 2410 to come repository path to comprise all required models further.UI2400 also can allow deviser to use " model appointment " label 2412 to assign appropriate model to all associated components.UI2400 also can allow deviser stacking with all pin/via pad of Sum fanction/heat/anti-pad parameter identification of correctly holing.Extra and/or alternative option is also within the scope of the present invention.
Referring now to Figure 25, provide the one exemplary embodiment describing user interface 2500 of the present invention.User interface 2500 illustrates an embodiment, and it can power delivery networks analytic process according to the present invention use.As shown in Figure 25, user interface 2500 can allow deviser to pass through to select " decoupling capacitor " label 2501 to configure one or more decoupling capacitors.UI2500 can provide all existing capacitor in design to deviser." net wave filter " label 2502 can in order to display and the decoupling capacitor being configured for particular power net.In order to configure the capacitor in other storehouse, " storehouse label " 2504 can be selected.Once be activated, just can select additional capacitor to analyze.Right click can be used on each capacitor to activate and to obtain extra popup menu order.UI2500 provides the ability using label 2508 to add, delete and edit capacitor model where necessary to deviser.Extra and/or alternative option is also within the scope of the present invention.
Referring now to Figure 26, provide the one exemplary embodiment describing user interface 2600 of the present invention.User interface 2600 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 26, user interface 2600 can allow deviser to use " assembly and port " label 2602 for selected arrangement of components port information (such as, port type, excite and divide into groups).UI2600 can comprise module window 2604, and it can allow deviser to select assembly to show corresponding pin/port information in display panel 2606.UI2600 can comprise " editor's profile " label 2608, and it can allow deviser to be that Joint Designing stream defines extra encapsulation and/or nude film profile.UI2600 can comprise " return path " label 2610 further, and it can allow deviser to be that each electric power pin in selected power network specifies return path.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 27, provide the one exemplary embodiment describing user interface 2700 of the present invention.User interface 2700 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 27, user interface 2700 can comprise " analysis " label 2702 under " electric power and ground connection " label 270I.Analyzing tags 2702 can comprise multiple option, including (but not limited to) grid, static IRDrop, PI plane and PI network analysis.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 28, provide the one exemplary embodiment describing user interface 2800 of the present invention.User interface 2800 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 28, user interface 2800 describes return path configuration, and it at once can show after the activation of the return path label 2610 from Figure 26.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 29, provide the one exemplary embodiment describing user interface 2900 of the present invention.User interface 2900 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 29, user interface 2900 describes return path configuration, and it at once can show after the activation of the port packet label 2612 from Figure 26.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 30, provide the one exemplary embodiment describing user interface 3000 of the present invention.User interface 3000 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 30, user interface 3000 is depicted in the display after the activation of " generally " label 3001 that " preference " shows.UI3000 can comprise some users can edit field, and wherein some can raise threshold value, target impedance shape (acquiescence) including (but not limited to) delta current, mains ripple, voltage (DC) IRDrop, current threshold, density threshold, temperature: corner frequency and slope (dB/ ten octave), decoupling capacitor: installation inductance and effective radius.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 31, provide the one exemplary embodiment describing user interface 3100 of the present invention.User interface 3100 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 31, user interface 3100 is depicted in the display after the activation of " simulation " label 3101 that " preference " shows.UI3100 can comprise some users can edit field, and wherein some can including (but not limited to) the scanning number in lower frequency, upper frequencies, scanning scale and frequency domain and Sum decomposition time duration in time domain.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 32, provide the one exemplary embodiment describing user interface 3200 of the present invention.User interface 3200 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 32, user interface 3200 is depicted in the display after the activation of " field solver " label 3201 that " preference " shows.UI3200 can comprise some users can edit field, and wherein some can including (but not limited to) gridding information 3202 and field solver information 3204.The hole considered in the shape of pin/through hole is selected when UI3200 can allow deviser in computing grid information 3202 and provide meticulous, regular, rough and customization option.For field solver 3204, full wave model option and can editing environment temperature and surperficial extra coarse degree field can be provided.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 33, provide the one exemplary embodiment describing user interface 3300 of the present invention.User interface 3300 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 33, user interface 3300 be depicted in " field solver " show the activation of " ignoring layer " label 3206 of 3201 after display.UI3300 can be deviser and provides the option selecting to ignore which layer during simulating.Once select to given layer, all shapes in selected layer and path just can be ignored in simulations.As shown in figure 33, such as other option such as layer title and type also can be provided.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 34, provide the one exemplary embodiment describing user interface 3400 of the present invention.User interface 3400 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 34, user interface 3400 be depicted in activation (right click etc. of such as mouse button) afterwards deviser can option.The selection of the individual item provided in Figure 34 can cause the one or more generation in user interface described herein.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 35, provide the one exemplary embodiment describing user interface 3500 of the present invention.User interface 3500 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 35, user interface 3500 be depicted in activation (right click etc. of such as mouse button) afterwards deviser can option.The selection of the individual item provided in Figure 35 can cause the one or more generation in user interface described herein.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 36, provide the one exemplary embodiment describing user interface 3600 of the present invention.User interface 3600 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 36, user interface 3600 is depicted in the display selected after impedance option.More particularly, UI3600 is illustrated in the impedance at top in a power supply profile and lower surface place.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 37, provide the one exemplary embodiment describing user interface 3700 of the present invention.User interface 3700 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 37, user interface 3700 is depicted in the display after the colored legend option 3602 selecting Figure 36.As shown in Figure 37, deviser can raise form from impedance, voltage, electric current, density and temperature and select.Specific numerical assignment can be given the individual color in colored legend.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 38, provide the one exemplary embodiment describing results set 3800 of the present invention.Results set 3800 illustrates the impedance curve shown for each package pin of simulating.Results set 3800 can produce based on the information provided in the user interface 3700 of Figure 37 at least in part.After selecting other option from UI3700, at once can show a large amount of additional result to graphically.
Referring now to Figure 39, provide the one exemplary embodiment of description of the present invention chip-package-plate configuration 3900.Encapsulation 3902, PCB (subcard) 3904 and PCB (motherboard) 3906 are described in the configuration provided in Figure 39.Together with the PDN model under plate level, encapsulating with chip power model and other chain connecting plate PDN model by mapped file is that systematic electricity Joint Designing stream is connected.As previously referring to Fig. 4 discuss, from one or more EDA application programs chip power model 404 (such as, distribution of current and passive electrical road network table), from the encapsulation power model 402 of one or more EDA application programs, other Slab (such as, motherboard/subcard) also analyze together by Joint Designing stream, as shown in figure 39.PDN analyzes 410 and IRDrop can be allowed to analyze and PI analysis, obtains impedance and voltage drop result with DIE side in systems in which.According to analysis result, by revising stacking/IC assembly layout planning 408 and optimizing decoupling capacitor to improve electrical performance.By jointly simulating with whole extracted electric power system model, can simulated timing diagrams analysis exactly (such as, simultaneous switching noise (SSN), simultaneously switch output (SSO), Electro Magnetic Compatibility (EMC) and electromagnetic interference (EMI) (EMI)).
Referring now to Figure 40, provide the one exemplary embodiment describing user interface 4000 of the present invention.User interface 4000 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 40, user interface 4000 can allow deviser to use " assembly and port " label 4002 for selected arrangement of components port information (such as, port type, excite and divide into groups).UI4000 can comprise module window 4004, and it can allow deviser to select assembly to show corresponding pin/port information in display panel 4006.UI4000 can comprise " editor's profile " label 4008, and it can allow deviser to be that Joint Designing stream defines additional package and/or nude film profile.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 41, provide the one exemplary embodiment describing user interface 4100 of the present invention.User interface 4100 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 41, user interface 4100 is illustrated in the activation of editor's profile tags 4008 of Figure 40 is a producible embodiment that may show afterwards.As shown in figure 41, UI4100 can comprise packaging model information 4102, nude film model information 4104 and be connected faceplate formation 4106.Packaging model information 4102 can including (but not limited to) device name, packaging model identification and PTMF label 4108.Nude film model information 4104 can including (but not limited to) nude film title, nude film model, nude film load and PTMF label 4110.Connect panel 4106 and at least can comprise plate to encapsulating connectivity option, being encapsulated into nude film connectivity option and Absorption Current option.Extra and/or alternative selection also within the scope of the invention.
Referring now to Figure 42, provide the one exemplary embodiment describing user interface 4200 of the present invention.User interface 4200 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 42, user interface 4200 is depicted in the activation i.e. producible display afterwards of the encapsulation PTMF label 4108 shown in Figure 41.UI4200 comprises map pins interface 4202, and it can allow interpolation and/or the deletion of some assembly designed.UI4200 can comprise further can select connectivity option 4204, in this particular instance, selects " plate " option.As shown in Figure 42, once select specific components (such as " U1 "), in pin display part 4206, just provide corresponding pin.Pin display part 4206 can comprise some fields, including (but not limited to) pin name, pin use, user name, port name, Pin locations and unit name.UI4200 can comprise the option adding and/or delete indivedual pin and port further.
Referring now to Figure 43, provide the one exemplary embodiment describing user interface 4300 of the present invention.User interface 4300 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 43, user interface 4300 is depicted in the activation i.e. producible display afterwards of the encapsulation PTMF label 4110 shown in Figure 41.UI4300 comprises map pins interface 4302, and it can allow interpolation and/or the deletion of some assembly designed.UI4300 can comprise further can select connectivity option 4304, in this particular instance, selects " chip " option.As shown in Figure 43, once select specific components (such as " U2 "), in pin display part 4306, just provide corresponding pin.Pin display part 4306 can comprise some fields, the field such as described referring to Figure 42 above.Similarly, UI4300 also can comprise the option adding and/or delete indivedual pin and port.
In some embodiments, port or pin terminals mapped file (PTMF) refer to the mapped file of a type that can use according to the present invention.The example of a part of PTMF is hereafter provided.
[connection] plate U1151
[connection type] PCB
[power network]
U16U1_U16CVDD4.445000e+003-5.715000e+003
U14U1_U14CVDD1.905000e+003-5.715000e+003
U12U1_U12CVDD-6.350000e+002-5.715000e+003
U10U1_U10CVDD-3.175000e+003-5.715000e+003
[connection] chip U2298
[connection type] DIE
[power network]
V48U2_V48CVDD-4.100000e+0031.900000e+003DIE_PAD
V44U2_V44CVDD-3.300000e+0031.900000e+003DIE_PAD
V40U2_V40CVDD-2.500000e+0031.900000e+003DIE_PAD
Referring now to Figure 44, provide the one exemplary embodiment describing system diagram 4400 of the present invention.Figure 44 00 illustrates an embodiment that can use according to power delivery networks analytic process of the present invention.As shown in Figure 44, embodiment as herein described can allow one or more results that display power delivery networks (PDN) is analyzed.In certain embodiments, can show 3-D view 4402, it is one or more that it describes in the result 4404 using PDN of electromagnetism stigmatometer 4406 to analyze.In certain embodiments, EM stigmatometer 4406 can receive stratum reticulare and/or background information 4408, and can be mutual with the software (comprising the eda software 4410 of other type) of other type a large amount of.
Referring now to Figure 45, show the one exemplary embodiment of the user interface 4500 consistent with the present invention.UI4500 can be configured to show one or more 3-D views based on the result analyzed from power delivery networks as herein described at least in part.UI4500 can comprise 3 d display 4502, and it can be configured to show real image.UI4500 can comprise some additional menus further, and wherein some can including (but not limited to) observability menu 4504, output menu 4506, threshold menu 4508 and display menu 4510.
In certain embodiments, UI4500 can be configured to produce three-dimensional animation in the time and/or frequency domain.UI4500 can comprise data format indicator 4512, and it can allow to select between the impedance in deviser's voltage in the time domain, electric current, density and temperature or frequency domain.Power delivery networks analytic process can use this to select to produce image for display in display panel 4502.UI4500 can comprise display pattern designator 4514 further, and it can allow deviser to select between comb mesh pattern and filling pattern.UI4500 also can comprise use 2D/3D and select label 4515 between two dimension and three-dimensional animation, carry out the option selected.In addition and/or alternatively, can be deviser and additional option be provided, wherein some can including (but not limited to) making described animation play, stop, F.F. and rewinding, as by abstract factory 4516 describe.In certain embodiments, PDN analytic process can allow to adjust film velocity, such as, via can be frame/second that unit can edit field to the user arranging film velocity.In certain embodiments, PDN analytic process can allow to use pivoting label 4518 to rotate shown image.For example, described process can allow deviser to pass through to select pivoting label 4518 or by pinning " ctrl " key and utilizing the peripheral units such as such as mouse to carry out rotated three dimensional result.
In certain embodiments, UI4500 can comprise camera option, such as camera drop-down menu 4520.Camera drop-down menu 4520 can be deviser provide camera position is guided at top, bottom, forward and backward, position, left and right option.Additionally or alternati, UI4500 can provide reduce with amplifying power and in display panel 4502 ability of mobile image.
In certain embodiments, it is functional that UI4500 can comprise worst condition, such as worst condition label 4522.In arbitrary given position, can change impedance according to the change of Frequency point, worst condition may correspond to the maximum impedance value under whole frequency range.UI4500 can be configured at once produce this value after the activation of worst condition label 4522.For time domain, can change voltage, electric current, current density value according to the time, worst condition may correspond in the maximal value exceeding threshold value for all time steps.It should be noted that described herein functional can animation mode (three-dimensional) or picture mode (two dimension) period application.
Referring now to Figure 46, provide the embodiment describing to export menu 4600 of the present invention.In this particular, output menu 4600 is shown as and has shown net information.This at once can show after selection net information labels 4602.As shown in Figure 46, some possibility examples of net information can including (but not limited to) voltage, impedance, IRDrop, electric current, density and temperature.Net information displaying can allow deviser to have the threshold value of the information changing each type to draw the option of better value.
Referring now to Figure 47, provide the embodiment describing to export menu 4700 of the present invention.In this particular, output menu 4700 is shown as and has shown stacking information.This at once can show after selection stacked labels 4702.As shown in Figure 47, some possibility examples of stacking information can including (but not limited to) layer title, type, material, thickness, conductance, dielectric and loss.Network information display can allow deviser to have the threshold value of the information changing each type to draw the option of better value.Some comprised coloud coding types display in field, it can use the colored legend in Figure 49 to arrange, and hereafter describes in further detail.In certain embodiments, power delivery networks analytic process of the present invention also can allow deviser to input one or more background papers.
Referring now to Figure 48, provide the embodiment of description observability menu 4800 of the present invention.Observability menu 4800 can comprise the display of the some or all of layers of instruction design.Observability menu 4800 can allow deviser to show or hidden layer information.For example, and as shown in Figure 48, observability menu can comprise pit, pin, through hole, background and total Options, and it can be hidden according to the preference of deviser or show.
Referring now to Figure 49, provide the embodiment of the colored legend 4900 of description of the present invention.Colored legend 4900 can allow deviser that one or more colors are assigned to a particular value, as shown in Figure 49.Changing format and method can be taken the circumstances into consideration, to perform and the comparing more accurately of desired value.
Referring now to Figure 50, provide description threshold value of the present invention to show the embodiment of 5000.Threshold value display 5000 can comprise form, net and threshold information.Option that threshold value display 5000 can be included in display plane in painting canvas further (that is, in the three-dimensional mode show or hide threshold plane).Threshold value display 5000 can allow deviser to change threshold value, to change the position of threshold plane.
Referring now to Figure 51, provide the embodiment of description display menu 5100 of the present invention.Display menu 5100 can comprise background, transparency and brightness option.Display menu 5100 can allow deviser to upgrade transparency and/or the brightness of work space backcolor and destination object, to obtain desired display result.
In certain embodiments, three-dimensional stigmatometer described herein can allow the interoperability with various EDA product.For example, three-dimensional stigmatometer can permit the easy transmission of the data from the arbitrary or all products can buied from assignee of the present invention.These data can directly directly be sent to three-dimensional stigmatometer described herein from other eda tool.
In addition and/or alternatively, in certain embodiments, three-dimensional stigmatometer can allow deviser to select individual partial wave by double-clicking (or otherwise activating) object ripple.Therefore, selection partial wave can be shown in single window.Deviser then can concentrate on the details of partial wave, and is not interfered because having other ripple in display window.
Referring now to Figure 52, provide the embodiment of description menu frame 5200 of the present invention.Menu frame 5200 and/or the abstract factory shown in Figure 45 4516 can be the option that deviser provides the data variation of inspecting under animation mode or picture mode.In addition and/or alternatively, menu frame 5200 can allow deviser to locate particular frame.In certain embodiments, the image that three-dimensional stigmatometer produces can export under animation mode or picture mode.
Referring now to Figure 53, provide the process flow diagram 5300 describing the operation consistent with power delivery networks analytic process of the present invention.PDN process can comprise: at least one (5302) in calculation element place receiving chip power model, encapsulation power model and plate power model; And at least both (5304) in common analog chip power model, encapsulation power model and plate power model.Other operation a large amount of also within the scope of the invention.
In some embodiments of the invention, power delivery networks analytic process is provided.Based on the physical layout specifying electric power and grounded screen, utilize and the electric power of specifying and grounded screen gridding are made to the three-dimensional adaptive spatial decomposition of the rectangular node node in mimic channel.This can realize when considering discontinuity structure, and described discontinuity structure can including (but not limited to) hole, and described hole comprises electric power anti-pad, ground connection and signal via, otch, breach etc.
In certain embodiments, and according to three-dimensional adaptive grid result, power delivery networks analytic process can comprise all-wave---and method of moment field solver, it can through optimizing to extract through hole efficiently and through the plane of gridding and plane discontinuity and for its modeling.
In certain embodiments, in order to acceleration model extracts and PDN simulation, the calibration Y parameter model with length and width parameter can be used to improve the efficiency of plane, plane breach and the plane edge model with different size.In addition, as described herein, power delivery networks analytic process can utilize unique upper and lower plane surface node to connect reach through hole and plane discontinuity model for the plane through gridding.
In certain embodiments, the result from power delivery networks analytic process can show intuitively in 3 D electromagnetic (EM) stigmatometer with physical layout's background and intersection probe function.Teaching of the present invention can be used for simulating various power delivery networks (PDN) to provide impedance and voltage drop analysis efficiently.Power delivery networks analytic process described herein also can provide high power capacity and the high accuracy of plate-encapsulation-chip/plate-plate circuit design and checkout procedure.
Be appreciated by those skilled in the art that, without departing from the spirit or scope of the present invention, various modifications and variations can be made in an embodiment of the present invention.Therefore, if described modifications and variations are in the scope of appended claims and equipollent thereof, so embodiments of the invention are set contains described modifications and variations.

Claims (12)

1., for analyzing a computer-implemented method for power delivery networks (PDN) system, it comprises:
At calculation element place receiving chip power model, encapsulation power model and plate power model;
There is provided the connecting interface can selected by user, the selection that wherein said connecting interface allows plate, encapsulation and chip to connect;
Receive the selection of at least one in described plate, encapsulation and chip connection;
The map pins file can selected by user is provided at graphical user interface place, wherein said graphical user interface is configured at once show map pins interface after the selection of described map pins file, and described map pins interface allows the Pin locations of user's selection of specific components and display and the described specific components subsequently of multiple pin name; And
Common simulation described chip power model, described encapsulation power model and described plate power model, wherein common simulation utilizes the map pins be associated with described map pins file at least in part.
2. computer-implemented method according to claim 1, it comprises execution IRDrop further and analyzes.
3. computer-implemented method according to claim 1, it comprises execution electric power integrality (PI) further and analyzes.
4. computer-implemented method according to claim 1, wherein said plate power model comprises at least one in motherboard model and subcard model.
5. computer-implemented method according to claim 1, it comprises further and produces at least one results set based on described common simulation at least partly.
6. computer-implemented method according to claim 5, wherein said results set comprises impedance measurement and voltage drop.
7. computer-implemented method according to claim 5, it comprises further revises stacking based on described results set at least partly.
8., for analyzing a computing system for power delivery networks (PDN) system, it comprises:
First module, it is configured at calculation element place receiving chip power model, encapsulation power model and plate power model;
Second module, it is configured to provide the connecting interface can selected by user, the selection that wherein said connecting interface allows plate, encapsulation and chip to connect;
3rd module, it is configured to the selection of at least one received in described plate, encapsulation and chip connection;
Four module, it is configured to provide the map pins file can selected by user at graphical user interface place, wherein said graphical user interface is configured at once show map pins interface after the selection of described map pins file, and described map pins interface allows the Pin locations of user's selection of specific components and display and the described specific components subsequently of multiple pin name; And
5th module, it is configured to jointly simulate described chip power model, described encapsulation power model and described plate power model, and wherein common simulation utilizes the map pins be associated with described map pins file at least in part.
9. computing system according to claim 8, it comprises the 6th module being configured to perform IRDrop analysis further.
10. computing system according to claim 8, it comprises the 7th module being configured to execution electric power integrality (PI) and analyzing further.
11. computing systems according to claim 8, wherein said plate power model comprises at least one in motherboard model and subcard model.
12. computing systems according to claim 8, it comprises the 8th module being configured to produce at least one results set at least partly based on described common simulation further.
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