CN102649536A - Structure-enhancing and sensitivity-increasing method for micro-machined components - Google Patents
Structure-enhancing and sensitivity-increasing method for micro-machined components Download PDFInfo
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- CN102649536A CN102649536A CN2011100469294A CN201110046929A CN102649536A CN 102649536 A CN102649536 A CN 102649536A CN 2011100469294 A CN2011100469294 A CN 2011100469294A CN 201110046929 A CN201110046929 A CN 201110046929A CN 102649536 A CN102649536 A CN 102649536A
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Abstract
The invention relates to a method for packaging micro-machined components produced by the micro-electro-mechanical system process or/and the semiconductor process, in particular to a structure-enhancing and sensitivity-increasing method for micro-machined components. Mainly, the etching technology is utilized to produce a surrounding ditch around a micro-machined component of a micro-structural sensor chip (first chip for short), the bottom of the ditch is a metal layer, and therefore soldering tin needed by flip chip can be contained and connected. Surrounding pillar bumps corresponding to the first chip are made by utilizing a chip (second chip for short) of a system circuit carrier, the surrounding ditch of the first chip and the surrounding pillar bumps of the second chip are aligned with each other and heated to be connected together, so that a hollow closing space is formed, and therefore the micro-machined component of the first chip is allowed to have a space for motion. In addition, for the second chip with a functional block, the pillar bumps which are needed by the connection of signals or electricity between the two chips can be further provided.
Description
[technical field]
The present invention is a kind of generic encapsulation mode of relevant little processing assembly, and its purpose ties up to the little processing assembly encapsulation technology of development one wafer scale low cost new; Can be used for little sensing components such as accelerometer, gyroscope, pressure gauge, microphone, infrared ray, and on little actuating assembly such as microswitch.
[background technology]
Relevant in this manual noun defines as follows in advance: little processing assembly and electric component of microcomputer are the synonym diction; Envelope wall (Seal Wall) is the synonym diction with centering on type guide pillar projection;
But present packaged type separated into two parts at electric component of microcomputer: first is zero level encapsulation (0-level packaging), normally utilizes the capping that does not have function, and chips such as for example blank silicon, glass, pottery seal electric component of microcomputer.Macromolecular material is often used with electric component of microcomputer joint on every side in its bottom of this capping; Like organic macromolecular material-benzocyclobutene (Benzocyclobutane; BCB) or gold, glass frit (glass frit) etc.; Because employed adhesion layer thickness is mostly below three to four microns, so the usefulness of enough spaces to the electric component of microcomputer motion can't be provided.Modal settling mode is to use etching technique that depression is dug out in capping, makes depression become the main space that offers the usefulness of electric component of microcomputer motion after the encapsulation.Utilize benzocyclobutene (Benzocyclobutane; BCB) accomplish encapsulation work; It is mode of heating by high temperature
; To contain the solvent evaporates in being hidden in; And produce moulding sclerosis gradually, then therefore capping and electric component of microcomputer chip can closely link, even can form protection cavity (Cavity).The advantage of this kind packaged type is; The technical staff can utilize the technology of light shield definition; The BCB that will not produce the earlier moulding sclerosis as yet etching of cutting blocks for printing, therefore select in the zone comparatively simple and easy, in addition under the hot environment of
; The aluminum metal characteristic of general integrated circuit can't wreck; This also has favorable compatibility to overall process, and BCB itself is because have good bond strength, extremely low dielectric loss (Dielectric Loss); And preferable high value characteristic, so this encapsulation technology has been applied among the micro electronmechanical field at present.Its shortcoming is that sealing can't be quite reliable, and in the filler process, the avalanche phenomenon takes place easily, and has influence on sensor cluster and encapsulation final vacuum degree.Have escaping gas in this external plasticizing process and produce, can be influential to the measurement that sensing component itself is follow-up.Because adhesive agent itself is non-conductive, only be fit to connect the capping of no circuit function in addition, be electrically connected function because of it can not provide.
Other packaged type comprises: (a) eutectic engages.(b) glass frit engages.The processing procedure that these two kinds of joints all must see through high temperature and high pressure carries out, and therefore the more fragile little processing assembly of structure is caused structural damage easily, reduces whole yield.Usually this equipment all costs an arm and a leg in addition, therefore on volume production, has the certain difficulty degree.Because the characteristic of processing procedure only is fit to connect the capping of no circuit function,, it is electrically connected function in addition because of can not providing.
Second portion: electric component of microcomputer combines with circuit; Also claim one-level encapsulation (1-level packaging); Can be to utilize routing and another signal processing circuit IC to be combined on the circuit board, or after utilization is covered brilliant and another signal processing circuit IC combines, be incorporated on the circuit board with routing and other assembly again; Or further signal processing circuit IC being carried out silicon runs through processing procedure (TSV; Through silicon via), utilizes the tin ball of its bottom directly to combine, and save the needs of routing with circuit board.Generally speaking, for asking area and the volume that dwindles final products, utilizing the packaged type that covers crystalline substance is long-term trend.In addition, the production method of CMOS-MEMS being arranged also, is that electric component of microcomputer and CMOS signal processing circuit are done together with the mode of SOC; For the reliability that makes encapsulation increases; Can use another capping, with circuit and the electric component of microcomputer of sealing lid complete package in addition, such secondary encapsulates that not only cost is high; And be difficult for using the wafer scale mode to encapsulate, just can not use a packaged type directly to accomplish.The inventive method system utilizes the method for an innovation; Once directly accomplish the encapsulation of above-mentioned zero level and one-level; (copper pillar) reaches enough intensity with double-deck copper guide pillar, is difficult for making capping avalanche, the width of copper guide pillar can use below 50 microns along with serviceability temperature or reflow temperature; Highly then between the 50-100 micron, the alloy of stanniferous is then electroplated in its top.
Copper guide pillar projection provides like higher interconnect wire density, higher reliability, the electrical and heat dissipation characteristics of improvement than traditional Solder Bumps processing procedure, and reduces plumbous or unleaded ... Etc. advantage.The Solder Bumps processing procedure can collapse (collapse) in the plumbous heating of tin reflow (reflow) process, and copper guide pillar projection then can remain on x, the shape of y and z axle three aspects.Therefore the present invention has following advantage:
1. by the encapsulation purposes not only being provided, the function of required working space of electric component of microcomputer or cavity can be provided also around type copper guide pillar projection.
2. in the process of encapsulation,, therefore can avoid collapse (collapse), can not cause the damage of assembly because of the mechanical strength of copper post projection is high.
3. work as sensing component and do littler and littler, more and more harsh for the demand of encapsulation volume, air tightness.It is not good to cooperate scolding tin and copper guide pillar can effectively solve the air tightness that is caused because of the coplane degree inequality during the course.
4. the copper guide pillar has favorable conductive ability and thermal conductivity, therefore combines microcontroller in future, removes and can be used as signal connection usefulness, and can effectively solve heat radiation, avoids the heat damage sensing component.
[summary of the invention]
Based on the disappearance that solves the above prior art, the present invention proposes a kind of novel electric component of microcomputer packaged type.It mainly is utilized in the encapsulation of various little processing assemblies; When making sensing component, produce simultaneously in response to package requirements sealing ring (Seal Ring) and signal weld pad (Pad) with the CMOS processing procedure; Utilize little electroforming then and grind processing procedure and on substrate, makes the envelope wall (Seal Wall) that seals usefulness and be connected the sensor signal and electric power connects required copper guide pillar projection.Next step sees through the chip bonding technology both is combined; Accomplish last sensor cluster encapsulation with surface mount technology (Surface Mount Technology) more at last.
[embodiment]
It is the low cost new sensor package technology of purpose with Flip Chip-on-Board that the object of the invention ties up to development one.Here we are in response to package requirements, add leave around the sensor chip one around sealing ring (Seal Ring) and signal weld pad (Pad); On substrate, produce connection sensor signal and electric power then and connect required copper guide pillar projection, and envelope wall or the title produced as chip sealing usefulness center on type guide pillar projection.Next step sees through the chip bonding technology both is combined; Accomplish last sensor cluster encapsulation with surface mount technology (Surface Mount Technology) more at last.
The guide pillar projection reaches and centers on type guide pillar projection manufacturing process, steps such as sputter, coating, ground floor exposure and the development of ground floor thick film photoresistance, electroforming ground floor copper guide pillar, the ground floor copper guide pillar that mainly comprises UBM grinds, coating, second layer exposure and the development of second layer thick film photoresistance, plating second layer scolding tin (Solder) projection, the grinding of second layer scolding tin (Solder) projection, photoresistance removal, UBM removal.Scolding tin can be plumbous and unleaded ashbury metal.
For further the present invention being had more deep explanation, be the present invention to be elaborated by embodiment, the Ji can be helpful in censorship to your juror.
[description of drawings]
Fig. 1: not with environment touch sensor encapsulation flow chart
Fig. 2: need and environment touch sensor encapsulation flow chart
Fig. 3: silicon perforation technical sensor encapsulation flow chart
The primary clustering symbol description
1?CMOS-MEMS?Chip
2 sealing rings
3 signal weld pads
4 microscope carriers
5 substrates
6 test circuits
7 bronze medal guide pillar projections
8 envelope walls
The weld pad that 9 routings are used
10 intermediary layers
11 RCAs
12 tin nodule number groups
13 plastics
14 sealing rings
15 envelope walls
16 passages
17 silicon perforations technology
18 tin ball or projections
[specific embodiment]
Embodiment one
Now the detailed structure that cooperates following graphic explanation the present invention, and connection relationship are beneficial to expensive careful committee and do a understanding.
See also shown in Figure 1, its be one not with environment contact electric component of microcomputer encapsulation schematic flow sheet; But the present invention in order to sensing components such as encapsulation accelerometer, gyroscope, absolute manometer, altimeters, or needs vacuum-packed actuator such as microswitch etc. with Using such method; Whole processing procedure specifies as follows:
Though it is noted that description here is main with chip, in fact is the wafer scale mode to carry out.
Step 1: electric component of microcomputer design and fabrication
See through semiconductor standard processing procedure; The TSMC of Taiwan Semiconductor Manufacturing Co. 0.35 processing procedure for example; Cooperate micro electronmechanical back processing procedure to make CMOS mems chip (CMOS-MEMS Chip) 1, be called for short first chip, and in chip design, add essential sealing ring (Seal Ring) 2 and signal weld pad (Pad) 3; Shown in Fig. 1 (a).Sealing ring (Seal Ring) the 2nd utilizes etching technique around electric component of microcomputer, to make around the type irrigation canals and ditches, and the bottom of these irrigation canals and ditches is a metal level, therefore can hold the scolding tin required with engaging chip package.For need the output that electric component of microcomputer is required going into signal or the power contact outer lead strides across the application that sealing ring 2 is connected to weld pad (Pad) 3, then use bottom metal M 1 as outer lead, its upper strata metal M 2 or M3 are then as the irrigation canals and ditches bottom.Required output is gone into signal or power contact if be arranged at sealing ring 2 for electric component of microcomputer, then need not outer lead, and metal M 1 or M2 or M3 all can be used as the irrigation canals and ditches bottom, are preferably metal M 1.Utilize the CMOS-MEMS process technique, it is other that sensing signal preamplifier circuit that also can be simultaneously that electric component of microcomputer is required or driving power amplifier circuit are arranged at electric component of microcomputer, particularly in the outside of sealing ring 2.Circuit then utilizes outer lead to link to each other with electric component of microcomputer.The output of circuit is gone into then with weld pad (Pad) 3 for it.
Step 2: microscope carrier chip (Carrier) 4 design and fabrications
Microscope carrier chip (Carrier) 4; Be called for short second chip; Be required electric power or micro controller system or radio circuit and the test circuit 6 of design first chip 1 on substrate 5; See through micro-photographing process, galvanoplastics and grinding technique then, make signal and connect envelope wall 8 (or title) around type guide pillar projection with copper guide pillar projection (Copper Pillar Bumps) 7 and sealing usefulness; Shown in Fig. 1 (b).Weld pad (Pad) the 3 corresponding settings of copper guide pillar projection 7 and first chip 1, the sealing ring 2 corresponding settings of 8 of envelope walls and first chip 1.The diameter of independent projection 7 can be at the 20-100 micron with height, and the width of envelope wall 8 can be at the 20-100 micron with height, and the width that forms the preferable envelope wall 8 of seal chamber is the 20-30 micron, and highly is the 80-100 micron.The height of independent projection 7 and envelope wall 8 is because make, so all be the same simultaneously.In some applications, second chip also can not be provided with electric power or micro controller system or radio circuit and test circuit, is silicon substrate, ceramic substrate etc. purely.In some applications, second chip also can be provided with required sensing signal preamplifier circuit of electric component of microcomputer or driving power amplifier circuit simultaneously.
Step 3: chip bonding (Flip-Chip Assembly)
Maybe can insert in the cavity of specific gas such as inert gas having controlled vacuum; The chip bonding board of the standard of seeing through or the function of infrared penetration chip are aimed at up-down structure; And utilize the reflow technology that two structures are combined; Make miniature mobile component be sealed within the closed chamber of suitable vacuum or specific gas (for example inert gas), be able to isolated extraneous interference, promote its reliability; Shown in Fig. 1 (c).Because reflow is the reliable and stable technology of industry, it operates in about 250 degree, can not exert an influence to micromodule, also can not discharge gas in closed chamber simultaneously.Further can after step 2, increase by a step places getter (getter) in the hermetic cavity body.This getter, the diaphragm type gettering material that provides of SAES Getters company for example, in addition Shen is long-pending and be patterned in the specific region, therefore in the present invention, can execute and do on the microscope carrier.After the sealing of two chips, heating 300 degree C at least 15 minutes can make the vacuum of cavity reach 0.1 or, 0.01 Torr, even lower.
Step 4: cut into crystal grain and engage with surface mount
The wafer that is combined is cut crystal grain, can excise the part of first chip outside the type projection junction, to manifest the weld pad that second chip can routing.Utilize surface mount technology that crystal grain is attached on the intermediary layer (Interposer) 9, with the routing juncture RCA 10 picked out again, the back side again with tin nodule number group 11 as external pin, intermediary layer (Interposer) 9 is generally the circuit board with connecting line; Shown in Fig. 1 (d).
Step 5: filler
Last filled plastics 12 carry out the complete seal protection with assembly; Shown in Fig. 1 (e).
The present technique characteristics: (1) can in the time of CMOS-MEMS processing procedure making face processing electric component of microcomputer, reach around the making of sealing ring, need not increase cost of manufacture; (2) because of sealing with envelope wall around, increase to seal the yield of reliability and processing procedure; (3) accelerometer and gyroscope or the microswitch etc. that seal fully for needs, package method of the present invention are not only simply but also reliable; (4) for the sensor chip that contains radio frequency/microcontroller/battery mac function such as (RF/Micron/Battery) capable of using of the adjustment of needs numerals or intelligent function or wireless transmission function as microscope carrier, to reduce packaging cost and material.(5) and these contain function of testing circuit tile system circuit microscope carrier substrate, the copper guide pillar projection that connects required signal of CMOS-MEMS chip assembly or electric power and the envelope wall of sealing usefulness then can further be provided.
Embodiment two
If required encapsulated sensor assembly needs to contact with environment; Like sensors such as microphone, meter pressure meter, hygrometer, gas sensors; Then can reserve passages (Vent hole) 15 at sealing ring (Seal Ring) 13 and envelope wall 14, in order to subsequent operation, the passage of microphone for example.Its packaged type, step 1 and step 2 are respectively shown in Fig. 2 (a) and Fig. 2 (b).Step 3 is identical with embodiment one with the step four fundamental rules, shown in Fig. 2 (c) and Fig. 2 (d); So because of its sensing component must contact with atmosphere, the step of Therefore, omited filler.
Embodiment three
Above-mentioned two embodiment, step 2 wherein: can be at its peripheral weld pad 17 of using as routing originally of second chip, directly with silicon puncturing technique (Through Silicon Via; TSV); Be connected to its base material bottom surface, and make tin ball or projection 18, can directly become the sensor of a complete package in its bottom; Save intermediary layer 9 shared area and volume, dwindle the volume and the cost of electric component of microcomputer encapsulation; As shown in Figure 3.
Silicon perforation (TSV) technology is known feasible skill; Propose one of its feasible method at this and explain that as a reference TSV is intercrystalline electric binding, the conventional method of structure TSV comprises and passes crystal grain; Etch an elongated orifices (perforation-via), and fill up copper.In this processing procedure, comprise many steps; The technology of etching perforation comprises Laser drill, " Bosch " Deep Reaction ion(ic) etching that Deep Reaction ion(ic) etching (DRIE) and deep layer perforation use.With plating mode perforation is filled up copper again, this is the permanent processing procedure of knowing, that is is through the substrate in the electric bath that is immersed in copper ions with electric current.Yet, in etching and insert between the step of copper, for guaranteeing that the function of filling perforation can correctly operate, must the long-pending three-layer-material in Shen.Ground floor is a separation layer, is used for the silicon body in the crystal grain and the copper among the TSV with electrical separation.The second layer is barrier layer (barrier layer), prevents that copper is diffused in the silicon.These two layer bodies are all the fundamental that assembly can correctly operate.Be that a copper lamina is called " copper crystal seed layer " (copper seed layer) on these layers body, whether it is quite important to follow-up electroplating process continuously, if discontinuous, then in filling copper, will generate the space, destroys perforation.This three long-pending work in Shen of body layer by layer at present all utilizes the dry type deposition manufacture process, for example PVD and CVD.
Though above-mentioned three embodiment or implementation method of the present invention all are target with the chip; In fact whole working of an invention is to carry out with the mode of wafer scale, that is to say that in the methods of the invention zero level encapsulation and one-level encapsulation can accomplish with the mode of wafer scale simultaneously.The mode of its enforcement has two kinds: first kind can let zero level be encapsulated in the periphery, and one-level is encapsulated in inside; Second kind then is that zero level is encapsulated in inside, and one-level is encapsulated in the periphery.(Wafer-level packaging is that the little processing assembly of group provides protecting sheathing WLP) to such wafer-level packaging, and this processing procedure just encapsulates crystal grain when wafer state, carry out back segment assembling processing procedure again.Then, wafer cuts again, becomes individual packages crystal grain.
In sum, the present invention's architectural feature and embodiment disclose all in detail; This method reaches the processing procedure that the traditional sensors packaged type can't reach with low cost and simply reaches handling ease ... etc. various advantages.So can fully demonstrate case of the present invention all dark well-off progressive of executing on purpose and effect; The value that has industry; And be utilization not seen before on the market at present; Spirit according to Patent Law is said, and case of the present invention meets the important document of patent of invention fully, so the application of proposition patent case is to obtain the protection of asking patent right.
The above person only; Be merely the present invention's preferred embodiment, when can not with the scope implemented of qualification the present invention, the equalization of promptly doing according to claim of the present invention generally changes and modifies; All should still belong in the scope that patent of the present invention contains; Sincerely ask your juror's explicit example for reference, and it being accurate to pray favour, is that institute is to praying.
Claims (14)
- One kind to micro electronmechanical processing procedure or with the method that little processing assembly that manufacture of semiconductor is accomplished encapsulates, mainly beHas the chip of little processing assembly; Be called for short first chip, utilize etching technique around little processing assembly, to make around the type irrigation canals and ditches, this irrigation canals and ditches bottom is a metal level; Therefore can engage and hold the required scolding tin of chip package; Also make simultaneously the weld pad that several connect little processing assembly, go in order to do the just output of signal or electric power, this weld pad can be located within the type irrigation canals and ditches or outside;At chip with microscope carrier function, be called for short second chip, make corresponding to first chip around type guide pillar projection, several that also make the weld pad that connects required signal of first chip or electric power simultaneously are to dozens of guide pillar projection;The type guide pillar projection that centers on around the type irrigation canals and ditches and second chip of first chip is aligned with each other, heats joint, form a hollow closed space, movable space is arranged with little processing assembly of allowing first chip with the chip package mode.
- 2. like the 1st said method of claim, guide pillar projection wherein is at least double-decker, and bottom is the copper guide pillar, and the upper strata is the required scolding tin of chip package.
- 3. like the 1st said method of claim, first chip wherein and second chip at least one of them, further comprise and drive the required power amplification circuit of little processing assembly structure.
- 4. like the 1st said method of claim, first chip wherein and second chip at least one of them, further comprise the required signal amplifier of the little processing assembly of sensing.
- 5. like the 1st said method of claim, wherein around the type guide pillar, its structure can be made the desired style according to designer's demand and made, like square, circular, hexagon, octagonal etc.
- 6. like the 1st said method of claim, wherein be unnotched envelope wall or blow-by wall construction jaggy around the type guide pillar.
- 7. like the 1st said method of claim, second chip wherein contains digital circuit or microcontroller.
- 8. like the 1st said method of claim, second chip wherein contains digital circuit and radio circuit.
- 9. like the 1st said method of claim, wherein further do when covering brilliant the combination at two chips, make the pressure around it reach the vacuum of setting, or feed inert gas in two chip hermetic cavity bodies.
- 10. like the 1st said method of claim, further increase by a step getter (getter) is placed in the hermetic cavity body.
- 11. like the method for the 1st of claim, processing procedure wherein is to carry out with wafer scale (wafer level) mode.
- 12. like the 11st said method of claim, it is following further to increase by a step: the wafer that is combined is cut crystal grain, can excise the part of first chip outside the type projection junction, to manifest the weld pad that second chip can routing; Utilize surface mount technology that crystal grain is attached on the intermediary layer (Interposer), with the routing juncture RCA is picked out middle interlayer again, at last with ball bar array (BGA) or flat all around unleaded (Quad Flat No leads, QFN) completion encapsulation.
- 13. like the 1st said method of claim, the diameter of copper guide pillar projection wherein and encapsulation wall and width are between 20 microns to 100 microns.
- 14. method according to the 1st of claim; Microscope carrier wherein (Carrier) can be at its peripheral weld pad of using as routing originally; Directly (Through Silicon Via TSV), is connected to its base material bottom surface with silicon perforation technology; And, can directly become the sensor or the actuator of a complete package in its bottom making tin ball or projection.
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| CN2011100469294A CN102649536A (en) | 2011-02-25 | 2011-02-25 | Structure-enhancing and sensitivity-increasing method for micro-machined components |
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| CN2011100469294A CN102649536A (en) | 2011-02-25 | 2011-02-25 | Structure-enhancing and sensitivity-increasing method for micro-machined components |
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| US20080067652A1 (en) * | 2006-09-18 | 2008-03-20 | Simpler Networks Inc. | Integrated mems packaging |
| TW200834756A (en) * | 2007-02-01 | 2008-08-16 | Advanced Semiconductor Eng | Package and method of making the same |
| CN101681854A (en) * | 2007-10-29 | 2010-03-24 | 艾普特佩克股份有限公司 | Package for semiconductor device and packaging method thereof |
| TW201103107A (en) * | 2009-07-07 | 2011-01-16 | Jung-Tang Huang | Method for packaging micromachined devices |
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2011
- 2011-02-25 CN CN2011100469294A patent/CN102649536A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200304682A (en) * | 2002-03-26 | 2003-10-01 | Intel Corp | Packaging microelectromechanical structures |
| US20080067652A1 (en) * | 2006-09-18 | 2008-03-20 | Simpler Networks Inc. | Integrated mems packaging |
| TW200834756A (en) * | 2007-02-01 | 2008-08-16 | Advanced Semiconductor Eng | Package and method of making the same |
| CN101681854A (en) * | 2007-10-29 | 2010-03-24 | 艾普特佩克股份有限公司 | Package for semiconductor device and packaging method thereof |
| TW201103107A (en) * | 2009-07-07 | 2011-01-16 | Jung-Tang Huang | Method for packaging micromachined devices |
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Application publication date: 20120829 |