CN102569337B - Anti-crosstalk flexible transparent memory array and preparation method thereof - Google Patents

Anti-crosstalk flexible transparent memory array and preparation method thereof Download PDF

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CN102569337B
CN102569337B CN 201210068383 CN201210068383A CN102569337B CN 102569337 B CN102569337 B CN 102569337B CN 201210068383 CN201210068383 CN 201210068383 CN 201210068383 A CN201210068383 A CN 201210068383A CN 102569337 B CN102569337 B CN 102569337B
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electrode
material
resistive
transparent
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CN102569337A (en )
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黄如
白文亮
蔡一茂
唐昱
张兴
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北京大学
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Abstract

本发明公开了一种防串扰的柔性透明存储阵列及其制备方法。 The present invention discloses a flexible transparent memory array and a method of preparing anti-crosstalk. 本发明采用有机二极管作为驱动管,制备工艺简单,占用面积小,方便等比例缩小。 The present invention uses an organic diode is used as the drive tube, simple preparation process, a small footprint and convenient scaled down. 本发明的材料均采用柔性透明的材料,除了具有阻变存储器本身的特性外,还具备柔性、透明等优点,尤其是解决了存储器在集成阵列中串扰的问题,制备的存储阵列可广泛应用在电子纸张、柔性透明显示及其他相关电子系统中。 Material of the present invention are made of flexible transparent material, in addition to having resistive characteristics of the memory itself, but also includes a flexible, transparent, etc., particularly to solve the problem memory crosstalk integrated array, the memory array can be widely produced in electronic paper, a flexible transparent display and other electronic systems. 本发明以有机材料取代了传统的昂贵笨重的硅和其他无机材料,是适应未来发展的绿色环保器件,还秉承了有机半导体材料质轻、成本低的优点,而且器件是全透明结构,可通过透明的封装工艺将其制作在透明设备或物品上,尤其可推动新一代显示技术。 In the present invention, the organic materials to replace the traditional bulky expensive silicon and other inorganic materials, the device is adapted to the future development of green, the organic semiconductor material also adhering to the light weight, and low cost, and the device structure is transparent, by transparent packaging process to produce the device or on a transparent article, in particular, can drive the next generation display technology.

Description

—种防串扰的柔性透明存储阵列及其制备方法 - a flexible transparent memory array and method of producing an anti-crosstalk

技术领域 FIELD

[0001] 本发明涉及柔性透明电子系统,具体涉及一种防串扰的柔性透明存储阵列及其制备方法。 [0001] The present invention relates to a transparent flexible electronic systems, particularly to a flexible transparent memory array and a method of preparing anti-crosstalk.

背景技术 Background technique

[0002] 近年来,集成电路得到迅猛的发展,其应用越来越广泛。 [0002] In recent years, it has been the rapid development of integrated circuits, which is more and more widely. 与此同时电子系统也正在与越来越多的其他类系统相结合,进而发挥更强大的功能和作用。 At the same time electronic system is also combined with a growing number of other types of systems, and thus play a more powerful role and function. 在这种发展趋势下,一种特殊的电路系统一柔性透明电子系统应运而生。 In this trend, a special electronic circuitry a flexible transparent system emerged. 柔性透明电子系统在卷曲或伸缩的同时具有透光功能,因此可以覆盖安装在任意曲面或者移动部件之上,大大扩展了电子系统的应用范围,尤其是在柔性透明显示等领域有广阔的应用前景,例如,目前已经有可弯曲透明手机和可弯曲透明平板电脑等电子产品问世。 The electronic system having a flexible transparent while twisting or stretching of the light-transmitting function, and therefore can be mounted on any surface covering or moving parts, greatly expanding the scope of application of electronic systems, especially those with broad application prospects in the field of the flexible transparent display For example, there are already flexible and bendable cell phone transparent transparent tablet PCs and other electronic products come out.

[0003] 二极管和阻变存储器在集成电路中各自扮演着十分重要的角色,其研发进展也很迅速。 [0003] diode and resistive random access memory integrated circuits in each plays a very important role in its development progress very rapidly. 阻变存储器是一种新概念非挥发型存储器,阻变存储器的存储单元一般为金属/功能薄膜层/金属三层结构,称三明治结构。 The resistive memory concept is a new type of nonvolatile memory, a resistive random access memory storage unit is typically a metal / functional film layer / metal three-layer structure, said sandwich structure. 其基本原理在于,材料的电阻在外加电压或电流的激励下可在高阻态(“O”状态)和低阻态(“I”状态)之间实现可逆转换,从而实现数据存储(存“O”或存“I”)的功能。 The basic principle is, the resistive material may be implemented reversibly switched between a high resistance state ( "O" state) and a low resistance state ( "I" state) at an applied voltage or current excitation, in order to achieve a data storage (memory " O "deposit or" I ") function. 同传统flash相比,阻变存储器具有结构和制备工艺简单、速度快、操作电压低等优点。 Compared with the conventional flash, resistive random access memory having a structure and preparation process is simple, fast, and low voltage operation. 同时,阻变存储器由于简单的单元结构,可以采用交叉阵列结构制备成存储阵列。 Meanwhile, due to a simple resistive memory cell structure, the memory array may be prepared using as a cross-array structure. 这种交叉阵列结构工艺简单、密度高、并具有较好的等比缩小能力,体现了制备多层重叠交叉阵列和三维集成的潜力。 This process is simple cross-array structure, high density, and has good ability to down-scaling, embodies the preparation of multiple overlapping and intersecting the three-dimensional array of potential integration. 但是如果把制备的存储阵列直接应用到电路中,则会因存在串扰和泄漏电流问题导致集成电路无法正常工作。 But if the memory array is directly applied to the preparation of the circuit, it will be due to the presence of crosstalk and leakage current problems result in an integrated circuit does not work. 以2x2的存储器的集成阵列为例,当四个相邻的存储器中的一个是高阻而其他三个都是低阻状态时,在读取高阻态的电阻时,电流不再通过该高阻的存储器,而是通过周围的三个低阻的存储器,形成电流通道,从而造成误读,这就是串扰现象,如图1所示。 An integrated memory array of 2x2 example, when four adjacent memory in a high impedance state while the other three are low resistance, the resistance at the time of reading the high resistance state, the current no longer by high a memory barrier, but by three low resistance around the memory, the current path is formed, resulting misreading, which is crosstalk, as shown in FIG. 事实上,串扰并不是只发生在与三个低阻的存储器相邻的这个高阻的存储器上,三个低阻的存储器形成的这个电流通道对周围其他的高阻态也会有影响。 In fact, not only the crosstalk occurs on the three low-resistance memory adjacent the high-resistance memory, the memory is formed of three low resistance current path around the other high-impedance state will be affected. 为提高电路的可靠性,有必要在存储阵列上引入二极管作为驱动管以解决串扰问题。 To improve the reliability of the circuit, it is necessary to introduce diode as a drive tube in order to solve the problem of crosstalk on the storage array. 在电路中二极管起选择和隔离的作用,当对高阻的存储器操作时,二极管打开,这样就选择了所需操作的存储器;当对低阻的存储器操作时,二极管关闭,避免对周围单元的误操作以及产生读取串扰,起隔离的作用,从而有效地抑制了存储器的集成阵列中的串扰问题。 The diode in the circuit selection and isolation, high impedance when the memory operation, diode opens, so that the selected memory operation is required; When low-resistance memory operation, diode turn off, to avoid the surrounding cells and generating erroneous reading crosstalk from isolation, thereby effectively suppressing the crosstalk in the integrated memory array. 采用二极管和阻变存储器集成方案的最小单元面积是4F2,且可以3D集成,因此存储密度可以做得很高。 A diode and an integrated resistive memory cell area is the smallest program 4F2, and can be integrated 3D, the memory density can be made high. 从而有效地解决了集成阵列中的串扰问题。 Effectively solves the problem of crosstalk in the integrated array.

[0004] 近年来,有文章报道过制备在柔性衬底、硅基及玻璃衬底上的二极管和阻变存储器的存储阵列。 [0004] In recent years, articles have reported diode memory array, and resistive random access memory fabricated on a flexible substrate, a silicon substrate and glass. 但由于使用的二极管及阻变器件的电极薄膜(大多数为金属)或介质层材料不是透明的,所以并不能达到柔性透明的效果。 However, since the diode electrodes and the thin film resistive device used (mostly metals) or a layer of dielectric material which is not transparent, it can not achieve the effect of a flexible transparent. 而且无机材料存在昂贵笨重,不易弯曲的缺点。 And there is expensive bulky, inflexible disadvantages inorganic material. 这些不足都在一定程度上限制了存储阵列的应用范围。 These deficiencies have limited the scope of application of the storage array to a certain extent.

发明内容 SUMMARY

[0005] 为了克服现有技术中的不足,本发明提供了一种可解决电路串扰问题的柔性透明存储阵列及其制备方法,以改变当前器件的应用和存在方式,使得防串扰的柔性便携式存储成为可能。 [0005] In order to overcome the deficiencies of the prior art, the present invention provides a flexible transparent memory array circuit and a preparation method can solve the problem of crosstalk, and present the current application to change the mode of the device, so that a flexible portable storage preventing crosstalk become possible.

[0006] 本发明的一个目的在于提供一种防串扰的柔性透明存储阵列。 [0006] An object of the present invention to provide an anti-flexible transparent storage array crosstalk.

[0007] 本发明的柔性透明存储阵列包括:柔性透明的衬底;形成在衬底上的m个条状的底电极;形成在底电极上的PN结;形成在PN结上的电极层;底电极及引出电极、PN结和电极层构成透明的二极管;形成在电极层上的阻变存储层;形成在阻变存储层上并与底电极相交叉的η个条状的顶电极;穿透阻变存储层、电极层和PN结并与底电极相连的引出电极;在引出电极和阻变存储层和电极层的侧壁之间的隔离侧墙;电极层、阻变存储层和顶电极构成透明的阻变存储器;上述结构均采用柔性透明的材料,m个条状的底电极与η个条状的顶电极相交的部分形成m*n的存储阵列,其中,m和η为自然数。 [0007] The flexible transparent memory array of the invention comprises: a flexible transparent substrate; forming a bottom electrode on the substrate of the m strip; PN junction is formed on the bottom electrode; forming an electrode layer on the PN junction; a bottom electrode and an extraction electrode, PN junction, and the transparent electrode layer composed of a diode; resistive storage layer is formed on the electrode layer; forming a stripe η top electrode layer on the resistive memory and intersecting the bottom electrode; wear through resistive storage layer, and the PN junction layer and the electrode lead-out electrode connected to the bottom electrode; lead-out electrode side wall spacer and the spacer between the storage layer and the resistive electrode layer; an electrode layer, a top layer and a resistive memory a transparent electrode made of a resistive memory; the above-described configuration are the use of flexible transparent material, the bottom electrodes and the m striped top electrode η bar-shaped portion formed of a memory array intersecting m * n, where, m is a natural number and η .

[0008] 二极管和阻变存储层共用电极层,电极层作为二极管的顶电极,同时作为阻变存储器的顶电极。 [0008] diode and a resistive storage layer common electrode layer, the electrode layer as a top electrode of the diode, while a top electrode of the resistive memory.

[0009] 衬底为聚对二甲苯(Parylene)等柔性透明的材料,以及如聚酰亚胺PI薄膜、聚二甲基硅氧烷PDMS薄膜、聚对苯二甲酸乙二醇酯PET薄膜、聚萘二甲酸乙二醇酯PEN薄膜等的塑料及橡胶材料中的一种。 [0009] parylene substrate (of Parylene) other flexible transparent material, such as polyimide and PI films, polydimethylsiloxane PDMS film, polyethylene terephthalate PET film, poly (ethylene naphthalate) PEN film such as an ester of plastic and rubber material.

[0010] 二极管为柔性透明的有机二极管,底电极的材料为掺铝氧化锌ΖΑ0、氧化铟锡ΙΤ0、石墨烯薄膜以及导电高分子材料聚乙撑二氧噻吩PEDOT等透明的导电材料中的一种,PN结的材料采用掺杂聚乙烯咔唑的聚烷基噻吩,也可以是如3-己基噻吩Ρ3ΗΤ:富勒烯衍生物PCBM混合薄膜、酞菁染料类有机材料中的一种。 A transparent conductive material [0010] a flexible transparent organic LED diode bottom electrode material is aluminum-doped zinc oxide ΖΑ0, indium tin oxide ΙΤ0, graphene thin film material and a conductive polymer polyethylene dioxythiophene PEDOT and the like in a species, the PN junction dopant materials used polyvinylcarbazole polyalkyl thiophene, may be such as 3-hexylthiophene Ρ3ΗΤ: mixing a fullerene derivative PCBM film, phthalocyanine-based organic material, of one.

[0011] 所述阻变存储器为具有双极型开关功能的透明有机阻变存储器。 [0011] The resistive memory having a bipolar switching function, a transparent organic resistive memory.

[0012] 电极层采用掺铝氧化锌ΖΑ0、氧化铟锡ΙΤ0、石墨烯薄膜以及导电高分子材料聚乙撑二氧噻吩PEDOT等透明的导电材料中的一种,阻变存储层的材料为聚对二甲苯聚合物为聚对二甲苯C型、聚对二甲苯N型以及聚对二甲苯D型材料中的一种,顶电极的材料为掺铝氧化锌ΖΑ0、氧化铟锡ΙΤ0、石墨烯薄膜以及导电高分子材料聚乙撑二氧噻吩PEDOT等透明的导电材料中的一种。 [0012] The electrode layer is made of aluminum-doped zinc oxide ΖΑ0, indium tin oxide ΙΤ0, graphene thin film and a conductive polymer material polyethylenedioxythiophene a transparent conductive material such as PEDOT dioxythiophene, materials resistive storage layer is poly parylene polymer is parylene C-type, N-type poly material and poly-xylene p-xylene for one D-type material, the top electrode is aluminum-doped zinc oxide ΖΑ0, indium tin oxide ΙΤ0, graphene and a conductive film of a transparent polymer material polyethylenedioxythiophene conductive material dioxythiophene PEDOT and the like.

[0013] 阻变存储器的阻变存储层的材料采用具有阻变特性的绝缘、透明的有机材料,制备过程不涉及高温,因此降低了能耗。 [0013] The resistive storage layer of resistive memory material having an insulated resistive properties, a transparent organic material, the manufacturing process does not involve a high temperature, thus reducing power consumption.

[0014] 本发明的二极管为柔性透明的有机二极管,制备工艺简单,占用面积小,方便等比例缩小。 [0014] The diode of the present invention is a flexible transparent organic diode, simple preparation process, a small footprint and convenient scaled down.

[0015] 本发明的柔性透明存储阵列把“柔性透明电子系统”、“驱动管”以及“阻变存储器”三者结合在一起,它除了具有阻变存储器本身的特性外,还具备柔性、透明等优点,尤其是解决了存储器在集成阵列中串扰的问题,制备的存储阵列可广泛应用在电子纸张(e-paper)、柔性透明显示(例如电子显示屏)及其他相关电子系统中。 [0015] The flexible transparent to the memory array of the present invention "flexible transparent electronic system", "Drive pipe" and the combination of the three transparent "resistive memory" together, which in addition to having resistive characteristics of the memory itself, but also have a flexible, etc., particularly to solve the problem of crosstalk in an integrated memory array, the memory array can be widely applied in the preparation of the electronic paper (e-paper), flexible transparent display (e.g., electronic display) and other related electronic systems.

[0016] 本发明的另一个目的在于提供一种防串扰的柔性透明存储阵列的制备方法。 [0016] Another object of the present invention is to provide a method of preparing a flexible transparent preventing crosstalk memory array.

[0017] 本发明的防串扰的柔性透明存储阵列的制备方法包括以下步骤: [0017] The method of preparing a flexible transparent preventing crosstalk memory array according to the present invention comprises the steps of:

[0018] I)提供一个有机柔性透明的衬底; [0018] I) providing a flexible transparent organic substrate;

[0019] 2)在衬底上生长一层柔性透明的导电层,光刻图形化,形成m个条状的底电极,m为自然数; [0019] 2) growing a layer of flexible transparent conductive layer on the substrate, photolithographic patterning, forming a bottom electrode strip of m, m is a natural number;

[0020] 3)在底电极上生长透明的有机物薄膜,形成PN结; [0020] 3) the growth of a transparent organic film on the bottom electrode, forming a PN junction;

[0021] 4)在PN结上溅射厚度100〜300nm的透明的导电薄膜,形成电极层; [0021] 4) in a PN junction on a transparent conductive thin film sputtering to a thickness of 100~300nm, forming an electrode layer;

[0022] 5)涂覆一层光刻胶,光刻并刻蚀至底电极的上表面,形成通孔; [0022] 5) coating a layer of photoresist, photolithography and etching to the upper surface of the bottom electrode, are formed through-holes;

[0023] 6)淀积厚度30〜60nm的阻变材料,形成阻变存储层; [0023] 6) 30~60nm deposited in a thickness of resistive material to form resistive memory layer;

[0024] 7)光刻刻蚀在底电极上的部分阻变材料,从而定义出底电极的引出通孔,同时,形成隔离侧墙; [0024] 7) on the bottom part of the lithographic etching resistive material of the electrode, to define the bottom electrode lead-out through hole, while forming an isolation spacer;

[0025] 8)在阻变存储层上生长柔性透明的导电层,光刻图形化,形成η个条状的顶电极,同时形成底电极的引出电极,η为自然数。 [0025] 8) grown on the layer of resistive memory flexible transparent conductive layer, lithographic patterning, forming a top electrode strip of [eta], while forming the bottom electrode lead-out electrodes, [eta] is a natural number.

[0026] 本发明的有益效果: [0026] Advantageous effects of the invention:

[0027] I)有机材料取代了传统的昂贵笨重的硅和其他无机材料,是适应未来发展的绿色环保器件; [0027] I) an organic material replaces the traditional bulky expensive silicon and other inorganic materials, the device is adapted to the future development of green;

[0028] 2)除了具备无机器件基本特性,还秉承了有机半导体材料质轻、成本低的优点,而且器件是全透明结构,可通过透明的封装工艺将其制作在透明设备或物品上,尤其可推动 [0028] 2) In addition to the basic properties of the inorganic components, organic semiconductor material also adhering to the light weight, and low cost, and the device structure is transparent, through the transparent packaging process can be produced on a transparent device or article, in particular may push

[0029] 新一代显示技术; [0029] The next generation display technology;

[0030] 3)在实现柔性、透明等技术优点的同时有效地解决了集成阵列中的串扰问题,使其更加实用化; [0030] 3) while achieving flexibility, transparency and other technical advantages of effectively solving the crosstalk problem integrated array, make it more practical;

[0031 ] 4)制备过程几乎不涉及高温工艺,降低了能耗,节省了制备时间,而且与现有工艺具有良好的兼容性。 [0031] 4) relates to the preparation of high-temperature process hardly, reducing energy consumption, save preparation time, but also good compatibility with the conventional process.

附图说明 BRIEF DESCRIPTION

[0032] 图1为现有的存储器的集成阵列中出现串扰的示意图; [0032] FIG. 1 is a schematic occurrence of crosstalk existing integrated memory array;

[0033] 图2为本发明的防串扰的柔性透明存储阵列的实施例的剖面图; [0033] a cross-sectional view of an embodiment of a flexible transparent preventing crosstalk memory array of FIG. 2 of the present invention;

[0034] 图3至图9为本发明的防串扰的柔性透明存储阵列制备方法的实施例的工艺流程图。 A process flow diagram of an embodiment of the method of preparing a flexible transparent memory array [0034] Figures 3 to 9 of the present invention, crosstalk prevention.

具体实施方式 detailed description

[0035] 下面结合附图,通过实施例,进一步阐述本发明。 [0035] DRAWINGS through examples further illustrate the invention.

[0036] 图2为本发明所提供的一种防串扰的柔性透明存储阵列的实施例的剖面图,如图所示,存储阵列包括:柔性透明的衬底I ;形成在衬底上的m个条状的底电极2 ;形成在底电极上的PN结3 ;形成在PN结上的电极层4 ;形成在电极层上的阻变存储层5 ;形成在阻变存储层上并与底电极相交叉的η个条状的顶电极6 ;穿透阻变存储层、电极层和PN结并与底电极相连的引出电极7 ;在引出电极和阻变存储层和电极层的侧壁之间的隔离侧墙8 ;上述结构均采用柔性透明的材料,m个条状的底电极与η个条状的顶电极相交的部分形成m*n的存储阵列,其中,m和η为自然数。 A cross-sectional view of an embodiment of the [0036] memory array a flexible transparent preventing crosstalk FIG. 2 of the present invention there is provided, as shown, the memory array comprising: a flexible transparent substrate I; m is formed on the substrate a bottom electrode strip 2; PN junction is formed on the bottom electrode 3; electrode layer is formed on the PN junction 4; resistive memory layer 5 is formed on the electrode layer; forming the bottom and on the resistive storage layer η electrodes intersecting a top electrode strip 6; penetration resistive storage layer, the electrode layer and the PN junction and the bottom electrode 7 is connected to the extraction electrode; lead-out electrodes and the sidewall of the storage layer and the resistive layer of the electrode isolation between the spacer 8; the above-described configuration are the use of flexible transparent material, the bottom electrode and the m striped η bar-shaped electrodes intersecting a top portion of a memory array is formed of m * n, where, m is a natural number and η.

[0037] 本发明所公开的防串扰的柔性透明存储阵列的一个实施例的制备方法如下: [0037] The method of preparing a flexible transparent embodiment of the memory array of the present invention is disclosed a crosstalk prevention is as follows:

[0038] I)将聚酰亚胺PI的衬底放入70V的NaOH水溶液中泡洗十分钟,然后将PI衬底放入异丙醇有机溶液中,超声清洗十分钟,最后用去离子水清洗,吹干,制备出衬底1,如图3所不; [0038] I) The polyimide PI substrate into an aqueous solution of NaOH soak wash 70V ten minutes, and then the PI substrate into an organic solution of isopropyl alcohol, ultrasonic cleaning for ten minutes, and finally with deionized water washing, drying, to prepare a substrate 1, not shown in FIG 3;

[0039] 2)利用旋转涂布的成膜方法,在衬底I上生长一层约10nm厚度的聚苯胺薄膜,并采用标准光刻技术使导电层图形化,形成2个条状的底电极2,如图4所示; The film forming method [0039] 2) by spin coating, a layer grown on the substrate I polyaniline film of about 10nm thickness, using standard photolithographic techniques and the conductive layer is patterned to form a stripe-shaped bottom electrode 2 2, shown in Figure 4;

[0040] 3)利用旋转涂布方法,三氯甲烷作为溶剂,在底电极2上甩胶涂膜制得掺杂聚乙烯咔唑的聚烷基噻吩薄膜,厚度约80nm,形成PN结3 ; [0040] 3) by a spin coating method, chloroform as a solvent, on the bottom electrode 2 doped spin coater coating film made of polyvinyl carbazole alkylthiophene polyethylene film with a thickness of about 80nm, 3 form a PN junction;

[0041 ] 4)利用磁控溅射方法,在PN结3上溅射ZAO透明的导电薄膜,厚度约为150nm,形成电极层4,由此,制得了以聚苯胺薄膜为底电极2,以掺杂聚乙烯咔唑的聚烷基噻吩薄膜为PN结3和以ZAO的电极层4为顶电极的透明的二极管,如图5所示; [0041] 4) by magnetron sputtering, sputtering the transparent conductive film 3 ZAO PN junction in a thickness of about 150nm, an electrode layer 4 is formed, whereby a thin film of polyaniline was prepared bottom electrode 2, polyvinyl carbazole doped poly-alkylthiophene as a PN junction thin film 3 and the electrode layer 4 to ZAO is a top transparent electrode, a diode, shown in Figure 5;

[0042] 5)旋涂一层光刻胶,光刻图形化后刻蚀至底电极2的上表面停止,去除光刻胶获得通孔,如图6所示; [0042] 5) spin-coating a layer of photoresist, after the photolithographic patterning etched onto the surface of the bottom electrode 2 is stopped, the resist is removed to obtain the through hole shown in Figure 6;

[0043] 6)利用聚合物(Polymer)化学气相沉积CVD (Chemical Vapor Deposit1n)技术,在电极层4上生长一层聚对二甲苯C型(Parylene-C)的阻变材料作为阻变存储层5,厚度约为40nm,如图7所示; [0043] 6) with a polymer (Polymer) chemical vapor deposition CVD (Chemical Vapor Deposit1n) technology, on the electrode layer 4 were coated with poly-para-xylylene resistive material type C (Parylene-C) as a resistive storage layer 5, a thickness of about 40nm, as shown in Figure 7;

[0044] 7)利用光刻技术,采用刻蚀方法去掉部分在底电极2上的部分阻变材料,从而定义出底电极的引出通孔,同时,被保护的Parylene薄膜又可以形成隔离侧墙8,保护引出通孔的四壁,以免在通孔中灌入导电材料时底电极与中间层接触,去除光刻胶,如图8所示,在此Parylene不仅作为器件的有源层,而且起到了自隔离保护的作用; [0044] 7) using a photolithography technique, an etching method using resistive material to remove the portion on the bottom electrode 2, the lead-through hole to define the bottom electrode, while the protected Parylene film but also forming an isolation spacer 8, the protection walls lead-through holes, so as not to contact with the bottom electrode and the intermediate layer when the conductive material is poured in the through hole, the photoresist is removed, as shown in FIG. 8, only here Parylene as the active layer of the device, and He played the role of self-isolation protection;

[0045] 8)利用旋转涂布的方法在阻变存储层5上涂布聚苯胺导电薄膜层,厚度约lOOnm,涂胶保护、曝光、显影,去除不需要的聚苯胺的部分,去除光刻胶形成顶电极6,同时形成引出电极7将底电极引出,如图9所示。 Method [0045] 8) by spin coating on the resistive film layer 5 is coated polyaniline memory layer, a thickness of about lOOnm, protective coating, exposure, development, the unnecessary portion is removed polyaniline, photolithography removed top electrode 6 is formed of plastic, while the bottom electrode lead 7 is formed an extraction electrode, as shown in FIG.

[0046] 从而,两个条状的顶电极与两个条状的底电极交叉的部分形成了二极管和阻变存储器构成的2*2的有机柔性透明存储阵列。 [0046] Thus, the bottom electrode and the top electrode strips two intersecting two strip-shaped portion forms a flexible transparent organic diode and a resistive memory array memory composed of 2 * 2.

[0047] 最后应说明的是:虽然本说明书通过具体的实施例详细描述了本发明使用的材料,结构及其制备方法,但是本领域的技术人员应该理解,本发明的实现方式不限于实施例的描述范围,在不脱离本发明实质和精神范围内,可以对本发明进行各种修改和替换,因此本发明的保护范围视权利要求范围所界定。 [0047] Finally, it should be noted that: While the specification describes particular examples of the material, structure and preparation method of the present invention in detail, those skilled in the art will appreciate that implementations of the present invention is not limited to the embodiments described range, without departing from the spirit and scope of the spirit of the invention, various modifications and substitutions may be made to the present invention, therefore depends on the scope of the present invention as claimed in claim scope thereof.

Claims (7)

  1. 1.一种柔性透明存储阵列,其特征在于,所述存储阵列包括:柔性透明的衬底⑴;形成在衬底上的m个条状的底电极⑵;形成在底电极上的PN结(3);形成在PN结上的电极层(4);形成在电极层上的阻变存储层(5);形成在阻变存储层上并与底电极相交叉的η个条状的顶电极(6);穿透阻变存储层和电极层并与底电极相连的引出电极(7);在引出电极和阻变存储层和电极层的侧壁之间的隔离侧墙⑶;所述衬底、底电极、PN结、电极层、阻变存储层、顶电极、引出电极和隔离侧墙均采用柔性透明的材料,m个条状的底电极与η个条状的顶电极相交的部分形成m*n的存储阵列,其中,m和η为自然数;所述PN结的材料为3-己基噻吩Ρ3ΗΤ:富勒烯衍生物PCBM混合薄膜。 1. A flexible transparent memory array, wherein the memory array comprises: a flexible transparent substrate ⑴; forming a bottom electrode ⑵ m strip on a substrate; PN junction is formed on the bottom electrode ( 3); forming an electrode layer (4) on the PN junction; forming resistive storage layer (5) on the electrode layer; forming a stripe η top electrode layer on the resistive memory and the bottom electrode intersect (6); penetration resistive storage layer and the electrode layer and the lead electrode (7) connected to the bottom electrode; ⑶ isolation spacer between the side wall and the lead-out electrodes and the resistive electrode layer, storage layer; said liner bottom, the bottom electrode, the PN junction, an electrode layer, a resistive memory layer, the top electrode, the extraction electrode and the separator are made of flexible transparent spacer material, the bottom electrode intersect with the m striped top electrode a strip-shaped portion η memory array is formed of m * n, where, m is a natural number and η; PN junction material is a 3-hexyl thiophene Ρ3ΗΤ: mixing a fullerene derivative PCBM film.
  2. 2.如权利要求1所述的存储阵列,其特征在于,所述衬底为聚对二甲苯的柔性透明的材料,以及聚酰亚胺PI薄膜、聚二甲基硅氧烷PDMS薄膜、聚对苯二甲酸乙二醇酯PET薄膜、聚萘二甲酸乙二醇酯PEN薄膜的塑料及橡胶材料中的一种。 2. The memory array according to claim 1, wherein the substrate is a flexible transparent material poly paraxylene, and polyimide PI film, polydimethylsiloxane PDMS film, polyethylene PET polyethylene terephthalate film, poly (ethylene naphthalate) and a rubber-plastic material of the ester of PEN film.
  3. 3.如权利要求1所述的存储阵列,其特征在于,所述底电极、电极层和顶电极的材料分别为掺铝氧化锌ΖΑΟ、氧化铟锡ΙΤΟ、石墨烯薄膜以及导电高分子材料聚乙撑二氧噻吩PEDOT的透明的导电材料中的一种。 3. The memory array according to claim 1, wherein said bottom electrode, a top electrode material layer and the electrodes are aluminum-doped zinc oxide ΖΑΟ, indium tin oxide ΙΤΟ, graphene thin film and a conductive polymer material poly a transparent conductive material ethylene dioxythiophene in PEDOT.
  4. 4.如权利要求1所述的存储阵列,其特征在于,所述阻变存储层的材料为聚对二甲苯聚合物为聚对二甲苯C型、聚对二甲苯N型以及聚对二甲苯D型材料中的一种。 4. The memory array according to claim 1, wherein said layer of resistive memory material is a parylene polymer is parylene type C, parylene N and parylene-type a D-type material.
  5. 5.一种柔性透明存储阵列的制备方法包括以下步骤: 1)提供一个有机柔性透明的衬底; 2)在衬底上生长一层柔性透明的导电层,光刻图形化,形成m个条状的底电极,m为自然数; 3)在底电极上生长透明的有机物薄膜,材料为3-己基噻吩P3HT:富勒烯衍生物PCBM混合薄膜,形成PN结; 4)在PN结上溅射透明的导电薄膜,形成电极层; 5)涂覆一层光刻胶,光刻并刻蚀至底电极的上表面,形成通孔; 6)淀积阻变材料,形成阻变存储层; 7)光刻刻蚀在底电极上的部分阻变材料,从而定义出底电极的引出通孔,同时,形成隔离侧墙; 8)在阻变存储层上生长柔性透明的导电层,光刻图形化,形成η个条状的顶电极,同时形成底电极的引出电极,η为自然数。 5. A method of preparing a flexible transparent memory array comprising the steps of: a) providing a flexible transparent organic substrate; 2) growing a layer of flexible transparent conductive layer, lithographic patterning on a substrate, forming a stripe m shaped bottom electrodes, m is a natural number; 3) the growth of a transparent organic film on the bottom electrode material is 3-hexylthiophene P3HT: PCBM mixed fullerene derivative film to form a PN junction; 4) sputtered on the PN junction a transparent conductive film to form an electrode layer; 5) coated with a photoresist, photolithography and etching to the upper surface of the bottom electrode, forming a via hole; 6) depositing a resistive material, resistive storage layer is formed; 7 ) photolithography etching portions of the resistive material on the bottom electrode, to define the bottom electrode lead-out through hole, while forming an isolation spacer; 8) grown on a flexible transparent electrically conductive layer resistive storage layer, lithographic patterning , forming a top electrode strip of [eta], while forming the bottom electrode lead-out electrodes, [eta] is a natural number.
  6. 6.如权利要求5所述的制备方法,其特征在于,在步骤4)中,所述电极层的厚度在100〜300nm之间。 Preparation method according to claim 6, wherein in step 4), the thickness between the electrode layer 100~300nm.
  7. 7.如权利要求5所述的制备方法,其特征在于,在步骤6)中,所述阻变存储层的厚度在30〜60nm之间。 7. The method as claimed in claim 5, wherein, in step 6), the resistive 30~60nm between the thickness of the memory layer.
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