CN102567120A - Node scheduling priority determining method and node scheduling priority determining device - Google Patents
Node scheduling priority determining method and node scheduling priority determining device Download PDFInfo
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Abstract
An embodiment of the invention provides a node scheduling priority determining method and a node scheduling priority determining device. The method includes the steps: in a multi-core processor determining the node scheduling priority according to the task queue depth, on each assembly line, lowering the scheduling priority of a node n-1 before a node n with critical resource interlocking, reducing the scheduling possibility of the node n-1 in the light of the principle that cores select the node with the high scheduling priority for processing according to the scheduling priority of the current node waiting for multi-core scheduling, so that the preceding node is prevented from continuously inputting to-be-processed data tasks to the consequent node with a bottleneck, increase of the task queue depth of the node n is avoided, more cores can be prevented from being scheduled to the node n, possibility of multi-core competition of the node n is reduced, and performance of the multi-core processor is fully given play to.
Description
Technical field
The present invention relates to the embedded computer technology field, relate in particular to a kind of node scheduling priority and confirm method and device.
Background technology
At present, rely on the running frequency that improves single central processing unit (CPU) kernel in the single core processor can not satisfy the requirement of user to performance of network equipments.In order to improve the processing speed of the network equipment to data stream, polycaryon processor arises at the historic moment.Polycaryon processor can solve the bottleneck problem of single core processor frequency upgrading, through adopting the collaborative work simultaneously of a plurality of CPU cores, the time that shortening task is in a large number carried out.
In order to utilize polycaryon processor efficiently; Can be divided into a plurality of threads (or a plurality of subtask) to system task; Each thread can be divided into a plurality of stages execution points again, and it is exactly that the minimum of dispatching kernel is carried out particle that a stage is carried out point, thereby makes each kernel can both fully obtain scheduling.The stage that the same time of each kernel can only carry out in the thread is carried out point (i.e. minimum particle of carrying out).
Time, stage are carried out point, kernel, and these three variablees are that man-to-man relation can not be overlapping.Usually be defined as the combination of time and stage execution point the performance element of a minimum, each kernel can freely get access to the performance element of a free time and obtain scheduling.Concrete, can represent the relation between them with coordinate diagram as shown in Figure 1.
For a network equipment, what threads are system task should divide, and what stages each thread should be divided and carry out point, the how load of balanced these threads, and these are the keys that determine whole performance of network equipments.Present most of network equipment has only a thread, on this thread, divides a plurality of stages again and carries out point, so do not relate to the problem of load balancing.But along with the development of CPU technology, the notion of multinuclear no longer is double-core or 4 nuclears, but can integrated more than ten even tens kernels.A plurality of kernels that so merely in a thread, distribute can not be given full play to system performance, must carry out a plurality of kernels that distribute on the point in the multithreading multistage, again load balancing in addition.
Carry out the critical resource that possibly occur in the point for each stage and fight for problem, especially outstanding in polycaryon processor.Can occur a plurality of kernels in the polycaryon processor and carry out the situation of same stage execution point, if this stage is carried out the situation that critical resource appears operating in point, these kernels will wait in line to obtain critical resource so., the stage execution point of critical resource protects with the mode of spin lock usually in being arranged; If certain kernel is got this critical resource earlier; Other kernels implement the place of spin lock and just hang up wait, till critical resource is released, thereby the critical resource interlocking occurred.If a plurality of kernels all need poll to wait for critical resource after entering into certain stage execution point, the multinuclear competition has just appearred, cause reducing greatly the performance performance of multinuclear.
Data processing a series of action from start to end can be called streamline in polycaryon processor; Article one, streamline can be divided into a plurality of the processing stage; Each the processing stage be exactly the node (node is exactly a stage to carry out point) of kernel dispatching, also be parallel scheduling of kernel and the minimum atomic operation that gets into.
Some polycaryon processor comes the dispatching priority of decision node according to the task queue degree of depth of node; Behind the Processing tasks of a node of a kernel completion, handle with regard to needing another node of entering to obtain new task; At this moment; The selection of node is the dispatching priority according to the node of current wait multi-core dispatching, and the node that selection scheduling priority is high is handled.If the situation of operation critical resource appears in node n, and node n-1 this moment (node before the node n) also gives node n in the data transmission that will handle continuously, and the dispatching priority of node n will constantly increase so.The system call algorithm will distribute more kernel to come processing node n, and these kernels will carry out the multinuclear competition when implementing the critical resource of node n, mutual exclusion takes place, and causes performance to descend.
Summary of the invention
The embodiment of the invention provides a kind of node scheduling priority to confirm method and device, is used for reducing the multinuclear competition that node takes place, and improves the performance of polycaryon processor.
A kind of node scheduling priority is confirmed method, is applied to confirm that according to the task queue degree of depth in the polycaryon processor of node scheduling priority, said method comprises:
Confirm to occur the node n of critical resource interlocking;
On every streamline that the critical resource interlocking takes place at node n place, reduce recently apart from node n, and be positioned at the dispatching priority of node n node n-1 before, wherein n is the positive integer greater than 1.
A kind of node scheduling priority is confirmed device, is applied to confirm that according to the task queue degree of depth in the polycaryon processor of node scheduling priority, said device comprises:
Determination module is used to confirm to occur the node n of critical resource interlocking;
Adjusting module is used for the streamline that the critical resource interlocking takes place at every at node n place, reduces recently apart from node n, and is positioned at the dispatching priority of node n node n-1 before, and wherein n is the positive integer greater than 1.
The scheme that provides according to the embodiment of the invention; Confirming according to the task queue degree of depth in the polycaryon processor of node scheduling priority, on every streamline, reduce the dispatching priority of the node n node n-1 before that the critical resource interlocking occurs; According to the dispatching priority of kernel according to the node of current wait multi-core dispatching; The principle that the node that selection scheduling priority is high is handled reduces the possibility that node n-1 obtains dispatching, thereby avoids the forward direction node constantly to the back to the pending data task of node input of bottleneck occurring; Avoid the task queue degree of depth among the node n to increase; Thereby avoid more kernel dispatching to node n, reduce the possibility that the multinuclear competition appears in node n, give full play to the performance of polycaryon processor.
Description of drawings
Fig. 1 is the synoptic diagram that concerns of carrying out point and kernel in time in the prior art, stage;
The node scheduling priority that Fig. 2 provides for the embodiment of the invention one is confirmed the flow chart of steps of method;
The streamline synoptic diagram that Fig. 3 provides for the embodiment of the invention one;
The node scheduling priority that Fig. 4 provides for the embodiment of the invention two is confirmed the structural representation of device.
Embodiment
In the scheme that the embodiment of the invention provides; The node of critical resource interlocking takes place in the multinuclear data handling system; Feed-forward reduces the multi-core dispatching priority of forward direction node; Be reduced in that kernel makes the allocation schedule of multinuclear have foresight in operational competition of critical resource and collision in the multinuclear data handling system, the situation of having avoided a plurality of kernels to fight for certain critical resource in advance takes place.
The present invention program is described with each embodiment below in conjunction with Figure of description.
Embodiment one,
The embodiment of the invention one provides a kind of node scheduling priority to confirm method, is applied to confirm that according to the task queue degree of depth in the polycaryon processor of node scheduling priority, the step of this method is as shown in Figure 2, comprising:
Wherein, n is the positive integer greater than 1.
In the present embodiment, be used for confirming the device of node scheduling priority, confirm that like node scheduling priority device need confirm to occur the node n of critical resource interlocking, and reduce the dispatching priority of node n-1.Concrete, can confirm that the critical resource interlocking appears in this node according to the feedback information of the node that receives.
Therefore in this step, node n when implementing critical resource, can confirm whether self the critical resource interlocking occurs after getting access to kernel dispatching.If confirm the critical resource interlocking self to occur, can calculate the time span that critical resource is carried out, and execution in step 103, feed back this information.Node n is after getting access to kernel dispatching; If confirm self the critical resource interlocking does not appear; Can feedback information; Promptly need not to trigger execution in step 103, node n-1 can keep determining according to original method (promptly confirming the method for node scheduling priority according to the task queue degree of depth) the dispatching priority of self.
The time span that step 103, node n feedback critical resource are carried out.
Concrete; Can the time span that critical resource is carried out be fed back to node scheduling priority confirms device (this device can be integrated among the previous node n-1; Be an integrated node scheduling priority to confirm device in each node; Therefore, in the present embodiment, can utilize the bottleneck information notification last node of feed-forward method with this node; And reduce the multi-core dispatching priority of last node, thereby prevent that the forward direction node is input to the back with lot of data and the back on node of bottleneck occurs to causing task to be deposited on the node.Certainly, this device also can be independent of node).Node scheduling priority confirms that device can confirm that the critical resource interlocking appears in node n when receiving node n feedack.
The dispatching priority of step 104, reduction node n-1.
This step comprises, on every streamline that the critical resource interlocking takes place at node n place, reduces recently apart from node n, and is positioned at the dispatching priority of node n node n-1 before.
In polycaryon processor, have many data processing streamlines, a plurality of nodes are arranged on every streamline, the node processing process on every streamline is identical.The streamline synoptic diagram can be as shown in Figure 3; When node scheduling priority confirms that device is integrated in the node; When at node n place the critical resource interlocking taking place, to every streamline that the critical resource interlocking takes place at node n place, node n can confirm the device feedback information to the node scheduling priority among the node n-1; Notice node n-1 the critical resource interlocking occurs at node n place.At this moment, node scheduling priority confirms that device can confirm the dispatching priority of node n-1 again.
In the present embodiment; Can according to the dispatching priority of node n-1 with at every on the streamline of node n place generation critical resource interlocking; The proportional relation of the fixedly execution duration of node n; And/or on every streamline that the critical resource interlocking takes place at node n place, node n each locking time length inverse relation, reduce the dispatching priority of node n-1.Concrete; Can according to the flowing water number of lines that the critical resource interlocking takes place at node n place, at every on the streamline of node n place generation critical resource interlocking; Each locking time of the length of node n, on every streamline that the critical resource interlocking takes place at node n place; The task queue degree of depth of node n-1 (be appreciated that and be task quantity) on the fixedly execution duration of node n-1 and the assembly line A on the fixedly execution duration of node n, the assembly line A is confirmed the dispatching priority of node n-1 on the assembly line A.
More excellent, can confirm the dispatching priority H of node n-1 on the assembly line A through following formula
A, n-1:
Wherein,
K is the flowing water number of lines that the critical resource interlocking takes place at node n place;
W
I, nEach locking time of length on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
T
I, nFixedly execution duration on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
Q
A, n-1Be the task queue degree of depth of node n-1 on assembly line A;
T
A, n-1Be the fixedly execution duration of node n-1 on assembly line A.
Can with
The dispatching priority H ' of node n-1 on the assembly line A before being regarded as adjusting
A, n-1, because W
I, nInevitable less than T
I, n, therefore,
It is inevitable greater than 0 and less than 1,
Also inevitable less than 1, thus, the dispatching priority H that determines
A, n-1With respect to H '
A, n-1Must reduce.
Certainly, because dispatching priority H
A, n-1With T
I, nBe directly proportional, with W
I, nBe inversely proportional to, also can confirm the dispatching priority H of node n-1 on the assembly line A through following formula
A, n-1:
Wherein, M is greater than 0 and less than 1 constant, and
is greater than 0 and less than 1.
More excellent, in the present embodiment, can preserve and safeguard a node status information table in each node, the dispatching priority of node, the task queue degree of depth and fixedly execution time length can be kept in this information table.After determining dispatching priority again, can upgrade the dispatching priority of preserving in the node status information table.
With the embodiment of the invention one based on same inventive concept, following device is provided.
Embodiment two,
The embodiment of the invention two provides a kind of node scheduling priority to confirm device, is applied to confirm that according to the task queue degree of depth in the polycaryon processor of node scheduling priority, the structure of this device is as shown in Figure 4, comprising:
Said adjusting module 12 specifically is used for the dispatching priority and the streamline that the critical resource interlocking takes place at every at node n place according to node n-1; The proportional relation of the fixedly execution duration of node n; And/or on every streamline that the critical resource interlocking takes place at node n place; Node n each locking time length inverse relation, reduce the dispatching priority of node n-1.
Said adjusting module 12 specifically is used for according to the flowing water number of lines that the critical resource interlocking takes place at node n place, at every streamline that the critical resource interlocking takes place at node n place; Each locking time of the length of node n, on every streamline that the critical resource interlocking takes place at node n place; The task queue degree of depth of node n-1 on the fixedly execution duration of node n-1 and the assembly line A on the fixedly execution duration of node n, the assembly line A is confirmed the dispatching priority of node n-1 on the assembly line A.
Said adjusting module 12 specifically is used for confirming through following formula the dispatching priority H of node n-1 on the assembly line A
A, n-1:
Wherein,
K is the flowing water number of lines that the critical resource interlocking takes place at node n place;
W
I, nEach locking time of length on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
T
I, nFixedly execution duration on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
Q
A, n-1Be the task queue degree of depth of node n-1 on assembly line A;
T
A, n-1Be the fixedly execution duration of node n-1 on assembly line A.
Said adjusting module 12 specifically is used for confirming through following formula the dispatching priority H of node n-1 on the assembly line A
A, n-1:
Wherein,
K is the flowing water number of lines that the critical resource interlocking takes place at node n place;
W
I, nEach locking time of length on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
T
I, nFixedly execution duration on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
Q
A, n-1Be the task queue degree of depth of node n-1 on assembly line A;
T
A, n-1Be the fixedly execution duration of node n-1 on assembly line A;
M is greater than 0 and less than 1 constant, and the value of
is greater than 0 and less than 1.
The scheme that provides according to the embodiment of the invention one～embodiment two; Not only can reduce the possibility of node generation multinuclear competition, improve the performance of polycaryon processor, and if the situation of node n appearance operation critical resource; And node n-1 this moment (node before the node n) also gives node n in the data transmission that will handle continuously; Data congestion will appear in this moment, makes data processing time postpone, and might cause buffer queue to overflow at node n; And the scheme that provides through the embodiment of the invention one～embodiment two; Can also further avoid occurring data congestion, reduce data processing time and postpone, and avoid occurring the problem that buffer queue overflows.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, belong within the scope of claim of the present invention and equivalent technologies thereof if of the present invention these are revised with modification, then the present invention also is intended to comprise these changes and modification interior.
Claims (10)
1. a node scheduling priority is confirmed method, is applied to confirm to it is characterized in that in the polycaryon processor of node scheduling priority that said method comprises according to the task queue degree of depth:
Confirm to occur the node n of critical resource interlocking;
On every streamline that the critical resource interlocking takes place at node n place, reduce recently apart from node n, and be positioned at the dispatching priority of node n node n-1 before, wherein n is the positive integer greater than 1.
2. the method for claim 1 is characterized in that, on assembly line A, reduces recently apart from node n, and is positioned at the dispatching priority of the node n-1 before the node n, specifically comprises:
According to the dispatching priority of node n-1 with at every on the streamline of node n place generation critical resource interlocking; The proportional relation of the fixedly execution duration of node n; And/or on every streamline that the critical resource interlocking takes place at node n place; Node n each locking time length inverse relation, reduce the dispatching priority of node n-1.
3. method as claimed in claim 2 is characterized in that, on assembly line A, reduces recently apart from node n, and is positioned at the dispatching priority of the node n-1 before the node n, specifically comprises:
According to the flowing water number of lines that the critical resource interlocking takes place at node n place, at every on the streamline of node n place generation critical resource interlocking; Each locking time of the length of node n, on every streamline that the critical resource interlocking takes place at node n place; The task queue degree of depth of node n-1 on the fixedly execution duration of node n-1 and the assembly line A on the fixedly execution duration of node n, the assembly line A is confirmed the dispatching priority of node n-1 on the assembly line A.
4. method as claimed in claim 3 is characterized in that, confirms the dispatching priority H of node n-1 on the assembly line A through following formula
A, n-1:
Wherein,
K is the flowing water number of lines that the critical resource interlocking takes place at node n place;
W
I, nEach locking time of length on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
T
I, nFixedly execution duration on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
Q
A, n-1Be the task queue degree of depth of node n-1 on assembly line A;
T
A, n-1Be the fixedly execution duration of node n-1 on assembly line A.
5. method as claimed in claim 3 is characterized in that, confirms the dispatching priority H of node n-1 on the assembly line A through following formula
A, n-1:
Wherein,
K is the flowing water number of lines that the critical resource interlocking takes place at node n place;
W
I, nEach locking time of length on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
T
I, nFixedly execution duration on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
Q
A, n-1Be the task queue degree of depth of node n-1 on assembly line A;
T
A, n-1Be the fixedly execution duration of node n-1 on assembly line A;
M is greater than 0 and less than 1 constant, and the value of
is greater than 0 and less than 1.
6. a node scheduling priority is confirmed device, is applied to confirm to it is characterized in that in the polycaryon processor of node scheduling priority that said device comprises according to the task queue degree of depth:
Determination module is used to confirm to occur the node n of critical resource interlocking;
Adjusting module is used for the streamline that the critical resource interlocking takes place at every at node n place, reduces recently apart from node n, and is positioned at the dispatching priority of node n node n-1 before, and wherein n is the positive integer greater than 1.
7. device as claimed in claim 6; It is characterized in that said adjusting module specifically is used for dispatching priority and the streamline that the critical resource interlocking takes place at every at node n place according to node n-1; The proportional relation of the fixedly execution duration of node n; And/or on every streamline that the critical resource interlocking takes place at node n place, node n each locking time length inverse relation, reduce the dispatching priority of node n-1.
8. device as claimed in claim 7; It is characterized in that; Said adjusting module; Specifically be used for according to the flowing water number of lines that the critical resource interlocking takes place at node n place, at every streamline that the critical resource interlocking takes place at node n place; Each locking time of the length of node n, on every streamline that the critical resource interlocking takes place at node n place, the task queue degree of depth of node n-1 on the fixedly execution duration of node n-1 and the assembly line A on the fixedly execution duration of node n, the assembly line A is confirmed the dispatching priority of node n-1 on the assembly line A.
9. device as claimed in claim 8 is characterized in that, said adjusting module specifically is used for confirming through following formula the dispatching priority H of node n-1 on the assembly line A
A, n-1:
Wherein,
K is the flowing water number of lines that the critical resource interlocking takes place at node n place;
W
I, nEach locking time of length on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
T
I, nFixedly execution duration on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
Q
A, n-1Be the task queue degree of depth of node n-1 on assembly line A;
T
A, n-1Be the fixedly execution duration of node n-1 on assembly line A.
10. device as claimed in claim 8 is characterized in that, said adjusting module specifically is used for confirming through following formula the dispatching priority H of node n-1 on the assembly line A
A, n-1:
Wherein,
K is the flowing water number of lines that the critical resource interlocking takes place at node n place;
W
I, nEach locking time of length on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
T
I, nFixedly execution duration on the streamline of critical resource interlocking takes place at node n place at the i bar for node n;
Q
A, n-1Be the task queue degree of depth of node n-1 on assembly line A;
T
A, n-1Be the fixedly execution duration of node n-1 on assembly line A;
M is greater than 0 and less than 1 constant, and the value of
is greater than 0 and less than 1.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104969197A (en) * | 2013-02-04 | 2015-10-07 | 日本电气株式会社 | Data set multiplicity change device, server, and data set multiplicity change method |
| CN106547492A (en) * | 2016-12-08 | 2017-03-29 | 北京得瑞领新科技有限公司 | A kind of operational order dispatching method of NAND flash memory equipment and device |
| CN108307198A (en) * | 2018-03-08 | 2018-07-20 | 广州酷狗计算机科技有限公司 | flow service node dispatching method, device and scheduling node |
| CN114860406A (en) * | 2022-05-18 | 2022-08-05 | 南京安元科技有限公司 | Distributed compiling and packaging system and method based on Docker |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR3023047B1 (en) | 2014-06-27 | 2016-06-24 | Continental Automotive France | METHOD FOR MANAGING FAILURE MESSAGES OF A MOTOR VEHICLE |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060179284A1 (en) * | 2005-02-04 | 2006-08-10 | Mips Technologies, Inc. | Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency |
| CN101055531A (en) * | 2006-04-14 | 2007-10-17 | 国际商业机器公司 | System and method for placing a processor into a gradual slow mode of operation |
| CN101083655A (en) * | 2007-07-06 | 2007-12-05 | 中国人民解放军国防科学技术大学 | Antisymmetric process software production chain technique in P2P index service |
| CN101661386A (en) * | 2009-09-24 | 2010-03-03 | 成都市华为赛门铁克科技有限公司 | Multi-hardware thread processor and business processing method thereof |
-
2012
- 2012-02-13 CN CN201210031763.3A patent/CN102567120B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060179284A1 (en) * | 2005-02-04 | 2006-08-10 | Mips Technologies, Inc. | Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency |
| CN101055531A (en) * | 2006-04-14 | 2007-10-17 | 国际商业机器公司 | System and method for placing a processor into a gradual slow mode of operation |
| US20070245350A1 (en) * | 2006-04-14 | 2007-10-18 | Abernathy Christopher M | System and method for placing a processor into a gradual slow mode of operation |
| CN101083655A (en) * | 2007-07-06 | 2007-12-05 | 中国人民解放军国防科学技术大学 | Antisymmetric process software production chain technique in P2P index service |
| CN101661386A (en) * | 2009-09-24 | 2010-03-03 | 成都市华为赛门铁克科技有限公司 | Multi-hardware thread processor and business processing method thereof |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104969197A (en) * | 2013-02-04 | 2015-10-07 | 日本电气株式会社 | Data set multiplicity change device, server, and data set multiplicity change method |
| CN106547492A (en) * | 2016-12-08 | 2017-03-29 | 北京得瑞领新科技有限公司 | A kind of operational order dispatching method of NAND flash memory equipment and device |
| US11112998B2 (en) | 2016-12-08 | 2021-09-07 | Dera Co., Ltd. | Operation instruction scheduling method and apparatus for nand flash memory device |
| CN108307198A (en) * | 2018-03-08 | 2018-07-20 | 广州酷狗计算机科技有限公司 | flow service node dispatching method, device and scheduling node |
| CN108307198B (en) * | 2018-03-08 | 2021-01-01 | 广州酷狗计算机科技有限公司 | Flow service node scheduling method and device and scheduling node |
| CN114860406A (en) * | 2022-05-18 | 2022-08-05 | 南京安元科技有限公司 | Distributed compiling and packaging system and method based on Docker |
| CN114860406B (en) * | 2022-05-18 | 2024-02-20 | 安元科技股份有限公司 | Distributed compiling and packing system and method based on Docker |
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