CN102547154B - Back-illuminated CCD-based (back-illuminated charge-coupled device-based) extreme ultraviolet imaging circuit - Google Patents
Back-illuminated CCD-based (back-illuminated charge-coupled device-based) extreme ultraviolet imaging circuit Download PDFInfo
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- CN102547154B CN102547154B CN201110449544.2A CN201110449544A CN102547154B CN 102547154 B CN102547154 B CN 102547154B CN 201110449544 A CN201110449544 A CN 201110449544A CN 102547154 B CN102547154 B CN 102547154B
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Abstract
A back-illuminated CCD-based (back-illuminated charge-coupled device-based) extreme ultraviolet imaging circuit, which relates to the field of extreme ultraviolet imaging, overcomes the defects of the conventional microchannel plate-based extreme ultraviolet imaging system, i.e. large size, heavy weight, low resolution, complex control and high fault rate. The back-illuminated CCD-based extreme ultraviolet imaging circuit provided by the invention comprises an RS-422 communication circuit, an FPGA (field programmable gate array), a driving module, a back-illuminated CCD, a preamplifier circuit, a video processing circuit, a Cameralink data transmission circuit and a power circuit. The back-illuminated CCD-based extreme ultraviolet imaging circuit realizes the photoelectric conversion, processing and output of extreme ultraviolet light signals, and has the advantages of small size, light weight, high resolution and the like.
Description
Technical field
The present invention relates to extreme ultraviolet field, particularly a kind of extreme ultraviolet circuit that shines CCD based on the back of the body.
Background technology
Space EUV imaging is mainly at four extreme ultraviolet waveband 13.0nm, 17.1nm, 19.5nm and 30.4nm.Extreme ultraviolet detector adopts the photon counting detector based on microchannel plate mostly at present, and because microchannel plate needs the high voltage source of upper kilovolt that can regulate, not only volume is large, weight is large, resolution is low, control is complicated, and easily breaks down.
According to the difference of device architecture and technique, CCD is divided into front according to formula and back-illuminated type.In front lighting type CCD, light is from the incident of electrode one side, and the quantum efficiency of CCD is lower, and short wave response is poor, to ultraviolet and following wave band thereof without response.And in back lighting type CCD, light has reduced the absorption of electrode pair shortwave from electrodeless back surface incident, there is quantum efficiency high, highly sensitive, short wave response advantages of higher, and can, by making antireflective film at the back of the body according to CCD silicon face, further improve short wave response.
The back of the body is applicable to extreme ultraviolet application according to CCD these advantages very much, and the back of the body can be reached extreme ultraviolet waveband is well responded by the technique of non-plated film according to CCD, compares traditional extreme ultraviolet technology, has that volume is little, lightweight, resolution advantages of higher.
Summary of the invention
The object of the invention is to provide a kind of extreme ultraviolet that can be applicable to, and the imaging circuit based on the back of the body according to CCD overcomes that the existing extreme ultraviolet system bulk based on microchannel plate is large, weight is large, resolution is low, control is complicated, and the shortcoming easily breaking down.
The present invention is the shortcoming for overcoming prior art, the technical scheme proposing: a kind of extreme ultraviolet circuit that shines CCD based on the back of the body, this circuit comprises that RS-422 communicating circuit, FPGA, driver module, the back of the body are according to CCD, pre-arcing road, video processing circuits, Cameralink data transmission circuit and power circuit;
Described RS-422 communicating circuit is to the order of FPGA transmission control system;
Described FPGA receive the transmission of RS-422 communicating circuit the whole circuit working of control command control, produce the back of the body according to CCD work required clock signal output to driver module, to video processing circuits control and data processing;
Described driver module is driven into clock signal to meet the clock signal of the back of the body according to CCD requirement amplitude, drives the back of the body normally to work according to CCD;
The described back of the body is converted to the signal of telecommunication according to CCD by extreme ultraviolet signal, and output video analog signal is to pre-arcing road;
Described pre-arcing road carries out the analog signal of input to output to video processing circuits after amplification filtering;
Described video processing circuits is carried out correlated-double-sampling and digital quantization according to the control sequential of FPGA by analog signal, sends the digital signal after quantizing to FPGA again, and FPGA integrates processing to image;
Described Camerlink data transmission circuit receives FPGA and integrates view data after treatment, and view data is sent to image receiving system;
Described power module is for powering to whole Circuits System.
Beneficial effect of the present invention: a kind of based on the back of the body according to the extreme ultraviolet circuit of CCD, realized the opto-electronic conversion of extreme ultraviolet signal, signal is processed and output; Have that volume is little, lightweight, resolution advantages of higher.
Accompanying drawing explanation
Fig. 1 is a kind of composition frame chart that shines the extreme ultraviolet circuit of CCD based on the back of the body;
Fig. 2 is driver module block diagram;
Fig. 3 is power circuit block diagram.
In figure, 1, RS-422 communicating circuit, 2, FPGA, 3, driver module, 4, the back of the body is according to CCD, 5, pre-arcing road, 6, video processing circuits, 7, Cameralink data transmission circuit, 8, power circuit.
Embodiment
Fig. 1 is the composition frame chart of circuit, comprising: RS-422 communicating circuit 1, FPGA2, driver module 3, the back of the body are according to CCD4, pre-arcing road 5, video processing circuits 6, Cameralink data transmission circuit 7 and power circuit 8.
RS-422 communicating circuit 1 is connected with described FPGA2, for the order of transmitting outer connected control system to FPGA2.
FPGA2 adopts the XC3S400-PQ208 of Xilinx company.FPGA is received the whole circuit working of control command control, is produced the back of the body according to CCD4 clock signal, to video processing circuits 6 controls, Data Integration and output by RS-422 communicating circuit 1.The control module of FPGA2, by receiving control command, arranges the time of integration, and selects mode of operation.The time of integration, module was shone the sensitization time of integration of CCD4 by the back of the body is set, and realized the charge accumulated of the back of the body according to CCD4 photosensitive array.Under single channel or dual channel mode, timing sequence generating circuit produces the back of the body according to the required driving sequential of CCD4, and input drives chip EL7457.Provide level reference by voltage offset electric circuit, make the driving pulse of EL7457 output meet the level requirement of CCD47-10 driving pulse, realize the transfer output to stored charge.
As shown in Figure 2, driver module 3 structures, driver module 3 is divided into timing sequencer, driver and three modules of voltage offset electric circuit and designs.Wherein voltage offset electric circuit is provided by the power module of system.Driver module 3 is driven into clock signal to meet the clock signal of the back of the body according to CCD4 requirement amplitude, drives the back of the body normally to work according to CCD4;
The full frame formula area array CCD that the back of the body selects E2V company of Britain to produce according to CCD4, model is CCD47-10.According to different extreme ultraviolet waveband application, CCD47-10 can adopt different coating techniques.In the time of Circuits System application of the present invention, the back of the body, according to the extreme ultraviolet signal of CCD4 receiving front-end optical system, is converted to the signal of telecommunication by extreme ultraviolet signal, and output video analog signal is to pre-arcing road 5;
Video processing circuit 6 comprises signal every parts such as straight, gain and bias-adjusted, clamp, correlated-double-sampling (CDS), A/D conversion and timing sequencers.Because discrete component has circuit complexity, debug difficulties, is unfavorable for the shortcoming that the system integration etc. is difficult to overcome, this circuit adopts the video processor that is specifically designed to ccd output signal processing.Because the back of the body can adopt single or dual channel mode output according to CCD4 output, therefore select three-channel video processor adopting XRD9836, utilize two-way wherein to carry out Video processing, reduce board area, improve integrated level.XRD9836 is the integrated circuit (IC) chip that is specifically designed to ccd signal collection that EXAR company produces, there is 16 bit resolution A/D, maximum 15MHz sample frequency, correlated double sampling circuit, 10 programmable gain amplifiers, black level offset compensation function, can be configured internal register by serial line interface.Video processing circuits 6 is carried out correlated-double-sampling and digital quantization according to the control sequential of FPGA2 by analog signal, sends the digital signal after quantizing to FPGA2, and FPGA2 integrates processing to image;
The data that FPGA2 receiver, video is processed after A/D quantizes are integrated after processing, by Cameralink data transmission circuit 7, view data are sent to image receiving system.Interface chip adopts DS90CR287.According to CameraLink agreement, CameraLink data transmission circuit data sending terminal adopts DS90CR287 chip, convert respectively 28 bit data and 1 pixel clock signal to 4 road LVDS data and 1 road LVDS clock signal, connector is selected the Cameralink of 3M company AN connector MDR-26.
As shown in Figure 3, power circuit 8 adopts 28V Power supply, and whole circuit needs 12 kinds of voltages altogether, comprising: 29V, 17V, 15V, 12V, 10V, 9.5V, 5V, 3.3V, 2.5V, 1.2V, 1V ,-5V.Power module block diagram is as shown in Figure 3: first use switching power source chip (DC/DC) to carry out one-level voltage transitions, again because ripple and the switching noise of switching power source chip (DC/DC) output voltage are larger, can not directly power to analog circuit, so use LDO chip to carry out secondary voltage conversion, final acquisition is stable, low noise voltage, realizes whole Circuits System power supply.
Claims (3)
1. one kind shines the extreme ultraviolet circuit of CCD based on the back of the body, it is characterized in that, this circuit comprises RS-422 communicating circuit (1), FPGA(2), driver module (3), the back of the body be according to CCD(4), pre-arcing road (5), video processing circuits (6), Cameralink data transmission circuit (7) and power circuit (8);
Described RS-422 communicating circuit (1) is to FPGA(2) order of connected control system outside transmission;
Described FPGA(2) order of outer connected control system that receives RS-422 communicating circuit (1) transmission controls whole circuit working, produces the back of the body according to CCD(4) the required clock signal of working outputs to driver module (3), video processing circuits (6) controlled and data processing;
Described driver module (3) is driven into clock signal to meet the back of the body according to CCD(4) require the clock signal of amplitude, drive the back of the body according to CCD(4) normally work;
The described back of the body is according to CCD(4) the extreme ultraviolet signal of reception is converted to the signal of telecommunication, output video analog signal is to pre-arcing road (5);
Described pre-arcing road (5) carries out the analog signal of input to output to video processing circuits (6) after amplification filtering;
Described video processing circuits (6) is according to FPGA(2) control sequential analog signal is carried out to correlated-double-sampling and digital quantization, by quantize after digital signal send FPGA(2 to), FPGA(2) image is integrated to processing;
Described Camerlink data transmission circuit (7) receives FPGA(2) integrate view data after treatment, view data is sent to image receiving system;
Described power module (8) is for powering to whole Circuits System.
According to claim 1 a kind of based on the back of the body according to the extreme ultraviolet circuit of CCD, it is characterized in that, described pre-arcing road (5) comprises that triode penetrates with circuit and operational amplification circuit; Triode is penetrated with circuit and is isolated and impedance transformation, and operational amplification circuit carries out amplification filtering processing.
3. a kind of extreme ultraviolet circuit that shines CCD based on the back of the body according to claim 1, is characterized in that, described power module (8) first uses switching power source chip to carry out one-level voltage transitions, then uses LDO chip to carry out secondary voltage conversion.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201110449544.2A CN102547154B (en) | 2011-12-29 | 2011-12-29 | Back-illuminated CCD-based (back-illuminated charge-coupled device-based) extreme ultraviolet imaging circuit |
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| CN201110449544.2A CN102547154B (en) | 2011-12-29 | 2011-12-29 | Back-illuminated CCD-based (back-illuminated charge-coupled device-based) extreme ultraviolet imaging circuit |
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| CN102547154B true CN102547154B (en) | 2014-05-28 |
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| CN103248833B (en) * | 2013-04-19 | 2015-12-09 | 中国科学院长春光学精密机械与物理研究所 | The large area array CCD imaging system of modularization high frame rate |
| CN106791328B (en) * | 2017-01-09 | 2017-12-05 | 中国科学院长春光学精密机械与物理研究所 | A kind of aviation CCD imaging systems and aircraft |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1491028A (en) * | 2002-09-17 | 2004-04-21 | ���µ�����ҵ��ʽ���� | Chip set for camera and image picking system |
| CN101146184A (en) * | 2007-10-30 | 2008-03-19 | 中国科学院光电技术研究所 | Full-frame CCD drive circuit supporting multiple output modes and electronic image shift compensation |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1491028A (en) * | 2002-09-17 | 2004-04-21 | ���µ�����ҵ��ʽ���� | Chip set for camera and image picking system |
| CN101146184A (en) * | 2007-10-30 | 2008-03-19 | 中国科学院光电技术研究所 | Full-frame CCD drive circuit supporting multiple output modes and electronic image shift compensation |
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