CN102546079A - Data processing method, device and system - Google Patents

Data processing method, device and system Download PDF

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Publication number
CN102546079A
CN102546079A CN2010105947230A CN201010594723A CN102546079A CN 102546079 A CN102546079 A CN 102546079A CN 2010105947230 A CN2010105947230 A CN 2010105947230A CN 201010594723 A CN201010594723 A CN 201010594723A CN 102546079 A CN102546079 A CN 102546079A
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China
Prior art keywords
scrambling
data sequence
scrambler seed
check digit
bit
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CN2010105947230A
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Chinese (zh)
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CN102546079B (en
Inventor
段灿
许进
徐俊
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ZTE Corp
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ZTE Corp
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Priority to CN201010594723.0A priority Critical patent/CN102546079B/en
Priority to PCT/CN2011/076327 priority patent/WO2012079358A1/en
Publication of CN102546079A publication Critical patent/CN102546079A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • H04L9/0656Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
    • H04L9/0662Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/34Encoding or coding, e.g. Huffman coding or error correction

Abstract

The invention discloses a data processing method, a data processing device and a data processing system. The method comprises the steps of: using a scrambling seed to scramble a data sequence, wherein the data sequence carries check digits which are used to check the scrambling seed; and sending the scrambled data sequence. The invention can guarantee the correctness of the scrambling seed so as to avoid the error of descrambling data.

Description

Data processing method, Apparatus and system
Technical field
The present invention relates to the communications field, in particular to a kind of data processing method, Apparatus and system.
Background technology
WLAN (Wireless Local Area Networks abbreviates WLAN as) is that the employing wireless communication technology is interconnected with computer equipment, and formation can the mutual communication and the network system that realizes resource-sharing.The characteristics of WLAN essence are not re-use telecommunication cable computer and network is coupled together, but connect through wireless mode, thereby make structure and terminal mobile more flexible of network.IEEE802.11 is one of mainstream technology of present WLAN, and this agreement is mainly stipulated physical layer (PHY) and media interviews controls (MAC) layer standard.
Along with the development of mobile communication technology and people raising to the demand of wireless network; Physical layer specification constantly develops towards the increasingly high direction of speed; Experienced 802.11 and arrived 802.11a/g again to 802.11b, 802.11n then arrives the development course of 802.11ac at last.
The chnnel coding flow process is following:
Thereby data message is modulated to the OFDM symbol through operations such as coding, space shunting, modulation, mapping, OFDM modulation again and sends after a sequence random code scrambling.
Scrambler seed is the scrambling generator initial state, obtains scrambler sequence at the transmitting terminal scrambler seed through scrambling code generator, again data message is carried out scrambling.Then obtain scrambler sequence at receiving terminal, act on decoding information and realize descrambling by scrambler seed identical and scrambling generator with transmitting terminal.
In the correlation technique, the receiving terminal scrambler seed is by transmitting terminal notice, if mistake appears in scrambler seed in transmission course, then can cause the error in data behind the descrambling.
Summary of the invention
Mistake appears in transmission course to scrambler seed in the correlation technique; Thereby cause the problem of the error in data behind the descrambling and propose the present invention; For this reason, main purpose of the present invention is to provide a kind of data processing method, Apparatus and system, to address the above problem.
To achieve these goals, according to an aspect of the present invention, a kind of data processing method is provided.
Data processing method according to the present invention comprises: use scrambler seed that the data sequence is carried out scrambling, wherein carry check digit in the data sequence, check digit is used for the verification scrambler seed; Data sequence after the transmission scrambling.
Further, check digit is used for the partial bit position in the bit of verification scrambler seed.
Further, the partial bit position is the bit outside the scrambling generator tap position institute corresponding bit position of removing in the bit in the scrambler seed.
Further, using scrambler seed that the data sequence is carried out scrambling comprises: use scrambler seed to generate scrambler sequence at random; Use at random scrambler sequence that the data sequence is carried out scrambling.
Further, adopt the mode verification scrambler seed of parity check.
To achieve these goals, according to an aspect of the present invention, a kind of data processing method is provided also.
Data processing method according to the present invention comprises: receive the data sequence after the scrambling, wherein the data sequence after the scrambling is to use scrambler seed that the data sequence is carried out scrambling, carries check digit in the data sequence, and check digit is used for the verification scrambler seed; Confirm that check digit is correct; Data sequence after using scrambler seed to scrambling is carried out descrambling.
Further; When check digit is used for the partial bit position in the bit of verification scrambler seed; Confirm that check digit correctly comprises: use the whole bits in the bit in the scrambler seed; Confirm that check digit is correct, wherein the partial bit position is the bit outside the scrambling generator tap position institute corresponding bit position of removing in the bit in the scrambler seed.
Further; When check digit is used for the whole bit in the bit of verification scrambler seed; Confirm that check digit correctly comprises: use the partial bit position in the bit in the scrambler seed; Confirm that check digit is correct, wherein the partial bit position is the bit outside the scrambling generator tap position institute corresponding bit position of removing in the bit in the scrambler seed.
To achieve these goals, according to another aspect of the present invention, a kind of data processing equipment is provided.
Data processing equipment according to the present invention comprises: scrambling module, and be used to use scrambler seed that the data sequence is carried out scrambling, wherein carry check digit in the data sequence, check digit is used for the verification scrambler seed; Sending module is used to send the data sequence after the scrambling.
To achieve these goals, according to another aspect of the present invention, a kind of data processing equipment is provided also.
Data processing equipment according to the present invention comprises: receiver module; Be used to receive the data sequence after the scrambling; Wherein the data sequence after the scrambling is to use scrambler seed that the data sequence is carried out scrambling, carries check digit in the data sequence, and check digit is used for the verification scrambler seed; Determination module is used for confirming that check digit is correct; Descrambling module, the data sequence after being used to use scrambler seed to scrambling is carried out descrambling.
To achieve these goals, according to a further aspect of the invention, a kind of data handling system is provided.
Data handling system according to the present invention comprises transmitting terminal and receiving terminal, and wherein transmitting terminal comprises: scrambling module, and be used to use scrambler seed that the data sequence is carried out scrambling, wherein carry check digit in the data sequence, check digit is used for the verification scrambler seed; Sending module is used to send the data sequence after the scrambling; Receiving terminal comprises: receiver module is used to receive the data sequence after the scrambling; Determination module is used for confirming that check digit is correct; Descrambling module, the data sequence after being used to use scrambler seed to scrambling is carried out descrambling.
The present invention carries check digit and uses this this scrambler seed of check digit verification through receiving terminal through transmitting terminal in data sequence; Solved that mistake appears in scrambler seed in the correlation technique in transmission course; Thereby cause the problem of the error in data behind the descrambling; Thereby can guarantee the correctness of this scrambler seed, and then avoid the descrambling data mistake.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 is the flow chart one according to the data processing method of the embodiment of the invention;
Fig. 2 is the flowchart 2 according to the data processing method of the embodiment of the invention;
Fig. 3 is the sketch map according to the scrambler production of the preferred embodiment of the present invention one;
Fig. 4 is the flow chart according to the data processing method of the preferred embodiment of the present invention one;
Fig. 5 is according to the flow chart of the data processing method of the preferred embodiment of the present invention two;
Fig. 6 is according to the flow chart of the data processing method of the preferred embodiment of the present invention three;
Fig. 7 is according to the flow chart of the data processing method of the preferred embodiment of the present invention four;
Fig. 8 is the structured flowchart one according to the data processing equipment of the embodiment of the invention;
Fig. 9 is the structured flowchart two according to the data processing equipment of the embodiment of the invention;
Figure 10 is the structured flowchart according to the data handling system of the embodiment of the invention.
Embodiment
Need to prove that under the situation of not conflicting, embodiment and the characteristic among the embodiment among the application can make up each other.Below with reference to accompanying drawing and combine embodiment to specify the present invention.
The embodiment of the invention provides a kind of data processing method.Fig. 1 is the flow chart one according to the data processing method of the embodiment of the invention, and is as shown in Figure 1, comprises that following step S102 is to step S104.
Step S102 uses scrambler seed that the data sequence is carried out scrambling, wherein carries check digit in the data sequence, and wherein check digit is used for the verification scrambler seed.
Step S104, the data sequence after the transmission scrambling.
In the correlation technique, scrambler seed mistake possibly occur in transmission course, thereby causes the error in data behind the descrambling.In the embodiment of the invention; Whether check digit can be used for the verification scrambler seed transmits correctly, therefore, in data sequence, carries check digit and uses this this scrambler seed of check digit verification through receiving terminal through transmitting terminal; Can guarantee the correctness of this scrambler seed, thereby avoid the descrambling data mistake.
Preferably, check digit is used for the partial bit position in the bit of verification scrambler seed.
In this preferred embodiment, utilize the influence of scrambling, make that the check digit after the scrambling is the verification to whole bits when check digit is used for the partial bit position in the bit of verification scrambler seed check digit.
Preferably, the partial bit position is the bit outside the scrambling generator tap position institute corresponding bit position of removing in the bit in the scrambler seed.
Preferably, using scrambler seed that the data sequence is carried out scrambling comprises: use scrambler seed to generate scrambler sequence at random; Use at random scrambler sequence that the data sequence is carried out scrambling.
Preferably, adopt the mode verification scrambler seed of parity check.
In this preferred embodiment, adopt the mode verification scrambler seed of parity check, its implementation is simple, reliable.
The embodiment of the invention provides a kind of data processing method.Fig. 2 is the flowchart 2 according to the data processing method of the embodiment of the invention, and is as shown in Figure 2, comprises that following step S202 is to step S206.
Step S202 receives the data sequence after the scrambling, and wherein the data sequence after the scrambling is to use scrambler seed that the data sequence is carried out scrambling, carries scrambler seed and check digit in this data sequence, and check digit is used for the verification scrambler seed.
Step S204 confirms that check digit is correct.
Step S206, the data sequence after using scrambler seed to scrambling is carried out descrambling.
Preferably; When check digit is used for the partial bit position in the bit of verification scrambler seed; Confirm that check digit correctly comprises: use the whole bits in the bit in the scrambler seed; Confirm that check digit is correct, wherein the partial bit position is the bit outside the scrambling generator tap position institute corresponding bit position of removing in the bit in the scrambler seed.
Preferably; When check digit is used for the whole bit in the bit of verification scrambler seed; Confirm that check digit correctly comprises: use the partial bit position in the bit in the scrambler seed; Confirm that check digit is correct, wherein the partial bit position is the bit outside the scrambling generator tap position institute corresponding bit position of removing in the bit in the scrambler seed.
To combine instance that the implementation procedure of the embodiment of the invention is described in detail below.
Need to prove that following preferred embodiment can be based on the IEEE802.11 system.
Preferred embodiment one
Fig. 3 is the sketch map according to the scrambler production of the preferred embodiment of the present invention one, and is as shown in Figure 3, and the scrambler production is: S (x)=x 7+ x 4+ 1.
Fig. 4 is the flow chart according to the data processing method of the preferred embodiment of the present invention one, and is as shown in Figure 4, and it is the data of 108 bits that transmitting terminal need transmit length, and wherein preceding 7 scramblings preposition 0 are 1001001 in order to preserve the scrambling generator seed, 100 of information bits.
If the scrambler production is: S (x)=x 7+ x 4+ 1 (as shown in Figure 3).
The 8th of data sequence is set for odd parity bit and be whole bit verifications, then the 8th of data sequence is B 7=B 0+ B 1+ B 2+ B 3+ B 4+ B 5+ B 6+ 1=1+0+0+1+0+0+1+0=0 generates scrambler sequence and to the data scrambling by scrambler seed at random.
Data sequence the 8th bit check position is S after the scrambling 7=B 7+ s 7=0+1+1=0, if after receiving terminal decoding not the first seven scrambler seed of descrambling data sequence to be 1001011, the 8 be 0, obtaining the 8th of scrambler sequence by scrambler seed is 0, discontented foot portions bit odd, then the scrambler seed loading error occurring needs to retransmit.
Preferred embodiment two
Fig. 5 is according to the flow chart of the data processing method of the preferred embodiment of the present invention two; As shown in Figure 5; It is the data of 3080 bits that transmitting terminal need transmit length, and wherein preceding 7 scramblings preposition 0 are in order to preserve scrambling generator seed, 3054 of information bits; All put 1 for keeping the position for the 9th to 16, then seven scrambler seeds being set during scrambling is 0101010.
If the scrambler production is: S (x)=x 7+ x 4+ 1 (as shown in Figure 3).
The 8th of data sequence is set for odd and be the partial bit verification, then the 8th of data sequence is for removing corresponding with scrambling generator all the other XOR of scrambler seed: B 7=B 1+ B 2+ B 4+ B 5+ B 6+ 1=1+0+0+1+0+1=1 generates scrambler sequence by scrambler seed at random and again to the data scrambling.
Data sequence the 8th bit check position is S after the scrambling 7=B 7+ s 7=1+0+1=0, if after receiving terminal decoding not the first seven scrambler seed of descrambling data sequence be that 0101010, the 8 bit check position is 0, then do not need descrambling to judge and satisfy odd, then the scrambler seed transmission is correct.
Preferred embodiment three
Fig. 6 is according to the flow chart of the data processing method of the preferred embodiment of the present invention three; As shown in Figure 6, it is the data of 10016 bits that transmitting terminal need transmit length, and wherein preceding 7 scramblings preposition 0 are in order to preserve the scrambling generator seed; 10000 of information bits; All put 1 for keeping the position for the 9th to 16, preceding 16 general designation service-domains, then seven scrambler seeds being set during scrambling is 0100111.
If the scrambler production is: S (x)=x 7+ x 4+ 1 (as shown in Figure 3).
The 8th of data sequence is set for even parity check and be the partial bit verification, then the 8th of data sequence is for removing corresponding with scrambling generator all the other XOR of scrambler seed: B 7=B 1+ B 2+ B 4+ B 5+ B 6=1+0+1+1+1=0 generates scrambler sequence by scrambler seed at random and again to the data scrambling.
Data sequence the 8th bit check position is S after the scrambling 7=B 7+ s 7=0+0+0=0, if after receiving terminal decoding not the first seven scrambler seed of descrambling data sequence be that 0100011, the 8 bit check position is 0, then do not need descrambling to judge and do not satisfy even parity check, then scrambler seed error of transmission.
Preferred embodiment four
Fig. 7 is according to the flow chart of the data processing method of the preferred embodiment of the present invention four; As shown in Figure 7, it is the data of 25201 bits that transmitting terminal need transmit length, and wherein the first seven position is a scrambler seed; 25193 of information bits, then seven scrambler seeds being set during scrambling is 1100001.
If the scrambler production is: S (x)=x 7+ x 4+ 1 (as shown in Figure 3).
The 8th of data sequence is set for even parity check and be whole bit verifications, then the whole XOR of position: the B of the 8th scrambler seed of data sequence 7=B 1+ B 2+ B 4+ B 5+ B 6=1+1+0+0+0+0+1=1 generates scrambler sequence by scrambler seed at random and again to the data scrambling.
Be S after data sequence the 8th bit check position scrambling after the scrambling 7=B 7+ s 7=1+1+0=0, if after receiving terminal decoding not the first seven scrambler seed of descrambling data sequence to be 1100001, the 8 be 0, can judge then and satisfy the partial bit even parity check that then the scrambler seed transmission is correct.
Need to prove; Can in computer system, carry out in the step shown in the flow chart of accompanying drawing such as a set of computer-executable instructions; And; Though logical order has been shown in flow chart, in some cases, can have carried out step shown or that describe with the order that is different from here.
The embodiment of the invention provides a kind of data processing equipment, and this data processing equipment can be used to realize above-mentioned data processing method.Fig. 8 is the structured flowchart one according to the data processing equipment of the embodiment of the invention, and is as shown in Figure 8, comprises scrambling module 82 and sending module 84.Be described in greater detail below.
Scrambling module 82 is used to use scrambler seed that the data sequence is carried out scrambling, wherein carries check digit in the data sequence after the scrambling, and wherein check digit is used for the verification scrambler seed; Sending module 84 is connected to scrambling module 82, is used to send the data sequence after scrambling module 82 scramblings.
The embodiment of the invention provides a kind of data processing equipment, and this data processing equipment can be used to realize above-mentioned data processing method.Fig. 9 is the structured flowchart two according to the data processing equipment of the embodiment of the invention, and is as shown in Figure 9, comprises receiver module 92, determination module 94 and descrambling module 96.Be described in greater detail below.
Receiver module 92 is used to receive the data sequence after the scrambling, and wherein the data sequence after the scrambling is to use scrambler seed that the data sequence is carried out scrambling, carries check digit in this data sequence, and check digit is used for the verification scrambler seed; Determination module 94 is connected to receiver module 92, is used for confirming that the check digit of receiver module 92 receptions is correct; Descrambling module 96 is connected to determination module 94, is used for after determination module 94 is confirmed, the data sequence after using scrambler seed to scrambling is carried out descrambling.
The embodiment of the invention provides a kind of data handling system, and this data handling system can be used to realize above-mentioned data processing method.Figure 10 is the structured flowchart according to the data handling system of the embodiment of the invention, and is shown in figure 10, comprises transmitting terminal 1002 and receiving terminal 1004, is described in greater detail below.
Transmitting terminal 1002 comprises: scrambling module 10022, and be used to use scrambler seed that the data sequence is carried out scrambling, wherein carry scrambler seed and check digit in the data sequence after the scrambling, wherein check digit is used for the verification scrambler seed; Sending module 10024 is connected to and carries module 10022, is used to send the data sequence of carrying after module 10022 is carried the scrambling of scrambler seed and check digit;
Receiving terminal 1004 comprises: receiver module 10042 is used to receive the data sequence after the scrambling; Determination module 10044 is connected to receiver module 10042, is used for confirming that the check digit of receiver module 10042 receptions is correct; Descrambling module 10046 is connected to determination module 10044, is used for after determination module 10044 is confirmed, the data sequence after using scrambler seed to scrambling is carried out descrambling.
In sum, according to the abovementioned embodiments of the present invention, a kind of data processing method, Apparatus and system are provided.In data sequence, carry check digit and use this this scrambler seed of check digit verification through transmitting terminal through receiving terminal; Solved that mistake appears in scrambler seed in the correlation technique in transmission course; Thereby cause the problem of the error in data behind the descrambling; Thereby can guarantee the correctness of this scrambler seed, and then avoid the descrambling data mistake.
Need to prove that the data handling system of describing among the device embodiment is corresponding to above-mentioned method embodiment, its concrete implementation procedure had been carried out detailed description in method embodiment, repeat no more at this.
Obviously, it is apparent to those skilled in the art that above-mentioned each module of the present invention or each step can realize with the general calculation device; They can concentrate on the single calculation element; Perhaps be distributed on the network that a plurality of calculation element forms, alternatively, they can be realized with the executable program code of calculation element; Thereby; Can they be stored in the storage device and carry out, perhaps they are made into each integrated circuit modules respectively, perhaps a plurality of modules in them or step are made into the single integrated circuit module and realize by calculation element.Like this, the present invention is not restricted to any specific hardware and software combination.
The above is merely the preferred embodiments of the present invention, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (11)

1. a data processing method is characterized in that, comprising:
Use scrambler seed that the data sequence is carried out scrambling, carry check digit in the wherein said data sequence, said check digit is used for the said scrambler seed of verification;
Send the data sequence after the said scrambling.
2. method according to claim 1 is characterized in that, said check digit is used for the partial bit position in the bit of the said scrambler seed of verification.
3. method according to claim 2 is characterized in that, said partial bit position is the bit outside the scrambling generator tap position institute corresponding bit position of removing in the bit in the said scrambler seed.
4. according to each described method in the claim 1 to 3, it is characterized in that, use scrambler seed that the data sequence is carried out scrambling and comprise:
Use scrambler seed to generate scrambler sequence at random;
Use said scrambler sequence at random that said data sequence is carried out scrambling.
5. according to each described method in the claim 1 to 3, it is characterized in that, adopt the said scrambler seed of mode verification of parity check.
6. a data processing method is characterized in that, comprising:
Receive the data sequence after the scrambling, the data sequence after the wherein said scrambling is to use scrambler seed that the data sequence is carried out scrambling, carries check digit in the said data sequence, and said check digit is used for the said scrambler seed of verification;
Confirm that said check digit is correct;
Data sequence after using said scrambler seed to said scrambling is carried out descrambling.
7. method according to claim 6; It is characterized in that; When said check digit is used for the partial bit position in the bit of the said scrambler seed of verification; Confirm that said check digit correctly comprises: use the whole bits in the bit in the said scrambler seed, confirm that said check digit is correct, wherein said partial bit position is the bit outside the scrambling generator tap position institute corresponding bit position of removing in the bit in the said scrambler seed.
8. method according to claim 6; It is characterized in that; When said check digit is used for the whole bit in the bit of the said scrambler seed of verification; Confirm that said check digit correctly comprises: use the partial bit position in the bit in the said scrambler seed, confirm that said check digit is correct, wherein said partial bit position is the bit outside the scrambling generator tap position institute corresponding bit position of removing in the bit in the said scrambler seed.
9. a data processing equipment is characterized in that, comprising:
Scrambling module is used to use scrambler seed that the data sequence is carried out scrambling, carries check digit in the wherein said data sequence, and said check digit is used for the said scrambler seed of verification;
Sending module is used to send the data sequence after the said scrambling.
10. a data processing equipment is characterized in that, comprising:
Receiver module is used to receive the data sequence after the scrambling, and the data sequence after the wherein said scrambling is to use scrambler seed that the data sequence is carried out scrambling, carries check digit in the said data sequence, and said check digit is used for the said scrambler seed of verification;
Determination module is used for confirming that said check digit is correct;
Descrambling module, the data sequence after being used to use said scrambler seed to said scrambling is carried out descrambling.
11. a data handling system is characterized in that, comprises transmitting terminal and receiving terminal, wherein
Said transmitting terminal comprises:
Scrambling module is used to use scrambler seed that the data sequence is carried out scrambling, carries check digit in the wherein said data sequence, and said check digit is used for the said scrambler seed of verification;
Sending module is used to send the data sequence after the said scrambling;
Said receiving terminal comprises:
Receiver module is used to receive the data sequence after the said scrambling;
Determination module is used for confirming that said check digit is correct;
Descrambling module, the data sequence after being used to use said scrambler seed to said scrambling is carried out descrambling.
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