CN102545807B - Circuit for outputting image signal - Google Patents

Abstract

The present invention provides in the case of supply voltage or environment temperature change, it is also possible to avoid exporting DC level deviation, and working power voltage scope is wide, the image driver that power supply ripple rejection characteristic is outstanding.Circuit for outputting image signal has: clamp circuit, the current potential of the input terminal of received image signal is carried out clamper；Differential amplifier circuit, using the picture signal of input and predetermined reference voltage as input, is amplified exporting afterwards to the picture signal of input；Bleeder circuit, generates and is supplied to the bias voltage of clamp circuit and is supplied to the reference voltage of differential amplifier circuit；And off-centre circuit, its bias voltage generating bleeder circuit or benchmark electricity add or deduct predetermined offset voltage, it is provided to clamp circuit or differential amplifier circuit, off-centre circuit possesses pnp bipolar transistor and npn bipolar transistor, exports and the poor corresponding voltage of voltage between the base emitter machine of two transistors.

Description

Circuit for outputting image signal

Technical field

The present invention relates to amplify the circuit for outputting image signal of output image signal, particularly relate to be effective to need not The single supply image driver of coupling capacitor.

Background technology

In the electronic equipments such as digital still video camera or DVD player, it is provided with aobvious to outside LCDs etc. The terminal of showing device output image signal, has image driver as to the equipment (IC) of this terminal output image signal.Closely Nian Lai, in order to make device miniaturization, it is not necessary to the single supply image driver of output coupling capacitor is the most practical.? In the specification of JEITA (electronic information technology industry association), about the picture signal exported from vision facilities, it is stipulated that no signal Time D/C voltage be ± 100mV (during 75 Ω terminal).Therefore, when single supply image driver, need during no signal is defeated The D/C voltage going out terminal is maintained in the range of 0～200mV.

As meeting the image driver of above-mentioned condition, the present inventor have developed as shown in Figure 8, possesses and shakes in predetermined Non-inverting amplifier AMP that the picture signal inputted from input terminal IN is amplified by width scope, for making in picture signal The constant clamp circuit CLP of the sync-tip level of the horizontal-drive signal comprised, generate for giving amplifier AMP's Reference voltage V ref of operating point and the resistor voltage divider circuit DIV of the bias voltage Vbias of clamp circuit CLP, impedance transformation Image driver with buffer BUF and low pass filter (omitting diagram) etc..It addition, in circuit for outputting image signal, Clamp circuit is used picture signal to be fixed as the method for predetermined current potential it is known that such as have at patent documentation 1 or patent literary composition Offer the method disclosed in 2.

Image driver shown in Fig. 8 makes the resistance ratio of resistance R1, R2 by constituting resistor voltage divider circuit DIV obtain Voltage Vbias moves desired offset voltage (here, being the 100mV at the center of 0～200mV), and the resistance value of R1, R2 is set For R1-Roff, R2+Roff, it is possible to D/C voltage during no signal be maintained at centered by 100mV ± 100mV as Scope.It addition, it is to only move Vbias, not moving Vref that R1 is changed to R1-Roff.

The image driver of Fig. 8 determines the gain of amplifier AMP by the ratio of resistance Rs and Rf, but by being set as R1: R2=Rs: Rf, even if the resistance value of each resistance is owing to manufacture deviation is from desired value deviation, resistance ratio offsets hardly, and And the ratio of resistance Rs and Rf offsets similarly when the ratio deviation of resistance R1 with R2, so having it can be avoided that owing to manufacturing partially The advantage of official post output DC level deviation.

But, in the image driver shown in Fig. 8, when power source voltage Vcc changes or around variations in temperature and When the constant of element changes, it is impossible to avoid exporting DC level deviation.Additionally, because the circuit of Fig. 8 is for the variation of supply voltage Adaptability weak, exist and narrow as product work supply voltage scope, power supply ripple rejection characteristic difference problem.Except figure Image signal lead-out terminal is also equipped with in the DVD player etc. of audio signal output terminal, as the driver of output acoustical signal Supply voltage, use the high pressure of the 12V that supply voltage more such than 3.3V or 5V of image driver is high, thus exist due to The switching of supply voltage and the situation of supply voltage large change, it is undesirable to by the circuit of Fig. 8 of power supply ripple rejection characteristic difference For this vision facilities.

[patent documentation 1] Japanese Laid-Open Patent Publication 62-186674 publication

[patent documentation 2] Japanese Unexamined Patent Publication 7-183810 publication

Summary of the invention

The present invention proposes in view of the foregoing, its object is to provide no matter one is manufacture deviation or power supply Variation in voltage or environment temperature variation, can avoid exporting DC level deviation, and working power voltage scope is wide, power supply stricture of vagina The circuit for outputting image signal that ripple rejection characteristic is outstanding.

In order to reach above-mentioned purpose, the present invention provides circuit for outputting image signal, and it has: clamp circuit, to input figure The current potential of the input terminal of image signal carries out clamper；Differential amplifier circuit, the picture signal inputted from described input terminal with And predetermined reference voltage is as input, is amplified exporting afterwards to the picture signal of input；Bleeder circuit, generation is supplied to The bias voltage of described clamp circuit and be supplied to the reference voltage of described differential amplifier circuit or become the voltage on its basis； Off-centre circuit, its described bias voltage that described bleeder circuit is generated or described reference voltage or to become the voltage on its basis attached Add or deduct predetermined offset voltage, being provided to described clamp circuit or described differential amplifier circuit, described skew electricity Road possesses pnp bipolar transistor and npn bipolar transistor, output and the base stage of said two transistor, transmitting voltage across poles Voltage corresponding to difference.

By above-mentioned means, because additional by off-centre circuit or deduct the bias voltage after offset voltage or base Quasi-voltage is supplied to clamp circuit or differential amplifier circuit, it is possible to be set making composition for generate bias voltage and The input resistance of the ratio of the resistance of the bleeder circuit of reference voltage and the differential amplifier circuit of enlarged drawing image signal and feedback resistance Ratio corresponding, it is possible to reduce output voltage supply voltage interdependence, improve power supply ripple rejection characteristic.

Further, it is desirable to described off-centre circuit has the first constant-current source and institute being connected in series with described pnp bipolar transistor State the second constant-current source that npn bipolar transistor is connected in series, be configured to by described first constant-current source at the bipolar crystalline substance of described pnp The electric current flow through in body pipe and the electric current flow through in described npn bipolar transistor by described second constant-current source, make described pnp The temperature characterisitic of the base emitter interpolar voltage of bipolar transistor and the base emitter interpolar voltage of described npn bipolar transistor Temperature characterisitic is substantially the same.

Thereby, it is possible to the voltage making off-centre circuit generate does not has temperature dependency, it is possible to reduce the temperature of output voltage Interdependence.

And, it is desirable to described bias circuit possesses the second differential amplifier circuit, and this second differential amplifier circuit is by described two The potential difference of the base emitter interpolar voltage of individual transistor and input to the described bias voltage of this off-centre circuit or become described The voltage on the basis of reference voltage is as input.

Thus, though the difference of the base emitter interpolar voltage of the two of pnp and npn transistors and desired offset voltage not Unanimously, also by using the second differential amplifier circuit that potential difference is amplified, it is possible to generate desired offset voltage.

Further, described off-centre circuit is arranged between described bleeder circuit and described differential amplifier circuit, to described pincers Position circuit supplies the described bias voltage that described bleeder circuit generates, and becomes described bleeder circuit to the supply of described off-centre circuit raw The voltage on the basis becoming described reference voltage become, addition of the voltage of offset voltage to the supply of described differential amplifier circuit.

Thus, the second differential amplifier circuit also enters as to the reference voltage supplied to bleeder circuit and differential amplifier circuit The circuit of row impedance transformation carries out action, it may not be necessary to arrange buffer.

Additionally, described off-centre circuit is arranged between described bleeder circuit and described clamp circuit, at described dividing potential drop electricity Arrange between road and described differential amplifier circuit and described reference voltage is carried out the buffer that then impedance transformation transmits.

By arranging, reference voltage is carried out the buffer that then impedance transformation transmits, even if arranging at off-centre circuit Time between bleeder circuit and clamp circuit, it is also possible to prevent the reference voltage skew that bleeder circuit generates, it is possible to reduce output The supply voltage interdependence of voltage.

In accordance with the invention it is possible to no matter provide one is manufacture deviation or power supply voltage variation or environment temperature variation, It can be avoided that the circuit for outputting image signal of output DC level deviation.Working power voltage scope can be provided wide additionally, have, The effect of the circuit for outputting image signal that power supply ripple rejection characteristic is outstanding.

Accompanying drawing explanation

Fig. 1 is the electricity of an embodiment of the image driver of the circuit for outputting image signal being denoted as quoting the present invention Line structure figure.

Fig. 2 is the circuit diagram of the object lesson of the biasing circuit representing the image driver constituting embodiment.

Fig. 3 is the temperature characterisitic of the base emitter interpolar voltage Vf representing npn bipolar transistor and pnp bipolar transistor Curve chart.

Fig. 4 is the circuit diagram of the object lesson of the clamp circuit representing the image driver constituting embodiment.

Fig. 5 is the circuit structure diagram of the first variation of the image driver representing embodiment.

Fig. 6 is the circuit structure diagram of the second deformation row of the off-centre circuit representing the image driver constituting embodiment.

Fig. 7 is the circuit structure diagram of the variation of the resistor voltage divider circuit representing the image driver constituting embodiment.

Fig. 8 is the circuit structure diagram of the example representing existing image driver.

Symbol description

AMP1 non-inverting amplifier；DIV resistor voltage divider circuit；CLP clamp circuit；OFF off-centre circuit；BUF buffer

Detailed description of the invention

Accompanying drawing used below explanation embodiments of the present invention.

Fig. 1 represents an embodiment of the image driver that have employed the present invention.There is no particular limitation, but pie graph 1 The element of shown circuit is formed on a semiconductor chip in a, is configured to semiconductor integrated circuit (IC).

As it is shown in figure 1, the image driver of present embodiment possesses: non-inverting amplifier AMP1, it is at predetermined amplitude In the range of the picture signal inputted from input terminal IN is amplified；Clamp circuit CLP, it is used for making to comprise in picture signal The sync-tip level of horizontal-drive signal constant；Resistor voltage divider circuit DIV, it gives the benchmark electricity of amplifier AMP1 The bias voltage Vbias of pressure Vref and clamp circuit CLP；Buffer BUF, it is made up of bipolar transistor etc., divides resistance Reference voltage V ref of the non-inverting amplifier AMP1 that volt circuit DIV generates carries out impedance transformation and is provided to noninverting amplification Device AMP1；And off-centre circuit OFF etc., its bias voltage Vbias to the clamp circuit CLP that resistor voltage divider circuit DIV generates Clamp circuit CLP it is supplied to after additional offset Voff.

Resistor voltage divider circuit DIV is by resistance R0, R1, the R2 being connected in series between power supply voltage terminal VCC and earth point Constitute, set resistance ratio, in order to generate reference voltage V ref at the connection node N0 of R0 and R1, additionally, in the connection of R1 and R2 Node N1 generates bias voltage Vbias.Reference voltage V ref gives to be become at input terminal IN received image signal, noninverting put The level of benchmark when big device AMP1 is amplified action, bias voltage Vbias gives for clamp circuit CLP input terminal The biasing that sync-tip level clamper is predetermined current potential of IN.

The image driver of present embodiment has added off-centre circuit OFF to the existing circuit of Fig. 8, thus need not move The resistance value of resistance R1, R2 of resistor voltage divider circuit DIV, it is possible to easily the D/C voltage of lead-out terminal during no signal is set It is the 100mY at the center of 0～200mV.Furthermore it is possible to reduce supply voltage interdependence by the setting of resistance value.Although not Diagram, but can be provided for removing DAC's between the prime of input terminal IN or input terminal IN and lead-out terminal OUT The low pass filter of sampling noise etc..

Here, the function of off-centre circuit OFF in the image driver of explanatory diagram 1 and the characteristic of needs.When being conceived to Fig. 1 Resistor voltage divider circuit DIV time, represented the current potential Verf of connection node N0 of resistance R0 Yu R1 by formula (1), pass through formula in addition (2) the current potential Vbias of the connection node N1 of resistance R1 and R2 is represented.

(mathematical expression 1)

$\mathrm{Vref}=\frac{R1+R2}{R0+R1+R2}\·\mathrm{Vcc}$ Formula (1)

(mathematical expression 2)

$\mathrm{Vbias}=\frac{R2}{R0+R1+R2}\·\mathrm{Vcc}$ Formula (2)

Further, the output voltage Vclamp of clamp circuit CLP, as formula (3), is come by Vclamp=Vbias+Voff Represent.Additionally, the input voltage VREF of non-inverting amplifier AMP1 is VREF=Vref.Thus, when non-inverting amplifier When the gain of AMP1 is set to Av, the output Vout of image driver is represented by formula (4).

(mathematical expression 3)

Vin=Vbias+Voff formula (3)

(mathematical expression 4)

Vout=V_REF+Av(Vin-V_REF) formula (4)

Additionally, gain A v is as formula (5), represented by Av=(Rs+Rf)/Rs.When wushu (1)～(4) are updated to Time in formula (5), formula (5) deforms as formula (6).

(mathematical expression 5)

$\mathrm{Av}=\frac{\mathrm{Rs}+\mathrm{Rf}}{\mathrm{Rs}}$ Formula (5)

(mathematical expression 6)

$\mathrm{Vout}=(\frac{R1+R2}{R0+R1+R2}+\frac{\mathrm{Rs}+\mathrm{Rf}}{\mathrm{Rs}}\·\frac{R2}{R0+R1+R2}-\frac{\mathrm{Rs}+\mathrm{Rf}}{\mathrm{Rs}}\·\frac{R1+R2}{R0+R1+R2})\mathrm{Vcc}$

$+\frac{\mathrm{Rs}+\mathrm{Rf}}{\mathrm{Rs}}\·\mathrm{Voff}$ Formula (6)

By this formula (6), in order to make the output Vout of image driver not have supply voltage interdependence, the of formula (6) One " 0 ", i.e. formula (7) are set up.

(mathematical expression 7)

$(\frac{R1+R2}{R0+R1+R2}+\frac{\mathrm{Rs}+\mathrm{Rf}}{\mathrm{Rs}}\·\frac{R2}{R0+R1+R2}-\frac{\mathrm{Rs}+\mathrm{Rf}}{\mathrm{Rs}}\·\frac{R1+R2}{R0+R1+R2})=0$ Formula (7)

Additionally, when arrangement formula (6), become formula (8) such.

(mathematical expression 8)

$\mathrm{Vout}=\left(\frac{\mathrm{Rs}\·R2-\mathrm{Rf}\·R1}{\mathrm{Rs}(R0+R1+R2)}\right)\mathrm{Vcc}+\frac{\mathrm{Rs}+\mathrm{Rf}}{\mathrm{Rs}}\·\mathrm{Voff}$ Formula (8)

Thus, in order to eliminate Vcc item from this formula (8), it is known that Rs R2-Rf R1=0, i.e. R1: R2=Rs: Rf i.e. Can.In order to meet this condition, when determining resistance R1, R2, Rs, Rf, it is such that formula (6) becomes formula (9).

(mathematical expression 9)

$\mathrm{Vout}=\frac{\mathrm{Rs}+\mathrm{Rf}}{\mathrm{Rs}}\·\mathrm{Voff}$ Formula (9)

Therefore, according to formula (9), it is known that if not there is power supply electricity by the offset voltage Voff that off-centre circuit OFF is additional Pressure interdependence and temperature dependency, then can make the output Vout of image driver not have supply voltage interdependence and temperature Degree interdependence.In order to the output Vout of the i.e. driver of D/C voltage during the no signal of picture signal is set as in 0～200mV The 100mV of the heart, is set to " 2 " (gain=6dB) the amplification degree of non-inverting amplifier AMP1, offset voltage Voff is set as 50mV.

Fig. 2 represents the concrete circuit example of above-mentioned off-centre circuit OFF.The off-centre circuit OFF of this embodiment possesses: at electricity The constant-current source CS1 being connected in series between source voltage terminal VCC and earth point and the pnp bipolar transistor Q1 of grounded collector； The npn bipolar transistor Q2 of the grounded collector being similarly connected in series between power supply voltage terminal VCC and earth point and Constant-current source CS2；And there is the inverting amplifier AMP2 of input resistance Ros and feedback resistance Rof.

Then, the connection node of resistance R1 and R2 of the base terminal of pnp bipolar transistor Q1 and resistor voltage divider circuit DIV N1 connect, on the emitter terminal of this transistor Q1 connect npn bipolar transistor Q2 base terminal, constant-current source CS1 and Transistor Q1 and transistor Q2 and constant-current source CS2 respectively constitutes emitter follower.Additionally, exist via input resistance Ros The reversed input terminal of inverting amplifier AMP2 is connected, at inverting amplifier on the emitter terminal of npn bipolar transistor Q2 The non-inverting input terminal of AMP2 applies the current potential Vbias of the connection node N1 of resistance R1 and R2 of resistor voltage divider circuit DIV.

In current general semiconductor technology, as the emitter stage of npn bipolar transistor and base region with make The diffusion layer used for the emitter stage of pnp bipolar transistor and base region owing to being formed in different operations respectively so The concentration of impurity is different, (is equivalent to the forward electricity of PN coupling at the base emitter interpolar voltage Vfnpn of npn bipolar transistor Pressure) and the base stage of pnp bipolar transistor, to launch generation in voltage across poles Vfpnp poor.The off-centre circuit of the present embodiment utilizes this base Pole, the difference of transmitting voltage across poles, generate offset voltage Voff.Further, because the base stage of the transistor of npn and pnp, launch interpolar The difference of voltage is smaller, so being provided with inverting amplifier AMP2 to become desired value (50mV).

Here, when the gain of inverting amplifier AMP2 is set to Av2, input resistance is set to Ros, feedback resistance is set to During Rof, because Av2=(Ros+Rof)/Ros, so the offset voltage Voff such as formula (10) generated by the off-centre circuit of Fig. 2 Represent like that.

(mathematical expression 10)

$\mathrm{Voff}=-\frac{\mathrm{Ros}+\mathrm{Rof}}{\mathrm{Ros}}\·(\mathrm{Vfpnp}-\mathrm{Vfnpn})$ Formula (10)

Understand Voff according to formula (10) and not there is supply voltage interdependence.Additionally, base emitter interpolar voltage Vf pnp, Vf Npn changes, as it is shown on figure 3, Vf npn and Vf pnp has not due to the collector current that flows through in each transistor Same temperature characterisitic.Therefore, flow through power supply I1, I2 of constant-current source CS1 and constant-current source CS2 by setting, make the temperature of Vf npn The temperature characterisitic of degree characteristic and Vf pnp is cancelled out each other, and the value of (Vf pnp-Vf npn) does not have temperature characterisitic, thus enables that Voff does not have temperature dependency.

Specifically, circuit design is carried out, in order in the characteristic from Vf npn, such as have selected-2mV/ DEG C of (colelctor electrode Electric current=Ic3) time, from the characteristic of Vf pnp, similarly select-2mV/ DEG C (collector current=Ic2 '), each colelctor electrode Ic3, Ic2 ' it is set as the current value of constant-current source CS1 and CS2 of Fig. 2, flow through such constant current.By carrying out such design, The offset voltage Voff by off-centre circuit OFF is additional can be made not have temperature dependency.

The structure of the resistor voltage divider circuit DIV and non-inverting amplifier AMP1 of the image driver of above-mentioned embodiment with The available circuit of Fig. 8 is identical, is difficult to the image by manufacture deviation so identical with available circuit, and by carry out above-mentioned that The setting of the current value of constant-current source CS1, CS2 of sample, it is possible to not there is temperature dependency, so for environment temperature on a large scale Interior variation can stably work, and as it has been described above, because supply voltage interdependence is low, so there is working power voltage The advantage that scope has greatly good power supply ripple rejection characteristic.Concrete circuit as clamp circuit CLP, it is considered to Fig. 4 (A) the differential-type circuit shown in the circuit of shown in a transistor or Fig. 4.

The transistor Q5 of the clamp circuit shown in transistor Q0 or Fig. 4 (B) of the clamp circuit of Fig. 4 (A) is when significant When picture signal comes input terminal IN, becoming cut-off state owing to the current potential of input terminal IN uprises, clamp circuit becomes Output high impedance state.Then, when have input the horizontal synchronization pulse of picture signal, Q0 or Q5 turns on, input terminal IN's Current potential clamper is sync-tip level.That is, Fig. 4 (A), the clamp circuit of (B) are only carried out in the period of horizontal synchronization pulse Clamper action.It addition, clamp circuit is not limited to Fig. 4 (A), (B) such circuit.

(variation 1)

Illustrate the first variation of the image driver of above-mentioned embodiment in Figure 5.This variation is off-centre circuit OFF is not arranged in the prime of clamp circuit CLP and is provided in applying the inverting input of the Vref of non-inverting amplifier AMP1 Sub-side, and by off-centre circuit OFF, Vref added negative offset voltage-Voff.In order to produce negative offset voltage- Voff, in the off-centre circuit OFF of Fig. 5, pnp transistor Q1 is contrary with during Fig. 2 with the difference of the Vf of npn transistor Q2.This deformation The image driver of example has the advantage identical with the image driver of above-mentioned embodiment relative to available circuit.

Additionally, in this variation, take measures, by changing the biasing of pnp transistor Q1 and npn transistor Q2, The emitter follower of Q2 is arranged on the prime of the emitter follower of Q1, even if power source voltage Vcc reduces can also ensure that perseverance The running voltage of stream source CS1.Further, in the image driver of Fig. 5, can be by constituting the anti-phase amplification of off-centre circuit OFF The buffer BUF of device AMP2 alternate figures 1, so eliminating buffer BUF.In addition it is possible to inverting amplifier AMP2 is replaced For non-inverting amplifier.

(deformation row 2)

The second deformation of the off-centre circuit of the image driver constituting above-mentioned embodiment is illustrated in Fig. 6 (A), (B) Example.This variation, also becomes even if not amplifying in the difference (Vf pnp-Vf npn) of pnp transistor Q1 and the Vf of npn transistor Q2 In the case of desired bias voltage Voff, eliminate the inverting amplifier AMP2 in the image driver of Fig. 2 and Fig. 5.Thus, Can reduce by an amplifier, it is possible to reduce chip size, and can the input offset that has of step-down amplifier self The image of voltage, so the advantage with the manufacture deviation that can reduce D/C voltage.

Additionally, in order to the difference (Vf pnp-Vf npn) of Vf becomes desired offset voltage Voff, can be adjusted to energetically For the base region of transistor of pnp and npn, the concentration of the diffusion layer of emitter region, in order to the present invention can be applied.Make structure Become the variation of Fig. 6 (B) of the off-centre circuit deformation of the imageing sensor of Fig. 5 owing to omitting inverting amplifier AMP2, offseting The rear class of circuit OFF needs buffer BUF, so the advantage of chip size cannot be obtained reducing, but can reduce output DC The manufacture deviation of voltage.

(variation 3)

In Fig. 7 (A)～(D), illustrate the resistor voltage divider circuit DIV's of the image driver constituting above-mentioned embodiment Variation.Wherein the resistor voltage divider circuit DIV of the variation of Fig. 7 (A) is replaced into constant-current source CS0, Fig. 7 (B)～(D) resistance R0 Variation resistance R0 is replaced into constant-current source CS0, and resistance R1, R2 are replaced into diode.

It addition, when the amplifier of the final level i.e. gain of non-inverting amplifier AMP1 is set as 6dB (2 times), such as Fig. 7 (B), (C) such, the quantity of the diode between quantity and node N1 and the earth point of the diode between node N0-N1 is set It is 1: 1, when the amplifier of the final level i.e. gain of non-inverting amplifier AMP1 is set as 12dB (3 times), can be such as Fig. 7 (D) Like that, it is 1 the quantity set of the diode between quantity and node N1 and the earth point of the diode between node N0-N1: 3。

The invention that the present inventor makes is specifically illustrated above according to embodiment, but on the invention is not restricted to State embodiment, in the range of the technological thought of the present invention, comprise various variation.

Additionally, in the above-described embodiment, the present invention is used for image driver, but the present invention can also use widely In the semiconductor integrated circuit being built-in with the circuit giving desired offset voltage.

Claims (5)

1. a circuit for outputting image signal, it has: clamp circuit, the current potential of the input terminal of received image signal is entered by it Row clamper；

First differential amplifier circuit, its picture signal inputted from described input terminal and predetermined reference voltage are as defeated Enter, be amplified exporting afterwards to the picture signal of input；

Bleeder circuit, its generation is supplied to the bias voltage of described clamp circuit and is supplied to described first differential amplifier circuit Reference voltage or become the voltage on its basis；And

Off-centre circuit, its described bias voltage that described bleeder circuit is generated or described reference voltage or become the electricity on its basis Pressure is additional or deducts predetermined offset voltage, is supplied to described clamp circuit or described first differential amplifier circuit afterwards,

Described circuit for outputting image signal is characterised by,

Described off-centre circuit possesses pnp bipolar transistor and npn bipolar transistor, exports the base stage with two transistors, sends out Penetrate the voltage that the difference of voltage across poles is corresponding.

Circuit for outputting image signal the most according to claim 1, it is characterised in that

Described off-centre circuit has the first constant-current source being connected in series with described pnp bipolar transistor and described npn bipolar transistor The second constant-current source that pipe is connected in series, be set by electric current that described first constant-current source flows through in described pnp bipolar transistor, Electric current with being flow through in described npn bipolar transistor by described second constant-current source, makes the base of described pnp bipolar transistor Pole, launch the base stage of temperature characterisitic and the described npn bipolar transistor of voltage across poles, launch the temperature characterisitic of voltage across poles substantially Identical.

Circuit for outputting image signal the most according to claim 1 and 2, it is characterised in that

Described off-centre circuit possesses the second differential amplifier circuit, and this second differential amplifier circuit is by the base of said two transistor Pole, launch the potential difference of voltage across poles and input to the described bias voltage of this off-centre circuit or become the base of described reference voltage The voltage of plinth is as input.

Circuit for outputting image signal the most according to claim 3, it is characterised in that

Described off-centre circuit is arranged between described bleeder circuit and described first differential amplifier circuit, to described clamp circuit The described bias voltage that described bleeder circuit generates is provided, provides by becoming that described bleeder circuit generates to described off-centre circuit The voltage on the basis of described reference voltage, provides the voltage that addition of offset voltage to described first differential amplifier circuit.

Circuit for outputting image signal the most according to claim 1, it is characterised in that

Described off-centre circuit is arranged between described bleeder circuit and described clamp circuit, and at described bleeder circuit and described The buffer also transmitted it after described reference voltage is carried out impedance transformation is set between the first differential amplifier circuit.