CN102521178A - High-reliability embedded man-machine interface and realizing method thereof - Google Patents
High-reliability embedded man-machine interface and realizing method thereof Download PDFInfo
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- CN102521178A CN102521178A CN2011103719910A CN201110371991A CN102521178A CN 102521178 A CN102521178 A CN 102521178A CN 2011103719910 A CN2011103719910 A CN 2011103719910A CN 201110371991 A CN201110371991 A CN 201110371991A CN 102521178 A CN102521178 A CN 102521178A
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Abstract
The invention relates to a high-reliability man-machine interface of an embedded system and a realizing method of the man-machine interface. A novel method of the man-machine interface of the embedded system is achieved by adopting a Flash storage unit and a hardware access module and matching with a DMA (direct memory access) controller. By using the method, an access process, a calculation process and a drawing process for the graphic data of the interface in a man-machine interface realizing technique are separated from the operation of a CPU (central processing unit), and are achieved by a high-speed logic circuit; the CPU only needs to send out an interface drawing instruction, the intermediate process of drawing the interface is not necessary to be intervened; and the DMA controller of the high-speed logic circuit and the hardware access module directly access a storage unit and display a storage area according to the drawing instruction, so as to carry out the direct access of the graphic data and the calculation of interface drawing. By using the man-machine interface and the realizing method, the high-speed and independent drawing of a graph of the man-machine interface is achieved, and the purpose that a graphic calculation process and a drawing process basically do not occupy the time of the CPU is achieved, so that more resources of the CPU are saved for the embedded system, and the reliability of the embedded system is obviously improved.
Description
Technical field
The present invention relates to high reliability embedded system man-machine interface and its implementation.
Background technology
Human-computer interaction interface implementation method in the tradition embedded system is the pure software Graphics Mode; Because the ability of embedded system own is limit; Do not have independently graphics processor system; Cause embedded system to want petty and be operated in low CPU usage but the coarse Text Mode of display effect, the petty good but graphic model of high CPU usage of display effect that be operated in.And high CPU usage causes the real-time of embedded system to receive very big influence, for there being certain real-time to require and have the application scenarios of certain computational requirements, obviously greatly reduces the reliability of embedded system.
Embedded system usually has certain computation requirement, some application scenario even have very big operand, and this just needs a large amount of CPU times, is used to guarantee operation result and embedded system real-time.Embedded system also requires to have good operability simultaneously, requires its man-machine interface enough friendly, easy operating.
Therefore, the man-machine interface of embedded OS realizes technology, need break through classic method by a kind of new technical method, realizes the low occupancy of CPU, satisfies the application demand that the man-machine interface complex figure is drawn simultaneously.
Summary of the invention
The objective of the invention is to overcome the above-mentioned deficiency of prior art; High reliability embedded system man-machine interface is provided; This embedded system man-machine interface breaks through the technology limitation of traditional man-machine interface implementation method; Realize the high speed of human machine interface graphics, the independent drafting, reach graphics calculations and drawing process and do not take the CPU time basically, thereby strengthen the reliability of embedded system greatly.
Another object of the present invention is to provide the implementation method of high reliability embedded system man-machine interface.
Above-mentioned purpose of the present invention is achieved through following technical scheme:
High reliability embedded system man-machine interface comprises embedded type CPU, dma controller, hardware access module, Flash storer and display, wherein:
Embedded type CPU: DMA instruction is sent to dma controller, and said DMA instruction is the structure array, comprises the needed correlated variables of dma operation, comprises source address, reads total length, destination address and stepping length;
Dma controller: receive the DMA instruction of embedded type CPU output; And the variable information in the parsing DMA instruction array; Obtain reading required the reading the address and read length of Flash storer; And write display required write address and stepping length, and with saidly reading the address, read length, writing the address and the stepping length information is exported to the hardware access module, the control hardware access module carries out the read-write of DMA simultaneously;
Hardware access module: read address information and read length information according to what receive from dma controller; From the Flash storer, read required display message; Write address information and stepping length information according to what receive again from dma controller; Calculate the displaing coordinate on the display, and the display message that will from the Flash storer, read writes the demonstration memory block of the corresponding display of said displaing coordinate;
Display: the display message in the reading displayed memory block is carried out screen display, and accomplishes man-machine interface and draw;
Flash storer: carry out the storage of display message.
In above-mentioned high reliability embedded system man-machine interface, dma controller and hardware access module adopt the fpga logic circuit to realize, and carry out the IP encapsulation.
The implementation method of high reliability embedded system man-machine interface comprises the steps:
(1) embedded type CPU sends to dma controller with DMA instruction, and said DMA instruction is the structure array, comprises the needed correlated variables of dma operation, comprises source address, reads total length, destination address and stepping length;
(2) dma controller receives the DMA instruction of embedded type CPU output; And the variable information in the parsing DMA instruction array; Obtain reading required the reading the address and read length of Flash storer; And write display required write address and stepping length, and with saidly reading the address, read length, writing the address and the stepping length information is exported to the hardware access module, the control hardware access module carries out the read-write of DMA simultaneously;
(3) the hardware access module reads address information and reads length information according to what receive from dma controller; From the Flash storer, read required display message; Write address information and stepping length information according to what receive again from dma controller; Calculate the displaing coordinate on the display, and the display message that will from the Flash storer, read writes the demonstration memory block of the corresponding display of said displaing coordinate;
(4) display message in the display reading displayed memory block is carried out screen display, and accomplishes man-machine interface and draw.
The present invention's advantage compared with prior art is:
(1) the present invention has adopted the method that dma controller and hardware access module cooperate; Access, calculating, the drawing process of complex figure in the man-machine interface are separated with the CPU operation; Make the man-machine interface implementation procedure independent, CPU only need send the man-machine interface drawing for order and give dma controller and hardware access module, and the CPU participation significantly reduces; Basically need not to take the CPU time; Make it can be used for a large amount of computings and real time operating system more, thereby save cpu resource, use and real time operating system to be used for great amount of calculation for embedded system;
(2) the man-machine interface implementation method that the present invention is more traditional is compared; Dexterously graphics calculations and drawing process are peeled off CPU; Come independent the completion by hardware access module and dma controller, need not CPU basically and participate in, make the man-machine interface of embedded OS realize independent the completion; Make CPU have more time to be used for other processing of embedded system, thereby improved the operational reliability of embedded system greatly;
(3) the man-machine interface implementation method that the present invention is more traditional is compared, and adopts the fpga logic circuit to realize, and carries out the IP encapsulation, and CPU only controls through the DMA instruction, therefore has very strong versatility and applicability;
(4) the inner high speed logic circuit of FPGA of the present invention is made up of two modules; Dma controller and hardware access module; Wherein dma controller is responsible for accomplishing cpu command parsing and DMA control operation; The hardware access module is responsible for the DMA concrete operations, show is calculated and the interface drawing process, therefore can high-speed and high-efficiency accomplishes the drafting task of complicated man-machine interface, has improved the work efficiency of embedded system greatly;
Description of drawings
Fig. 1 is the theory diagram of embedded system man-machine interface of the present invention;
Fig. 2 is an embedded system man-machine interface screen display principle schematic of the present invention;
Fig. 3 is an embedded system man-machine interface character displaying principle synoptic diagram of the present invention.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail:
Be illustrated in figure 1 as the theory diagram of embedded system man-machine interface of the present invention; The embedded system man-machine interface; Comprise embedded type CPU, dma controller, hardware access module, Flash storer and display, wherein embedded type CPU sends to dma controller with the DMA instruction, and the DMA instruction is the structure array; Comprise the needed correlated variables of dma operation, comprise source address, read total length, destination address and stepping length.
Dma controller receives the DMA instruction of embedded type CPU output; And the variable information in the parsing DMA instruction array; Obtain reading required the reading the address and read length of Flash storer; And write display required write address and stepping length, and will read the address, read length, write the address and the stepping length information is exported to the hardware access module, the control hardware access module carries out the read-write of DMA simultaneously.
The hardware access module reads address information and reads length information according to what receive from dma controller; From the Flash storer, read required display message; Write address information and stepping length information according to what receive again from dma controller; Calculate the displaing coordinate on the display, and the display message that will from the Flash storer, read writes the demonstration memory block of the corresponding display of said displaing coordinate.
Dma controller and hardware access module adopt the fpga logic circuit to realize, and carry out the IP encapsulation.
Display message in the display reading displayed memory block is carried out screen display, and accomplishes man-machine interface and draw.The Flash storer carries out the storage of display message.
Be illustrated in figure 2 as embedded system man-machine interface screen display principle schematic of the present invention; The hardware access module is carried out the calculating of displaing coordinate and on screen, draw the method at interface following: the hardware access module obtains display message from the Flash storer; And after obtaining the start address and stepping length of screen display from dma controller; Display message is a unit with a character; The hardware access module is calculated the coordinate of each character, and is write corresponding demonstration memory block according to writing address and stepping length in the DMA instruction.
As shown in Figure 2, in instantiation of the present invention, used LCD is to be made up of 2048 display dot of every row, 32 display dot of every row.In shown in Figure 2, to simplify for making figure, each big lattice has been represented 8 row, 8 a row display dot.Therefore whenever show 4 lattice, every row 256 lattice.If each character shows by 8X8 display dot, then as shown in the figure 2, each character takies lattice.In instantiation; " Text E " display message is stored in the Flash storer; The hardware access module is earlier according to reading the address and reading total length in the DMA instruction; Read the display message of each character to the appropriate address of Flash storer, again according to writing the address and writing stepping length and it is write show the memory block in the DMA instruction.Wherein, read total length and be each character shared memory length in the Flash storer, a used row display dot counts when writing stepping length and be display and showing each character; In instance, the memory length of a character is 8X8bit, because the organizational form of storage address is by the Byte addressing; Therefore the total length that reads of a character is 8; The length that writes the demonstration memory block of a character is 8bit, presses the Byte addressing equally, and the stepping length that writes of a character is 1.
Be illustrated in figure 3 as embedded system man-machine interface character displaying principle synoptic diagram of the present invention; Be that the row coordinate is all the concrete structure signal of 4 big lattice altogether of these row of X2 among Fig. 2; Wherein coordinate is (X2; Y3) shown a character " T " in the lattice, and be the displaying principle of the single character of example explanation display with this character.As previously mentioned, the display dot on the display shows that by row in Fig. 3, every little lattice are represented a display dot, the corresponding 1bit that shows the memory block.8 little lattice of row just take and show memory block 1Byte size in the then big lattice, suppose among Fig. 3 coordinate for (X2, Y1) the 1st row first address of lattice is a greatly, then coordinate (X2; Y2) the 1st row first address is a+1, and coordinate (X2, Y3) the 1st row first address is a+2; In like manner, and coordinate (X2, Y1) the 8th row first address is a+28; (X2, Y4) the 8th row first address is a+31 to coordinate, and then can calculate the first address of each big each row of lattice on the screen.In instantiation, when wanting character display " T ", at first to find the screen display coordinate be (X2 to the hardware access module according to the address that writes in the DMA instruction; Y3), and to calculate the first address that shows the memory block be a+2, is 1 according to the stepping length that writes of an aforementioned character; The hardware access module writes coordinate (X2 with display message; Y3) demonstration of the 1st row display dot is accomplished in the corresponding demonstration memory block of the 1st row, and the first address that then calculates the 2nd row is a+6; And display message write the corresponding demonstration memory block of the 2nd row, accomplish the demonstration of the 2nd row display dot.Method operation successively calculates coordinate for (X2, Y3) first address of all row in the big lattice writes the demonstration memory block with display message, finally accomplishes the demonstration of character " T ".
To sum up instance is said; Technical scheme of the present invention is peeled off CPU with graphics calculations and drawing process; Come independent completion at a high speed by hardware access module and dma controller; Need not the drawing process that CPU participates in the interface, thereby saved more cpu resource, significantly improve the reliability of embedded system for embedded system.For the embedded system human-computer interaction interface provides a kind of technical solution, be specially adapted to the Embedded Application occasion bigger to the CPU operand, that system reliability is strong.
The above; Be merely the best embodiment of the present invention, but protection scope of the present invention is not limited thereto, any technician who is familiar with the present technique field is in the technical scope that the present invention discloses; The variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.
The content of not doing to describe in detail in the instructions of the present invention belongs to this area professional and technical personnel's known technology.
Claims (3)
1. high reliability embedded system man-machine interface is characterized in that: comprise embedded type CPU, dma controller, hardware access module, Flash storer and display, wherein:
Embedded type CPU: DMA instruction is sent to dma controller, and said DMA instruction is the structure array, comprises the needed correlated variables of dma operation, comprises source address, reads total length, destination address and stepping length;
Dma controller: receive the DMA instruction of embedded type CPU output; And the variable information in the parsing DMA instruction array; Obtain reading required the reading the address and read length of Flash storer; And write display required write address and stepping length, and with saidly reading the address, read length, writing the address and the stepping length information is exported to the hardware access module, the control hardware access module carries out the read-write of DMA simultaneously;
Hardware access module: read address information and read length information according to what receive from dma controller; From the Flash storer, read required display message; Write address information and stepping length information according to what receive again from dma controller; Calculate the displaing coordinate on the display, and the display message that will from the Flash storer, read writes the demonstration memory block of the corresponding display of said displaing coordinate;
Display: the display message in the reading displayed memory block is carried out screen display, and accomplishes man-machine interface and draw;
Flash storer: carry out the storage of display message.
2. high reliability embedded system man-machine interface according to claim 1 is characterized in that: said dma controller and hardware access module adopt the fpga logic circuit to realize, and carry out the IP encapsulation.
3. the implementation method of high reliability embedded system man-machine interface according to claim 1 is characterized in that comprising the steps:
(1) embedded type CPU sends to dma controller with DMA instruction, and said DMA instruction is the structure array, comprises the needed correlated variables of dma operation, comprises source address, reads total length, destination address and stepping length;
(2) dma controller receives the DMA instruction of embedded type CPU output; And the variable information in the parsing DMA instruction array; Obtain reading required the reading the address and read length of Flash storer; And write display required write address and stepping length, and with saidly reading the address, read length, writing the address and the stepping length information is exported to the hardware access module, the control hardware access module carries out the read-write of DMA simultaneously;
(3) the hardware access module reads address information and reads length information according to what receive from dma controller; From the Flash storer, read required display message; Write address information and stepping length information according to what receive again from dma controller; Calculate the displaing coordinate on the display, and the display message that will from the Flash storer, read writes the demonstration memory block of the corresponding display of said displaing coordinate;
(4) display message in the display reading displayed memory block is carried out screen display, and accomplishes man-machine interface and draw.
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| CN106162299A (en) * | 2015-03-31 | 2016-11-23 | 青岛海信电器股份有限公司 | A kind of playing method and device of OSD cartoon material data |
| CN106294181A (en) * | 2016-08-24 | 2017-01-04 | 成都三零嘉微电子有限公司 | Smart card software method of testing in service life |
| CN106648507A (en) * | 2016-12-05 | 2017-05-10 | 中国航空工业集团公司洛阳电光设备研究所 | Circuit and method used for extended DVI display output of embedded processor |
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| CN106933542A (en) * | 2017-03-31 | 2017-07-07 | 中国核动力研究设计院 | A kind of DMA coprocessors and method based on FPGA for nuclear power plant's DCS system |
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| CN106162299A (en) * | 2015-03-31 | 2016-11-23 | 青岛海信电器股份有限公司 | A kind of playing method and device of OSD cartoon material data |
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| CN106648507A (en) * | 2016-12-05 | 2017-05-10 | 中国航空工业集团公司洛阳电光设备研究所 | Circuit and method used for extended DVI display output of embedded processor |
| CN106648507B (en) * | 2016-12-05 | 2020-02-14 | 中国航空工业集团公司洛阳电光设备研究所 | Circuit and method for expanding DVI display output of embedded processor |
| CN106776373A (en) * | 2017-01-12 | 2017-05-31 | 合肥杰美电子科技有限公司 | The cache systems based on flash memory and method of a kind of facing mobile apparatus |
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| CN106933542A (en) * | 2017-03-31 | 2017-07-07 | 中国核动力研究设计院 | A kind of DMA coprocessors and method based on FPGA for nuclear power plant's DCS system |
| CN106933542B (en) * | 2017-03-31 | 2019-06-07 | 中国核动力研究设计院 | A kind of DMA coprocessor and method based on FPGA for nuclear power plant's DCS system |
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Application publication date: 20120627 |