CN102508985A - Circuit simulation optimizing method based on multi-field unified modeling language - Google Patents
Circuit simulation optimizing method based on multi-field unified modeling language Download PDFInfo
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- CN102508985A CN102508985A CN2011103923096A CN201110392309A CN102508985A CN 102508985 A CN102508985 A CN 102508985A CN 2011103923096 A CN2011103923096 A CN 2011103923096A CN 201110392309 A CN201110392309 A CN 201110392309A CN 102508985 A CN102508985 A CN 102508985A
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Abstract
The invention relates to a circuit simulation optimizing method based on multi-field unified modeling language, which includes: step one, drawing a circuit diagram to be simulated; step two, converting the circuit diagram into standard mo files required by Modelica simulation; step three, using the direct-current analyzing method to convert the standard mo files for simulation into direct-current analysis mo files; step four, using the small-data short-step method to simulate the direct-current analysis mo files and obtain an initial value data table of each device; step five, selecting the direct-current initial value of each device from the initial value data table, acquired from the step four, of each device, wherein the last value in the initial value data table of each device is used as the direct-current initial value of the device; and step six, recovering the standard mo files at the step two, loading the direct-current initial values, acquired at the step five, of the devices in simulation files to be used as initial values of the devices, and re-performing short-time large-data-volume simulation with the initial values of the devices to obtain the final results. Using the method can quicken a simulation system and the circuit simulation optimizing method based on the multi-field unified modeling language is widely applicable to the field of circuit simulation optimizing.
Description
Technical field
The present invention relates to a kind of circuit simulation optimization method, particularly about a kind of circuit simulation optimization method based on the multidomain uniform modeling language.
Background technology
UML has the universal model descriptive power of field independence, owing to adopt unified model description form, therefore can realize seamless integrated between the different field subsystem model of complication system based on the method for UML.14 experts that the emulation EUROSIM of association in Europe organized 6 national modeling and simulation fields such as Sweden in 1996; Launch research to multi-field physics unified Modeling technology; Research and design multidomain uniform modeling language of future generation Modelica is proposed through international open cooperation.Its model bank has covered many engineerings such as automobile dynamics, system dynamics, fuel cell, heat power, fuzzy control, circuit simulation field etc.To the logistic consistance of different subject experiment members; Theoretical theoretical based on multi-field physics unified Modeling with constraint representation; Adopt the Modelica standard, in conjunction with equation, function, algorithm, chart, constraint expression elements such as structure, if expression formula, when expression formula; And the various built-in handling function that provides of Modelica standard, the mathematical logic of virtual experimental member is carried out consistance represent.
For finding the solution of virtual experimental mathematical model; At first through morphology, grammer and semantic analysis; Form DOM Document Object Model (DOM) tree; Based on dom tree, launch, inherit and launch, connect and launch and component instanceization through polymerization, realize based on the mapping of the virtual experimental model of Modelica to smooth mathematical model with hierarchical structure; For the differential algebra subsystem in the model, the index reduction method based on structure analysis is proposed, realize that the index of falling of high target DAE system is handled; Discrete event in the model is converted into numerical value passes through function; Through triggering to the zero passage detection decision event of passing through function; In conjunction with existing to DAE, like the multiple numerical solution algorithm of DASSL, Sundals etc., ODE, linear/non-linear algebra system, through the incident iteration with reinitialize processing; Realize continuously the discrete numerical solution that mixes the virtual experimental model, and accomplish the format output of result data.Development along with infotech; Effectively replenish as a kind of of traditional experiment teaching; Virtual experimental teaching has become the important means of strengthening practical teaching, improving the quality of teaching, and it not only can replace traditional experimental teaching to a certain extent, and can overcome the various restrictions and the drawback of traditional experiment; Thereby solve the problems that exist in the present experimental teaching effectively, reach the purpose of optimizing educational resource, improving the quality of teaching.Virtual experimental is to be guidance with the modern education theory, serves as to rely on a kind of novel experiment teaching system of setting up with computer simulation technique, multimedia technology and network technology.
In the virtual experimental system that utilizes the Modelica language as UML, utilize the OPENMODELICA platform as emulation tool (its simulation kernel is the Modelica language).An important content is carried out circuit simulation exactly; Because multidomain uniform modeling language Modelica has only the transient state emulational language; Lack the dc analysis language; So when utilizing this language that the circuit that contains energy-storage travelling wave tube (like electric capacity) is carried out simulation calculating, each initial value of its components and parts all is to calculate since 0.Therefore cause some particular electrical circuit emulated data output DC stabilization overlong time, badly influence availability.Like Fig. 1, shown in Figure 2, existing artificial circuit in use, its stability simulation time that needs, actual test was 56.4 seconds more than or equal to 10 seconds (settings), simulation time is longer.
Summary of the invention
To the problems referred to above, the purpose of this invention is to provide a kind ofly under the prerequisite that does not influence the emulation correctness, can effectively reduce simulation time, improve the circuit simulation optimization method based on the multidomain uniform modeling language of whole simulation system speed and availability.
For realizing above-mentioned purpose, the present invention takes following technical scheme: a kind of circuit simulation optimization method based on the multidomain uniform modeling language, and it comprises the steps: that (1) drafting needs the circuit diagram of emulation; (2) convert circuit diagram to standard mo file that Modelica emulation is used, the mo file is a kind of disk file form that the Modelica kernel is admitted; (3) the standard mo file conversion of adopting the dc analysis method that emulation is used becomes dc analysis mo file; (4) adopt the short step-length method of small data that dc analysis mo file is carried out emulation, and then obtain the initial value data table of each device; (5) select the direct current initial value of each device in each the device primary data table that in step (4), obtains, each device is got last value as the direct current initial value; (6) the standard mo file in the recovering step (2); To be loaded in the simulation document of said step (2) initial value by the device direct current initial value that step (5) obtain as device; Again have short time, the big data quantity emulation of device initial value, and obtain net result.
In the said step (4), in the short step-length method of said small data, adopting small data is less than 100 data, and short step-length is less than 0.01s.
The present invention is owing to take above technical scheme; It has the following advantages: the present invention is dc analysis mo file owing to adopting the dc analysis method with standard mo file conversion, and adopts the short step-length method of small data that dc analysis mo file is carried out emulation, calculates the initial value data table of each device of generation; Choose last value and be the direct current initial value; And with this direct current initial value as the initial value of emulation device next time, therefore significantly reduced simulation time, improved the speed of whole simulation system.The present invention can be widely used in the circuit simulation optimization field.
Description of drawings
Fig. 1 is based on the artificial circuit synoptic diagram of multidomain uniform modeling language Modelica in the prior art;
Fig. 2 data stabilization effect synoptic diagram that is Fig. 1 when emulation to 10 second;
Fig. 3 is a schematic flow sheet of the present invention;
Fig. 4 is the waveform effect figure that the present invention optimizes post-simulation;
Fig. 5 is the local stretch-out view of Fig. 4.
Embodiment
The present invention utilizes multidomain uniform modeling language Modelica that circuit is carried out emulation, except requirement result is genuine and believable, also requires the actual emulation time to shorten as far as possible.Because output data DC stabilization overlong time causes the system emulation time of setting just can't shorten.And in actual emulation, the actual emulation time T
R=KT
S, T wherein
SBe the system emulation time that is provided with, K is the hardware device speed that coefficient depends primarily on computing, but the K value that is to say design system simulation time T often greater than 50
SDuring for 0.1s, the actual emulation time T
ROften greater than 5S, this is the characteristic of all simulation softwares, is to change.Under the constant situation of the hardware of confirming system, K has not just changed yet, and dwindles the actual emulation time T so
ROptimal path reduce design system simulation time T exactly
SAnd how much also extremely important the hits setting of emulated data is, because the result data of emulation all is two floating numbers, if overabundance of data, read-write all will spend the more time, if but data are less, and can be because the data volume deficiency cause output waveform distortions.Through embodiment the present invention is done detailed introduction below.
As shown in Figure 3, the present invention adopts the least possible data in the small data short time transient state emulation of beginning; 100 sampled points for example obtain the initial D. C. value of device, and in the follow-up emulation that has a device initial value; To data volume be set according to the length of simulation time.In order to reduce design system simulation time T
S, will accomplish the effect of direct current emulation in the similar SPICE language.The present invention is to the system emulation time T
SThe step that is optimized is following:
1) drafting needs the circuit diagram (as shown in Figure 1) of emulation;
2) convert the standard mo file that Modelica emulation is used to drawing good circuit diagram in the step 1), the mo file is a kind of disk file form that the Modelica kernel is admitted;
3) the standard mo file conversion of emulation being used becomes dc analysis mo file, promptly adopts dc analysis method general in the prior art, shunt capacitance C2 and coupling capacitance C1 and C3 are opened circuit, and voltage source V s short circuit, Is opens circuit with current source, obtains dc analysis mo file;
4) adopt the method for the short step-length of small data that dc analysis mo file is carried out emulation, and then obtain the initial value data table (as shown in table 1) of each device, wherein small data is less than 100 data, and short step-length is less than 0.01s;
Table 1 device initial value data table
5) select the direct current initial value of each device in each the device primary data table that in step 4), obtains, each device is got last value and is got final product as the direct current initial value;
Because each device all has series of results, and might there be instability in the data that are positioned at the front, so the present invention gets the direct current initial value of last value of each result as device;
6) recovering step 2) in standard mo file; The direct current initial value of the device that step 5) is obtained is loaded into step 2) simulation document in; Initial value as device; Carry out having for the second time short time, the big data quantity emulation of device initial value, obtain final simulation result (like Fig. 4, shown in Figure 5), be 0.12 second (design system simulation time T the emulation stabilization time after the optimization
SBe 0.12 second), its simulation result data correct improved the entire system simulation velocity greatly.The present invention has reduced the system emulation time T effectively
S, for example the initial voltage of capacitor C 3 is set to 4V, revises the device initial value in the device initial value storer then.
In sum, the present invention according to calculating the method that produces each device direct current initial value, will significantly reduce the system emulation time T decimally owing in step 3), step 4) and step 5), adopt generation direct current mo file in step 6)
S, just can obtain stable result.
Step 1), step 2 are only carried out in emulation of the prior art) and step 6) just can obtain simulation result; But because it is very long in the prior art system emulation time T S need to be set when step 6); For example
is 4 seconds certain circuit actual emulation time, and whole simulation result just stablizes available.After the present invention utilizes step 3) and step 4) emulation, obtain an initial value at 0.01s, utilize step 5) that initial value is added in the device original document of step 6) again, step 6) just can be provided with duration T like this
SBe 0.3 second, therefore significantly reduced simulation time, improved the speed of whole simulation system.
Above-mentioned each embodiment only is used to explain the present invention; Each several part structure of the present invention and step all can change to some extent; On the basis of technical scheme of the present invention; All improvement and equivalents of the structure and the step of particular being carried out according to the principle of the invention all should not got rid of outside protection scope of the present invention.
Claims (2)
1. circuit simulation optimization method based on the multidomain uniform modeling language, it comprises the steps:
(1) drafting needs the circuit diagram of emulation;
(2) convert circuit diagram to standard mo file that Modelica emulation is used, the mo file is a kind of disk file form that the Modelica kernel is admitted;
(3) the standard mo file conversion of adopting the dc analysis method that emulation is used becomes dc analysis mo file;
(4) adopt the short step-length method of small data that dc analysis mo file is carried out emulation, and then obtain the initial value data table of each device;
(5) select the direct current initial value of each device in each the device primary data table that in step (4), obtains, each device is got last value as the direct current initial value;
(6) the standard mo file in the recovering step (2); To be loaded in the simulation document of said step (2) initial value by the device direct current initial value that step (5) obtain as device; Again have short time, the big data quantity emulation of device initial value, and obtain net result.
2. a kind of circuit simulation optimization method based on the multidomain uniform modeling language as claimed in claim 1 is characterized in that: in the said step (4), in the short step-length method of said small data, adopting small data is less than 100 data, and short step-length is less than 0.01s.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101733749A (en) * | 2009-12-22 | 2010-06-16 | 哈尔滨工业大学 | Multidomain uniform modeling and emulation system of space robot |
| CN102043657A (en) * | 2011-02-01 | 2011-05-04 | 苏州同元软控信息技术有限公司 | File serialization method of model library of physical modeling language Modelica |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101733749A (en) * | 2009-12-22 | 2010-06-16 | 哈尔滨工业大学 | Multidomain uniform modeling and emulation system of space robot |
| CN102043657A (en) * | 2011-02-01 | 2011-05-04 | 苏州同元软控信息技术有限公司 | File serialization method of model library of physical modeling language Modelica |
Non-Patent Citations (2)
| Title |
|---|
| 秦新燕: "Modelica语言在电路建模与仿真中的应用", 《湖北教育学院学报》 * |
| 顾昊英等: "基于Modelica的电子线路实验仿真", 《实验室研究与探索》 * |
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